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[83.59.162.106]) by smtp.gmail.com with ESMTPSA id z11sm21498835wrh.70.2020.10.11.12.33.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Oct 2020 12:33:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0QbPMBGbr2e8OygEfUqckUt1pMEO3ugEPGl8j5TDG5o=; b=Ftn7bHiDyZHW5cvXmnoVfxhIZ7x0GAUDWdhKYIp/hJsQQdkQjk3xFHKr2bE32ZUsTx OxkxZ8/FBeopmFzh9avflV6h87EtXxfM4cijGzielzjl88XTJCzZzfaxZUkTItX9gAHb CLrnZtGlC6tE+lxRTmg1270LdbOjcIkeG5WHj6jHawfqgjSKLufBdjis4mMwK66y/OSO TcqFClXiuxiiqAEcECDveoNEz6bLHh5C9rAB0CATtw6us/zyCMReFCPIb5H7mojw2CAj 5IfyLDg26JDoJzaddYnqsUGTkg0GeR2ISv2WtIPtkEiGu9LaBMq5Aqy5cwLgdtLe3V82 xdHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=0QbPMBGbr2e8OygEfUqckUt1pMEO3ugEPGl8j5TDG5o=; b=YaYc7OVs64G7D8ZbM/t7rP1dP4+YyrirkosQK0PAcr75/2U/N7Eh9Obz9wNGUJn2uG mwPB/GFh5CS7W9E3LE5DvSEWrF8jIaKRiMZJNYJYIijRWrcw84Ifl4CT5MhUzQMz4UWi pKG7E6I4VCUmHV1yVLECMSTWxcZyO2PMvkNZTSSEwdGtsmOU8antMuuHbqPZheAj9yLi iAH8OdhAbmRAGB10T+xtb5UuavbJUwuhPyHpXjpFChFl7pMqMVKKjgVkiVIsCvGL4vMU TxsGBLC34BEwRIOw7Gi8prbxx1KRx8O9rOODDvOkC7aNPK4C5N7iVGAOI0rkawHL7bF5 PCmA== X-Gm-Message-State: AOAM5331bwt/X3ZWd0fkfBCboZMHoVjOI/eZferA38fMjFTbHtwU0q70 CPWeQ0+hoaWl3v0NjjB6xsw= X-Google-Smtp-Source: ABdhPJx2nHHdw1cijWbRr03kOBOnQuibBEjmOLn5hkpeJFmTJLtLlItz1XL8TxPfbcWpGyc3J4e5dQ== X-Received: by 2002:adf:c5c3:: with SMTP id v3mr26840799wrg.205.1602444790002; Sun, 11 Oct 2020 12:33:10 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-block@nongnu.org, =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Eduardo Habkost , Corey Minyard , Paolo Bonzini , Aurelien Jarno , Kevin Wolf , Mark Cave-Ayland , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Stefan Berger , qemu-ppc@nongnu.org, Marcel Apfelbaum , Max Reitz , "Michael S. Tsirkin" , Laurent Vivier , Thomas Huth , John Snow , Igor Mammedov , Richard Henderson , qemu-trivial@nongnu.org, Artyom Tarasenko , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jason Wang Subject: [PATCH 07/10] hw/isa: Add the ISA_IRQ_RTC_DEFAULT definition Date: Sun, 11 Oct 2020 21:32:26 +0200 Message-Id: <20201011193229.3210774-8-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201011193229.3210774-1-f4bug@amsat.org> References: <20201011193229.3210774-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) The RTC time keep clock ses IRQ #8 by default. Add this default definition to the IsaIrqNumber enum. Avoid magic values in the code, replace them by the newly introduced definition. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/isa/isa.h | 1 + include/hw/rtc/mc146818rtc.h | 1 - hw/isa/piix4.c | 2 +- hw/rtc/m48t59-isa.c | 2 +- hw/rtc/mc146818rtc.c | 4 ++-- hw/timer/hpet.c | 8 ++++---- tests/qtest/rtc-test.c | 8 ++++---- 7 files changed, 13 insertions(+), 13 deletions(-) diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 081fa446152..9f78ff11246 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -14,6 +14,7 @@ enum IsaIrqNumber { ISA_IRQ_TPM_DEFAULT =3D 5, ISA_IRQ_FDC_DEFAULT =3D 6, ISA_IRQ_PAR_DEFAULT =3D 7, + ISA_IRQ_RTC_DEFAULT =3D 8, ISA_NUM_IRQS =3D 16 }; =20 diff --git a/include/hw/rtc/mc146818rtc.h b/include/hw/rtc/mc146818rtc.h index 5b45b229244..1cca26399ce 100644 --- a/include/hw/rtc/mc146818rtc.h +++ b/include/hw/rtc/mc146818rtc.h @@ -47,7 +47,6 @@ struct RTCState { QLIST_ENTRY(RTCState) link; }; =20 -#define RTC_ISA_IRQ 8 #define RTC_ISA_BASE 0x70 =20 ISADevice *mc146818_rtc_init(ISABus *bus, int base_year, diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index a50d97834c7..d9cceff9c84 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -185,7 +185,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp) if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) { return; } - isa_init_irq(ISA_DEVICE(&s->rtc), &s->rtc.irq, RTC_ISA_IRQ); + isa_init_irq(ISA_DEVICE(&s->rtc), &s->rtc.irq, ISA_IRQ_RTC_DEFAULT); =20 piix4_dev =3D dev; } diff --git a/hw/rtc/m48t59-isa.c b/hw/rtc/m48t59-isa.c index cae315e4885..bdde427a945 100644 --- a/hw/rtc/m48t59-isa.c +++ b/hw/rtc/m48t59-isa.c @@ -124,7 +124,7 @@ static void m48t59_isa_realize(DeviceState *dev, Error = **errp) =20 s->model =3D u->info.model; s->size =3D u->info.size; - isa_init_irq(isadev, &s->IRQ, 8); + isa_init_irq(isadev, &s->IRQ, ISA_IRQ_RTC_DEFAULT); m48t59_realize_common(s, errp); memory_region_init_io(&d->io, OBJECT(dev), &m48t59_io_ops, s, "m48t59"= , 4); if (d->io_base !=3D 0) { diff --git a/hw/rtc/mc146818rtc.c b/hw/rtc/mc146818rtc.c index 7a38540cb9d..ba156b9a0bd 100644 --- a/hw/rtc/mc146818rtc.c +++ b/hw/rtc/mc146818rtc.c @@ -981,7 +981,7 @@ ISADevice *mc146818_rtc_init(ISABus *bus, int base_year= , qemu_irq intercept_irq) if (intercept_irq) { qdev_connect_gpio_out(dev, 0, intercept_irq); } else { - isa_connect_gpio_out(isadev, 0, RTC_ISA_IRQ); + isa_connect_gpio_out(isadev, 0, ISA_IRQ_RTC_DEFAULT); } =20 object_property_add_alias(qdev_get_machine(), "rtc-time", OBJECT(isade= v), @@ -1020,7 +1020,7 @@ static void rtc_build_aml(ISADevice *isadev, Aml *sco= pe) crs =3D aml_resource_template(); aml_append(crs, aml_io(AML_DECODE16, RTC_ISA_BASE, RTC_ISA_BASE, 0x01, 0x08)); - aml_append(crs, aml_irq_no_flags(RTC_ISA_IRQ)); + aml_append(crs, aml_irq_no_flags(ISA_IRQ_RTC_DEFAULT)); =20 dev =3D aml_device("RTC"); aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0B00"))); diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index 05fd86af817..579a9faecf3 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -196,7 +196,7 @@ static void update_irq(struct HPETTimer *timer, int set) * timer0 be routed to IRQ0 in NON-APIC or IRQ2 in the I/O APIC, * timer1 be routed to IRQ8 in NON-APIC or IRQ8 in the I/O APIC. */ - route =3D (timer->tn =3D=3D 0) ? 0 : RTC_ISA_IRQ; + route =3D (timer->tn =3D=3D 0) ? 0 : ISA_IRQ_RTC_DEFAULT; } else { route =3D timer_int_route(timer); } @@ -615,11 +615,11 @@ static void hpet_ram_write(void *opaque, hwaddr addr, if (activating_bit(old_val, new_val, HPET_CFG_LEGACY)) { qemu_set_irq(s->pit_enabled, 0); qemu_irq_lower(s->irqs[0]); - qemu_irq_lower(s->irqs[RTC_ISA_IRQ]); + qemu_irq_lower(s->irqs[ISA_IRQ_RTC_DEFAULT]); } else if (deactivating_bit(old_val, new_val, HPET_CFG_LEGACY)= ) { qemu_irq_lower(s->irqs[0]); qemu_set_irq(s->pit_enabled, 1); - qemu_set_irq(s->irqs[RTC_ISA_IRQ], s->rtc_irq_level); + qemu_set_irq(s->irqs[ISA_IRQ_RTC_DEFAULT], s->rtc_irq_leve= l); } break; case HPET_CFG + 4: @@ -711,7 +711,7 @@ static void hpet_handle_legacy_irq(void *opaque, int n,= int level) } else { s->rtc_irq_level =3D level; if (!hpet_in_legacy_mode(s)) { - qemu_set_irq(s->irqs[RTC_ISA_IRQ], level); + qemu_set_irq(s->irqs[ISA_IRQ_RTC_DEFAULT], level); } } } diff --git a/tests/qtest/rtc-test.c b/tests/qtest/rtc-test.c index c7af34f6b1b..9ae90d4925c 100644 --- a/tests/qtest/rtc-test.c +++ b/tests/qtest/rtc-test.c @@ -278,7 +278,7 @@ static void alarm_time(void) /* set DEC mode */ cmos_write(RTC_REG_B, REG_B_24H | REG_B_DM); =20 - g_assert(!get_irq(RTC_ISA_IRQ)); + g_assert(!get_irq(ISA_IRQ_RTC_DEFAULT)); cmos_read(RTC_REG_C); =20 now.tm_sec =3D (now.tm_sec + 2) % 60; @@ -288,14 +288,14 @@ static void alarm_time(void) cmos_write(RTC_REG_B, cmos_read(RTC_REG_B) | REG_B_AIE); =20 for (i =3D 0; i < 2 + wiggle; i++) { - if (get_irq(RTC_ISA_IRQ)) { + if (get_irq(ISA_IRQ_RTC_DEFAULT)) { break; } =20 clock_step(1000000000); } =20 - g_assert(get_irq(RTC_ISA_IRQ)); + g_assert(get_irq(ISA_IRQ_RTC_DEFAULT)); g_assert((cmos_read(RTC_REG_C) & REG_C_AF) !=3D 0); g_assert(cmos_read(RTC_REG_C) =3D=3D 0); } @@ -645,7 +645,7 @@ static void uip_stuck(void) =20 static uint64_t wait_periodic_interrupt(uint64_t real_time) { - while (!get_irq(RTC_ISA_IRQ)) { + while (!get_irq(ISA_IRQ_RTC_DEFAULT)) { real_time =3D clock_step_next(); } =20 --=20 2.26.2