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[83.59.162.106]) by smtp.gmail.com with ESMTPSA id i11sm16786068wre.32.2020.10.10.10.26.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 10 Oct 2020 10:26:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tcSJN3WRYnSDrhVA+aXirUwwuRtaV2HQ16b4T6e3VA4=; b=RBGnDAlYMQWKKSWxw10Rs4ujxuZ9nfuKKS5hsDlQk+ZDWhCXTnqS+ZTlfTRd0x71yr 51sQvX6Yro7KZkldlYA6hYGboTSWFQBUl1MVC68yHnwgj6eixEAYUlY8bNmuS3qWVZA4 p0l6L//QDBnCfznY0O+u4BEjzi/B1tzlYvYe1pwS3N0NyU7l53pFKBhtxVIcL2zwSvgB eWG9l08RPoZ+gdn1KRPp71oht0GM2w7OHw/zLkUx6kxG2OqmESjV7EVMMASLQjUgHIWT yutpjWnCI/EbJlR1CR4VBz8y/rWquL3jlP3hb/VfXolE6VjvifU4Ojw91v4mhtTKPe+D Zx6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=tcSJN3WRYnSDrhVA+aXirUwwuRtaV2HQ16b4T6e3VA4=; b=Uc1qVXz84QjStADWc+263YAKKPzbeGQkAlIODvqkbJRG+Gr+/L6GaAIvHvCJwmpNut 8Hm9tcxIAhPuSMCA1u64GOlo5AIxX0HI848brBtn0fK9UeAWtNh38NTnPyZX2X07/JzI gaoOloXZpyxRTAcW4oLgPdT8HsggTRRoEC3dY/CnX/GJX8IyTnvHM7niIt+ofNqckRu4 3n5q8gu5APl2+h7WHDK5DTvGWtk3Z2GFZF6FN7/bs+2fZCa7sXt9o8BvxbTSZur0bGg0 7c9xiQNahYdui5d5GBoblB0DIzF0D4wPN2IkBV+tJ38Ed8UJanDSMeds5KHbh5TSfS+E X+WA== X-Gm-Message-State: AOAM531ZXOOIbpCwn8lhubRPGEjsa/gwtehAFHZB0wuEUSXzJXzLQRoK BmfPLjlm8dQHDA4XgUK5FEg= X-Google-Smtp-Source: ABdhPJzj+dRgzxxSVZnpEvSCsQnsx7f4noyXJeWW2BnXbTjyVHF5MHlH2Ph3Wo3CyzsNwAvwHYvaTg== X-Received: by 2002:adf:a50e:: with SMTP id i14mr17758194wrb.121.1602350801741; Sat, 10 Oct 2020 10:26:41 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Damien Hedde , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Huacai Chen , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini , Aurelien Jarno , Huacai Chen , Aleksandar Rikalo , Paul Burton , Jiaxun Yang , Luc Michel Subject: [PATCH v2 16/20] hw/mips/cps: Expose input clock and connect it to CPU cores Date: Sat, 10 Oct 2020 19:26:13 +0200 Message-Id: <20201010172617.3079633-17-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201010172617.3079633-1-f4bug@amsat.org> References: <20201010172617.3079633-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Expose a qdev input clock named 'clk', and connect it to each core. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/mips/cps.h | 2 ++ hw/mips/cps.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/include/hw/mips/cps.h b/include/hw/mips/cps.h index 9e35a881366..859a8d4a674 100644 --- a/include/hw/mips/cps.h +++ b/include/hw/mips/cps.h @@ -21,6 +21,7 @@ #define MIPS_CPS_H =20 #include "hw/sysbus.h" +#include "hw/clock.h" #include "hw/misc/mips_cmgcr.h" #include "hw/intc/mips_gic.h" #include "hw/misc/mips_cpc.h" @@ -43,6 +44,7 @@ struct MIPSCPSState { MIPSGICState gic; MIPSCPCState cpc; MIPSITUState itu; + Clock *clock; }; =20 qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number); diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 23c0f87e41a..c332609f7b3 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -22,6 +22,7 @@ #include "qemu/module.h" #include "hw/mips/cps.h" #include "hw/mips/mips.h" +#include "hw/qdev-clock.h" #include "hw/qdev-properties.h" #include "hw/mips/cpudevs.h" #include "sysemu/kvm.h" @@ -38,6 +39,7 @@ static void mips_cps_init(Object *obj) SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); MIPSCPSState *s =3D MIPS_CPS(obj); =20 + s->clock =3D qdev_init_clock_in(DEVICE(obj), "clk", NULL, NULL); /* * Cover entire address space as there do not seem to be any * constraints for the base address of CPC and GIC. @@ -80,6 +82,7 @@ static void mips_cps_realize(DeviceState *dev, Error **er= rp) errp)) { return; } + qdev_connect_clock_in(DEVICE(cpu), "clk", s->clock); =20 if (!qdev_realize_and_unref(DEVICE(cpu), NULL, errp)) { return; --=20 2.26.2