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v2: minor tweak to fix format string issue on Windows hosts... The following changes since commit 6eeea6725a70e6fcb5abba0764496bdab07ddfb3: Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-10-06' into staging (2020-10-06 21:13:34 +0100) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20201008-1 for you to fetch changes up to d1b6b7017572e8d82f26eb827a1dba0e8cf3cae6: target/arm: Make '-cpu max' have a 48-bit PA (2020-10-08 21:40:01 +0100) ---------------------------------------------------------------- target-arm queue: * hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer * hw/arm/fsl-imx25: Fix a typo * hw/arm/sbsa-ref : Fix SMMUv3 Initialisation * hw/arm/sbsa-ref : allocate IRQs for SMMUv3 * hw/char/bcm2835_aux: Allow less than 32-bit accesses * hw/arm/virt: Implement kvm-steal-time * target/arm: Make '-cpu max' have a 48-bit PA ---------------------------------------------------------------- Andrew Jones (6): linux headers: sync to 5.9-rc7 target/arm/kvm: Make uncalled stubs explicitly unreachable hw/arm/virt: Move post cpu realize check into its own function hw/arm/virt: Move kvm pmu setup to virt_cpu_post_init tests/qtest: Restore aarch64 arm-cpu-features test hw/arm/virt: Implement kvm-steal-time Graeme Gregory (2): hw/arm/sbsa-ref : Fix SMMUv3 Initialisation hw/arm/sbsa-ref : allocate IRQs for SMMUv3 Peter Maydell (1): target/arm: Make '-cpu max' have a 48-bit PA Philippe Mathieu-Daudé (3): hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer hw/arm/fsl-imx25: Fix a typo hw/char/bcm2835_aux: Allow less than 32-bit accesses docs/system/arm/cpu-features.rst | 11 ++++ include/hw/arm/fsl-imx25.h | 2 +- include/hw/arm/virt.h | 5 ++ linux-headers/linux/kvm.h | 6 ++- target/arm/cpu.h | 4 ++ target/arm/kvm_arm.h | 94 ++++++++++++++++++++++++++------- hw/arm/sbsa-ref.c | 3 +- hw/arm/virt.c | 111 ++++++++++++++++++++++++++++----------- hw/char/bcm2835_aux.c | 4 +- hw/ssi/npcm7xx_fiu.c | 12 ++--- target/arm/cpu.c | 8 +++ target/arm/cpu64.c | 4 ++ target/arm/kvm.c | 16 ++++++ target/arm/kvm64.c | 64 ++++++++++++++++++++-- target/arm/monitor.c | 2 +- tests/qtest/arm-cpu-features.c | 25 +++++++-- hw/ssi/trace-events | 2 +- tests/qtest/meson.build | 3 +- 18 files changed, 304 insertions(+), 72 deletions(-)
v3->v4: Windows headers define an INT type which clashed with an enum value name in arm_gicv3_its.c... The following changes since commit eae587e8e3694b1aceab23239493fb4c7e1a80f5: Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-09-13' into staging (2021-09-13 11:00:30 +0100) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210913-3 for you to fetch changes up to 28e987a7e7edaa3ca7feeac65edca26145df8814: hw/arm/mps2.c: Mark internal-only I2C buses as 'full' (2021-09-13 21:01:08 +0100) ---------------------------------------------------------------- target-arm queue: * mark MPS2/MPS3 board-internal i2c buses as 'full' so that command line user-created devices are not plugged into them * Take an exception if PSTATE.IL is set * Support an emulated ITS in the virt board * Add support for kudo-bmc board * Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM * cadence_uart: Fix clock handling issues that prevented u-boot from running ---------------------------------------------------------------- Bin Meng (6): hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase hw/char: cadence_uart: Disable transmit when input clock is disabled hw/char: cadence_uart: Move clock/reset check to uart_can_receive() hw/char: cadence_uart: Convert to memop_with_attrs() ops hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}() hw/char: cadence_uart: Log a guest error when device is unclocked or in reset Chris Rauer (1): hw/arm: Add support for kudo-bmc board. Marc Zyngier (1): hw/arm/virt: KVM: Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM Peter Maydell (5): target/arm: Take an exception if PSTATE.IL is set qdev: Support marking individual buses as 'full' hw/arm/mps2-tz.c: Add extra data parameter to MakeDevFn hw/arm/mps2-tz.c: Mark internal-only I2C buses as 'full' hw/arm/mps2.c: Mark internal-only I2C buses as 'full' Richard Henderson (1): target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn Shashi Mallela (9): hw/intc: GICv3 ITS initial framework hw/intc: GICv3 ITS register definitions added hw/intc: GICv3 ITS command queue framework hw/intc: GICv3 ITS Command processing hw/intc: GICv3 ITS Feature enablement hw/intc: GICv3 redistributor ITS processing tests/data/acpi/virt: Add IORT files for ITS hw/arm/virt: add ITS support in virt GIC tests/data/acpi/virt: Update IORT files for ITS docs/system/arm/nuvoton.rst | 1 + hw/intc/gicv3_internal.h | 188 ++++- include/hw/arm/virt.h | 2 + include/hw/intc/arm_gicv3_common.h | 13 + include/hw/intc/arm_gicv3_its_common.h | 32 +- include/hw/qdev-core.h | 24 + target/arm/cpu.h | 1 + target/arm/kvm_arm.h | 4 +- target/arm/syndrome.h | 5 + target/arm/translate.h | 2 + hw/arm/mps2-tz.c | 92 ++- hw/arm/mps2.c | 12 +- hw/arm/npcm7xx_boards.c | 34 + hw/arm/virt.c | 29 +- hw/char/cadence_uart.c | 61 +- hw/intc/arm_gicv3.c | 14 + hw/intc/arm_gicv3_common.c | 13 + hw/intc/arm_gicv3_cpuif.c | 7 +- hw/intc/arm_gicv3_dist.c | 5 +- hw/intc/arm_gicv3_its.c | 1322 ++++++++++++++++++++++++++++++++ hw/intc/arm_gicv3_its_common.c | 7 +- hw/intc/arm_gicv3_its_kvm.c | 2 +- hw/intc/arm_gicv3_redist.c | 153 +++- hw/misc/zynq_slcr.c | 31 +- softmmu/qdev-monitor.c | 7 +- target/arm/helper-a64.c | 1 + target/arm/helper.c | 8 + target/arm/kvm.c | 7 +- target/arm/translate-a64.c | 255 +++--- target/arm/translate.c | 21 + hw/intc/meson.build | 1 + tests/data/acpi/virt/IORT | Bin 0 -> 124 bytes tests/data/acpi/virt/IORT.memhp | Bin 0 -> 124 bytes tests/data/acpi/virt/IORT.numamem | Bin 0 -> 124 bytes tests/data/acpi/virt/IORT.pxb | Bin 0 -> 124 bytes 35 files changed, 2144 insertions(+), 210 deletions(-) create mode 100644 hw/intc/arm_gicv3_its.c create mode 100644 tests/data/acpi/virt/IORT create mode 100644 tests/data/acpi/virt/IORT.memhp create mode 100644 tests/data/acpi/virt/IORT.numamem create mode 100644 tests/data/acpi/virt/IORT.pxb