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bh=O5LL8q/2/fYroPAnPlRxXhjr9kLnq96BHsc32E/y/I0=; b=Cn3zvwN9qt16bmuqA0T8aoJ3DjE9bVyKHyJXHO9cIkr4FyDUDGGlOsWYn0SCTxyxDkmyiB c2B4lwitTIkC0cDAF9l8c0FZY0H6cul4LIV3J6YfARK36SbDkpdTtJJeWUdgVXRNKtogEw kpFLKd746aMgasA42raDPJ9vCC6eElI= X-MC-Unique: RAdtGYJUO3GyiZVfQs6PxQ-1 From: John Snow To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 1/9] MAINTAINERS: Update my git address Date: Thu, 1 Oct 2020 13:46:41 -0400 Message-Id: <20201001174649.1911016-2-jsnow@redhat.com> In-Reply-To: <20201001174649.1911016-1-jsnow@redhat.com> References: <20201001174649.1911016-1-jsnow@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=jsnow@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" I am switching from github to gitlab. Signed-off-by: John Snow --- MAINTAINERS | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index ade11002022..b76fb31861b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1577,7 +1577,7 @@ F: tests/qtest/ide-test.c F: tests/qtest/ahci-test.c F: tests/qtest/cdrom-test.c F: tests/qtest/libqos/ahci* -T: git https://github.com/jnsnow/qemu.git ide +T: git https://gitlab.com/jsnow/qemu.git ide =20 IPMI M: Corey Minyard @@ -1595,7 +1595,7 @@ S: Supported F: hw/block/fdc.c F: include/hw/block/fdc.h F: tests/qtest/fdc-test.c -T: git https://github.com/jnsnow/qemu.git ide +T: git https://gitlab.com/jsnow/qemu.git ide =20 OMAP M: Peter Maydell @@ -2169,7 +2169,7 @@ F: block/commit.c F: block/stream.c F: block/mirror.c F: qapi/job.json -T: git https://github.com/jnsnow/qemu.git jobs +T: git https://gitlab.com/jsnow/qemu.git jobs =20 Block QAPI, monitor, command line M: Markus Armbruster --=20 2.26.2 From nobody Sun May 19 16:27:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 01 Oct 2020 13:47:07 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-29-2Nq6EXG2PQO_uDQ495g0UQ-1; Thu, 01 Oct 2020 13:46:58 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id A7925801AC2; Thu, 1 Oct 2020 17:46:56 +0000 (UTC) Received: from scv.redhat.com (ovpn-120-38.rdu2.redhat.com [10.10.120.38]) by smtp.corp.redhat.com (Postfix) with ESMTP id 300545C1CF; Thu, 1 Oct 2020 17:46:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601574422; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cmimizovWQ8kEMBX0Xd3BqYrtymzyrFOHBYXTZjWNPQ=; b=E7FB30Wye4yIBn6RZCJz9upgsYT9NiqsXfEW09dW/4TkzZ09Hvfk9KttqW17ceVl5WN9I/ 5Dbdiy4kIVdbRpWv9vk3nb6ukZ7MvzSw0ovl/q0wQVvfxcv0oOHDQmvo/7dPkA4x/x3jxp crMFaueM+xg4NTsg69vS2By8bYbwyos= X-MC-Unique: 2Nq6EXG2PQO_uDQ495g0UQ-1 From: John Snow To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 2/9] hw/ide/ahci: Do not dma_memory_unmap(NULL) Date: Thu, 1 Oct 2020 13:46:42 -0400 Message-Id: <20201001174649.1911016-3-jsnow@redhat.com> In-Reply-To: <20201001174649.1911016-1-jsnow@redhat.com> References: <20201001174649.1911016-1-jsnow@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=jsnow@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.205.24.124; envelope-from=jsnow@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/01 04:25:37 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexander Bulekov , John Snow , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Philippe Mathieu-Daud=C3=A9 libFuzzer triggered the following assertion: cat << EOF | qemu-system-i386 -M pc-q35-5.0 \ -nographic -monitor none -serial none -qtest stdio outl 0xcf8 0x8000fa24 outl 0xcfc 0xe1068000 outl 0xcf8 0x8000fa04 outw 0xcfc 0x7 outl 0xcf8 0x8000fb20 write 0xe1068304 0x1 0x21 write 0xe1068318 0x1 0x21 write 0xe1068384 0x1 0x21 write 0xe1068398 0x2 0x21 EOF qemu-system-i386: exec.c:3621: address_space_unmap: Assertion `mr !=3D NU= LL' failed. Aborted (core dumped) This is because we don't check the return value from dma_memory_map() which can return NULL, then we call dma_memory_unmap(NULL) which is illegal. Fix by only unmap if the value is not NULL (and the size is not the expected one). Cc: qemu-stable@nongnu.org Reported-by: Alexander Bulekov Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200718072854.7001-1-f4bug@amsat.org Fixes: f6ad2e32f8 ("ahci: add ahci emulation") BugLink: https://bugs.launchpad.net/qemu/+bug/1884693 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: John Snow Signed-off-by: John Snow --- hw/ide/ahci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index ee1d47ff756..680304a24c3 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -250,7 +250,7 @@ static void map_page(AddressSpace *as, uint8_t **ptr, u= int64_t addr, } =20 *ptr =3D dma_memory_map(as, addr, &len, DMA_DIRECTION_FROM_DEVICE); - if (len < wanted) { + if (len < wanted && *ptr) { dma_memory_unmap(as, *ptr, len, DMA_DIRECTION_FROM_DEVICE, len); *ptr =3D NULL; } --=20 2.26.2 From nobody Sun May 19 16:27:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 01 Oct 2020 13:46:58 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 652C0801ADA; Thu, 1 Oct 2020 17:46:57 +0000 (UTC) Received: from scv.redhat.com (ovpn-120-38.rdu2.redhat.com [10.10.120.38]) by smtp.corp.redhat.com (Postfix) with ESMTP id CBF3E5C1CF; Thu, 1 Oct 2020 17:46:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601574420; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hFnF9scAiMQ534Ar+rYpee7FQAMrzoQLMyIExVO/PwY=; b=dfAZnUABKqRJubwaQi/IcriwgQIr4BxTQEAzeEvSll8oRg/3JuCkhRYZ6dhfnQz6EtypGE jWb7IeXp4kPc0AGRvGOXNk7WvxpKp3tyi29tu2bK61m3iZFGWJAgruZxYIsELBtc9musIE dyRxVEYl2cHUNTPk5hQhtVvAHjQJAlQ= X-MC-Unique: EPdD8JVTNeGz7IL5Z_jIKw-1 From: John Snow To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 3/9] ide: rename cmd_write to ctrl_write Date: Thu, 1 Oct 2020 13:46:43 -0400 Message-Id: <20201001174649.1911016-4-jsnow@redhat.com> In-Reply-To: <20201001174649.1911016-1-jsnow@redhat.com> References: <20201001174649.1911016-1-jsnow@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=jsnow@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.205.24.124; envelope-from=jsnow@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/01 04:25:37 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , John Snow , qemu-block@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) It's the Control register, part of the Control block -- Command is misleading here. Rename all related functions and constants. Signed-off-by: John Snow Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/ide/internal.h | 9 +++++---- hw/ide/core.c | 12 ++++++------ hw/ide/ioport.c | 2 +- hw/ide/macio.c | 2 +- hw/ide/mmio.c | 8 ++++---- hw/ide/pci.c | 12 ++++++------ hw/ide/trace-events | 2 +- 7 files changed, 24 insertions(+), 23 deletions(-) diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index 8a95ad8c4d3..a23bb2f3481 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -57,8 +57,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS) #define REL 0x04 #define TAG_MASK 0xf8 =20 -#define IDE_CMD_RESET 0x04 -#define IDE_CMD_DISABLE_IRQ 0x02 +/* Bits of Device Control register */ +#define IDE_CTRL_RESET 0x04 +#define IDE_CTRL_DISABLE_IRQ 0x02 =20 /* ACS-2 T13/2015-D Table B.2 Command codes */ #define WIN_NOP 0x00 @@ -559,7 +560,7 @@ static inline IDEState *idebus_active_if(IDEBus *bus) =20 static inline void ide_set_irq(IDEBus *bus) { - if (!(bus->cmd & IDE_CMD_DISABLE_IRQ)) { + if (!(bus->cmd & IDE_CTRL_DISABLE_IRQ)) { qemu_irq_raise(bus->irq); } } @@ -598,7 +599,7 @@ void ide_atapi_io_error(IDEState *s, int ret); void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val); uint32_t ide_ioport_read(void *opaque, uint32_t addr1); uint32_t ide_status_read(void *opaque, uint32_t addr); -void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val); +void ide_ctrl_write(void *opaque, uint32_t addr, uint32_t val); void ide_data_writew(void *opaque, uint32_t addr, uint32_t val); uint32_t ide_data_readw(void *opaque, uint32_t addr); void ide_data_writel(void *opaque, uint32_t addr, uint32_t val); diff --git a/hw/ide/core.c b/hw/ide/core.c index f76f7e5234b..84499e2241c 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -2235,25 +2235,25 @@ uint32_t ide_status_read(void *opaque, uint32_t add= r) return ret; } =20 -void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val) +void ide_ctrl_write(void *opaque, uint32_t addr, uint32_t val) { IDEBus *bus =3D opaque; IDEState *s; int i; =20 - trace_ide_cmd_write(addr, val, bus); + trace_ide_ctrl_write(addr, val, bus); =20 /* common for both drives */ - if (!(bus->cmd & IDE_CMD_RESET) && - (val & IDE_CMD_RESET)) { + if (!(bus->cmd & IDE_CTRL_RESET) && + (val & IDE_CTRL_RESET)) { /* reset low to high */ for(i =3D 0;i < 2; i++) { s =3D &bus->ifs[i]; s->status =3D BUSY_STAT | SEEK_STAT; s->error =3D 0x01; } - } else if ((bus->cmd & IDE_CMD_RESET) && - !(val & IDE_CMD_RESET)) { + } else if ((bus->cmd & IDE_CTRL_RESET) && + !(val & IDE_CTRL_RESET)) { /* high to low */ for(i =3D 0;i < 2; i++) { s =3D &bus->ifs[i]; diff --git a/hw/ide/ioport.c b/hw/ide/ioport.c index ab1f4e5d9c0..b613ff3bbaf 100644 --- a/hw/ide/ioport.c +++ b/hw/ide/ioport.c @@ -46,7 +46,7 @@ static const MemoryRegionPortio ide_portio_list[] =3D { }; =20 static const MemoryRegionPortio ide_portio2_list[] =3D { - { 0, 1, 1, .read =3D ide_status_read, .write =3D ide_cmd_write }, + { 0, 1, 1, .read =3D ide_status_read, .write =3D ide_ctrl_write }, PORTIO_END_OF_LIST(), }; =20 diff --git a/hw/ide/macio.c b/hw/ide/macio.c index 62a599a0751..b270a101632 100644 --- a/hw/ide/macio.c +++ b/hw/ide/macio.c @@ -329,7 +329,7 @@ static void pmac_ide_write(void *opaque, hwaddr addr, u= int64_t val, case 0x8: case 0x16: if (size =3D=3D 1) { - ide_cmd_write(&d->bus, 0, val); + ide_ctrl_write(&d->bus, 0, val); } break; case 0x20: diff --git a/hw/ide/mmio.c b/hw/ide/mmio.c index 4bf6e3a8b76..36e2f4790ab 100644 --- a/hw/ide/mmio.c +++ b/hw/ide/mmio.c @@ -98,16 +98,16 @@ static uint64_t mmio_ide_status_read(void *opaque, hwad= dr addr, return ide_status_read(&s->bus, 0); } =20 -static void mmio_ide_cmd_write(void *opaque, hwaddr addr, - uint64_t val, unsigned size) +static void mmio_ide_ctrl_write(void *opaque, hwaddr addr, + uint64_t val, unsigned size) { MMIOState *s =3D opaque; - ide_cmd_write(&s->bus, 0, val); + ide_ctrl_write(&s->bus, 0, val); } =20 static const MemoryRegionOps mmio_ide_cs_ops =3D { .read =3D mmio_ide_status_read, - .write =3D mmio_ide_cmd_write, + .write =3D mmio_ide_ctrl_write, .endianness =3D DEVICE_LITTLE_ENDIAN, }; =20 diff --git a/hw/ide/pci.c b/hw/ide/pci.c index b50091b615c..84ba733548e 100644 --- a/hw/ide/pci.c +++ b/hw/ide/pci.c @@ -38,7 +38,7 @@ (IDE_RETRY_DMA | IDE_RETRY_PIO | \ IDE_RETRY_READ | IDE_RETRY_FLUSH) =20 -static uint64_t pci_ide_cmd_read(void *opaque, hwaddr addr, unsigned size) +static uint64_t pci_ide_status_read(void *opaque, hwaddr addr, unsigned si= ze) { IDEBus *bus =3D opaque; =20 @@ -48,20 +48,20 @@ static uint64_t pci_ide_cmd_read(void *opaque, hwaddr a= ddr, unsigned size) return ide_status_read(bus, addr + 2); } =20 -static void pci_ide_cmd_write(void *opaque, hwaddr addr, - uint64_t data, unsigned size) +static void pci_ide_ctrl_write(void *opaque, hwaddr addr, + uint64_t data, unsigned size) { IDEBus *bus =3D opaque; =20 if (addr !=3D 2 || size !=3D 1) { return; } - ide_cmd_write(bus, addr + 2, data); + ide_ctrl_write(bus, addr + 2, data); } =20 const MemoryRegionOps pci_ide_cmd_le_ops =3D { - .read =3D pci_ide_cmd_read, - .write =3D pci_ide_cmd_write, + .read =3D pci_ide_status_read, + .write =3D pci_ide_ctrl_write, .endianness =3D DEVICE_LITTLE_ENDIAN, }; =20 diff --git a/hw/ide/trace-events b/hw/ide/trace-events index 2e4162629f4..6e357685f9b 100644 --- a/hw/ide/trace-events +++ b/hw/ide/trace-events @@ -5,7 +5,7 @@ ide_ioport_read(uint32_t addr, const char *reg, uint32_t val, void *bus, v= oid *s) "IDE PIO rd @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus %p IDEState= %p" ide_ioport_write(uint32_t addr, const char *reg, uint32_t val, void *bus, = void *s) "IDE PIO wr @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus %p IDEState= %p" ide_status_read(uint32_t addr, uint32_t val, void *bus, void *s) = "IDE PIO rd @ 0x%"PRIx32" (Alt Status); val 0x%02"PRIx32"; bus %p;= IDEState %p" -ide_cmd_write(uint32_t addr, uint32_t val, void *bus) = "IDE PIO wr @ 0x%"PRIx32" (Device Control); val 0x%02"PRIx32"; bus= %p" +ide_ctrl_write(uint32_t addr, uint32_t val, void *bus) = "IDE PIO wr @ 0x%"PRIx32" (Device Control); val 0x%02"PRIx32"; bus= %p" # Warning: verbose ide_data_readw(uint32_t addr, uint32_t val, void *bus, void *s) = "IDE PIO rd @ 0x%"PRIx32" (Data: Word); val 0x%04"PRIx32"; bus %p;= IDEState %p" ide_data_writew(uint32_t addr, uint32_t val, void *bus, void *s) = "IDE PIO wr @ 0x%"PRIx32" (Data: Word); val 0x%04"PRIx32"; bus %p;= IDEState %p" --=20 2.26.2 From nobody Sun May 19 16:27:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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bh=GzRa9z7IwW/DNPxxsmhM08wyOERdOGuR8hCGrdYJgqY=; b=PhAbw1aUEvRIKZ/jK3MgqgUX702VzgltuhNaWZqrYXIHZ8/cSKJLhbGlTmfCuCJjgRnjal WyB+t6GEO4hYewdm9CbpZZbHZVfN6bidKKVMnrcrpBldsiY+5apwFhD+r0Uk1B5yC+6dKq GkvPECtCbn1UCPWmbuzw05PiqbzJJ+M= X-MC-Unique: n72ru4lZPcKTwLdR-pyzuQ-1 From: John Snow To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 4/9] ide: don't tamper with the device register Date: Thu, 1 Oct 2020 13:46:44 -0400 Message-Id: <20201001174649.1911016-5-jsnow@redhat.com> In-Reply-To: <20201001174649.1911016-1-jsnow@redhat.com> References: <20201001174649.1911016-1-jsnow@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=jsnow@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" In real ISA operation, register writes go out to an entire bus channel and all listening devices receive the write. The devices do not toggle the DEV bit based on their own configuration, nor does the HBA intermediate or tamper with that value. The reality of the matter is that DEV0/DEV1 accordingly will react to command register writes based on whether or not the device was selected. This does not fix a known bug, but it makes the code slightly simpler and more obvious. Signed-off-by: John Snow --- hw/ide/core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/ide/core.c b/hw/ide/core.c index 84499e2241c..29dc5dc4b45 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -1297,8 +1297,8 @@ void ide_ioport_write(void *opaque, uint32_t addr, ui= nt32_t val) break; case ATA_IOPORT_WR_DEVICE_HEAD: /* FIXME: HOB readback uses bit 7 */ - bus->ifs[0].select =3D (val & ~0x10) | 0xa0; - bus->ifs[1].select =3D (val | 0x10) | 0xa0; + bus->ifs[0].select =3D val | 0xa0; + bus->ifs[1].select =3D val | 0xa0; /* select drive */ bus->unit =3D (val >> 4) & 1; break; --=20 2.26.2 From nobody Sun May 19 16:27:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1601577500; cv=none; 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Thu, 1 Oct 2020 17:46:59 +0000 (UTC) Received: from scv.redhat.com (ovpn-120-38.rdu2.redhat.com [10.10.120.38]) by smtp.corp.redhat.com (Postfix) with ESMTP id B3A3E5C1CF; Thu, 1 Oct 2020 17:46:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601574422; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Hsx9Nql06fYoiWOehfxk009P/c16XD32+LqOt/kOyJA=; b=AxZHTl5fX+iYfGKjzeFyFD+C7skXy0IqmFGS5Tpu6qVJjAMSCyHM6O/EMa0wGtu3kklp6R +2UjLjS0diorcgt2L/+jqt/gaAs5gYSemjR44qy71lP+HUBbiiVviHAkL+QA+fjPQfYy/z IrmAFfMXELu4HFqVOwExDbJrvv50QzM= X-MC-Unique: XK7JhAEZPlSmkHF-SCZ0Sw-1 From: John Snow To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 5/9] ide: model HOB correctly Date: Thu, 1 Oct 2020 13:46:45 -0400 Message-Id: <20201001174649.1911016-6-jsnow@redhat.com> In-Reply-To: <20201001174649.1911016-1-jsnow@redhat.com> References: <20201001174649.1911016-1-jsnow@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; 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charset="utf-8" I have been staring at this FIXME for years and I never knew what it meant. I finally stumbled across it! When writing to the command registers, the old value is shifted into a HOB copy of the register and the new value is written into the primary register. When reading registers, the value retrieved is dependent on the HOB bit in the CONTROL register. By setting bit 7 (0x80) in CONTROL, any register read will, if it has one, yield the HOB value for that register instead. Our code has a problem: We were using bit 7 of the DEVICE register to model this. We use bus->cmd roughly as the control register already, as it stores the value from ide_ctrl_write. Lastly, all command register writes reset the HOB, so fix that, too. Signed-off-by: John Snow --- include/hw/ide/internal.h | 1 + hw/ide/core.c | 15 +++++++-------- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index a23bb2f3481..5b7b0e47e60 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -58,6 +58,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS) #define TAG_MASK 0xf8 =20 /* Bits of Device Control register */ +#define IDE_CTRL_HOB 0x80 #define IDE_CTRL_RESET 0x04 #define IDE_CTRL_DISABLE_IRQ 0x02 =20 diff --git a/hw/ide/core.c b/hw/ide/core.c index 29dc5dc4b45..6ececa5dfee 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -1215,8 +1215,7 @@ static void ide_cmd_lba48_transform(IDEState *s, int = lba48) static void ide_clear_hob(IDEBus *bus) { /* any write clears HOB high bit of device control register */ - bus->ifs[0].select &=3D ~(1 << 7); - bus->ifs[1].select &=3D ~(1 << 7); + bus->cmd &=3D ~(IDE_CTRL_HOB); } =20 /* IOport [W]rite [R]egisters */ @@ -1256,12 +1255,14 @@ void ide_ioport_write(void *opaque, uint32_t addr, = uint32_t val) return; } =20 + /* NOTE: Device0 and Device1 both receive incoming register writes. + * (They're on the same bus! They have to!) */ + switch (reg_num) { case 0: break; case ATA_IOPORT_WR_FEATURES: ide_clear_hob(bus); - /* NOTE: data is written to the two drives */ bus->ifs[0].hob_feature =3D bus->ifs[0].feature; bus->ifs[1].hob_feature =3D bus->ifs[1].feature; bus->ifs[0].feature =3D val; @@ -1296,7 +1297,7 @@ void ide_ioport_write(void *opaque, uint32_t addr, ui= nt32_t val) bus->ifs[1].hcyl =3D val; break; case ATA_IOPORT_WR_DEVICE_HEAD: - /* FIXME: HOB readback uses bit 7 */ + ide_clear_hob(bus); bus->ifs[0].select =3D val | 0xa0; bus->ifs[1].select =3D val | 0xa0; /* select drive */ @@ -1304,7 +1305,7 @@ void ide_ioport_write(void *opaque, uint32_t addr, ui= nt32_t val) break; default: case ATA_IOPORT_WR_COMMAND: - /* command */ + ide_clear_hob(bus); ide_exec_cmd(bus, val); break; } @@ -2142,9 +2143,7 @@ uint32_t ide_ioport_read(void *opaque, uint32_t addr) int ret, hob; =20 reg_num =3D addr & 7; - /* FIXME: HOB readback uses bit 7, but it's always set right now */ - //hob =3D s->select & (1 << 7); - hob =3D 0; + hob =3D bus->cmd & (IDE_CTRL_HOB); switch (reg_num) { case ATA_IOPORT_RR_DATA: ret =3D 0xff; --=20 2.26.2 From nobody Sun May 19 16:27:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1601576700; cv=none; d=zohomail.com; s=zohoarc; b=mK/7sNS3OMIuF7ssF7mE11driP9PfD4vVCyUx5s85v6kPp6ss5Dj68wtnjs8b9iEaJOIyPPXXJkYtMwRqAeKh9eHGSMbmH4aY4o0n2OjX4vKYNgDeqQw2K5FtVlAkJhZSm7hDLFEBi2/7uL9wz6fiYgmfaANuugszCQDwVtknrQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1601576700; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=bKSXHVbVdVKVvM5LeQ2m/fbuOAoZlx3FTE3Me/SJ4yY=; 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s=mimecast20190719; t=1601574427; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bKSXHVbVdVKVvM5LeQ2m/fbuOAoZlx3FTE3Me/SJ4yY=; b=XBiZEY93E58YEMu3ejwOMbTBsbWC9G1ch5V9QRHOOF7aw+ruRBvts2CZvolqA6ndT0QUoe M4jFSNrNo41cHjh2hQ3KnmLNHA478k/jVZLtcxugBtPqRgH2NFe0WZy4bEKFme89jSpCn+ pO9L/r+vAL4V35a4DUkj/QxS9YChni8= X-MC-Unique: s7WiZU4oNfO-m8MGU_5jrA-1 From: John Snow To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 6/9] ide: reorder set/get sector functions Date: Thu, 1 Oct 2020 13:46:46 -0400 Message-Id: <20201001174649.1911016-7-jsnow@redhat.com> In-Reply-To: <20201001174649.1911016-1-jsnow@redhat.com> References: <20201001174649.1911016-1-jsnow@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=jsnow@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.205.24.124; envelope-from=jsnow@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/01 04:25:37 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , John Snow , qemu-block@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Reorder these just a pinch to make them more obvious at a glance what the addressing mode is. Signed-off-by: John Snow Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/ide/core.c | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) diff --git a/hw/ide/core.c b/hw/ide/core.c index 6ececa5dfee..afff355e5c6 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -587,21 +587,23 @@ int64_t ide_get_sector(IDEState *s) { int64_t sector_num; if (s->select & 0x40) { - /* lba */ - if (!s->lba48) { - sector_num =3D ((s->select & 0x0f) << 24) | (s->hcyl << 16) | - (s->lcyl << 8) | s->sector; - } else { + if (s->lba48) { sector_num =3D ((int64_t)s->hob_hcyl << 40) | ((int64_t) s->hob_lcyl << 32) | ((int64_t) s->hob_sector << 24) | ((int64_t) s->hcyl << 16) | ((int64_t) s->lcyl << 8) | s->sector; + } else { + /* LBA28 */ + sector_num =3D ((s->select & 0x0f) << 24) | (s->hcyl << 16) | + (s->lcyl << 8) | s->sector; } } else { + /* CHS */ sector_num =3D ((s->hcyl << 8) | s->lcyl) * s->heads * s->sectors + (s->select & 0x0f) * s->sectors + (s->sector - 1); } + return sector_num; } =20 @@ -609,20 +611,22 @@ void ide_set_sector(IDEState *s, int64_t sector_num) { unsigned int cyl, r; if (s->select & 0x40) { - if (!s->lba48) { - s->select =3D (s->select & 0xf0) | (sector_num >> 24); - s->hcyl =3D (sector_num >> 16); - s->lcyl =3D (sector_num >> 8); - s->sector =3D (sector_num); - } else { + if (s->lba48) { s->sector =3D sector_num; s->lcyl =3D sector_num >> 8; s->hcyl =3D sector_num >> 16; s->hob_sector =3D sector_num >> 24; s->hob_lcyl =3D sector_num >> 32; s->hob_hcyl =3D sector_num >> 40; + } else { + /* LBA28 */ + s->select =3D (s->select & 0xf0) | (sector_num >> 24); + s->hcyl =3D (sector_num >> 16); + s->lcyl =3D (sector_num >> 8); + s->sector =3D (sector_num); } } else { + /* CHS */ cyl =3D sector_num / (s->heads * s->sectors); r =3D sector_num % (s->heads * s->sectors); s->hcyl =3D cyl >> 8; --=20 2.26.2 From nobody Sun May 19 16:27:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 01 Oct 2020 13:47:02 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 48CCC801AF6; Thu, 1 Oct 2020 17:47:01 +0000 (UTC) Received: from scv.redhat.com (ovpn-120-38.rdu2.redhat.com [10.10.120.38]) by smtp.corp.redhat.com (Postfix) with ESMTP id C68235C1CF; Thu, 1 Oct 2020 17:47:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601574424; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xb25lG+d7LBHIhF0zG8Hh1bU27aibEmQRHXuEo87TmM=; b=MDbs/FwIewlFaKizkfKT+qBA78nxIVQKDdss3li2TMfeGGSNfOxyB/ozUfbpaRHGmz2dsJ 4saR8u7LpkLQFMjCj9ZYxASWxqqxw9hZvtRtjZoqtpKbP7o0VY16EOqZ7QnfW6kSb2m+kh 3xlcZQxFDZR5JKBix0fYHiU1rxWvlHo= X-MC-Unique: U965u9ivPo6AL3GFiINPGw-1 From: John Snow To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 7/9] ide: remove magic constants from the device register Date: Thu, 1 Oct 2020 13:46:47 -0400 Message-Id: <20201001174649.1911016-8-jsnow@redhat.com> In-Reply-To: <20201001174649.1911016-1-jsnow@redhat.com> References: <20201001174649.1911016-1-jsnow@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; 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charset="utf-8" (In QEMU, we call this the "select" register.) My memory isn't good enough to memorize what these magic runes do. Label them to prevent mixups from happening in the future. Side note: I assume it's safe to always set 0xA0 even though ATA2 claims these bits are reserved, because ATA3 immediately reinstated that these bits should be always on. ATA4 and subsequent specs only claim that the fields are obsolete, so I assume it's safe to leave these set and that it should work with the widest array of guests. Signed-off-by: John Snow --- include/hw/ide/internal.h | 11 +++++++++++ hw/ide/core.c | 26 ++++++++++++++------------ 2 files changed, 25 insertions(+), 12 deletions(-) diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index 5b7b0e47e60..2d09162eeb7 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -29,6 +29,17 @@ OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS) =20 #define MAX_IDE_DEVS 2 =20 +/* Device/Head ("select") Register */ +#define ATA_DEV_SELECT 0x10 +/* ATA1,3: Defined as '1'. + * ATA2: Reserved. + * ATA3-7: obsolete. */ +#define ATA_DEV_ALWAYS_ON 0xA0 +#define ATA_DEV_LBA 0x40 +#define ATA_DEV_LBA_MSB 0x0F /* LBA 24:27 */ +#define ATA_DEV_HS 0x0F /* HS 3:0 */ + + /* Bits of HD_STATUS */ #define ERR_STAT 0x01 #define INDEX_STAT 0x02 diff --git a/hw/ide/core.c b/hw/ide/core.c index afff355e5c6..8a55352e4b2 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -367,7 +367,7 @@ fill_buffer: =20 static void ide_set_signature(IDEState *s) { - s->select &=3D 0xf0; /* clear head */ + s->select &=3D ~(ATA_DEV_HS); /* clear head */ /* put signature */ s->nsector =3D 1; s->sector =3D 1; @@ -586,7 +586,7 @@ void ide_transfer_stop(IDEState *s) int64_t ide_get_sector(IDEState *s) { int64_t sector_num; - if (s->select & 0x40) { + if (s->select & (ATA_DEV_LBA)) { if (s->lba48) { sector_num =3D ((int64_t)s->hob_hcyl << 40) | ((int64_t) s->hob_lcyl << 32) | @@ -595,13 +595,13 @@ int64_t ide_get_sector(IDEState *s) ((int64_t) s->lcyl << 8) | s->sector; } else { /* LBA28 */ - sector_num =3D ((s->select & 0x0f) << 24) | (s->hcyl << 16) | - (s->lcyl << 8) | s->sector; + sector_num =3D ((s->select & (ATA_DEV_LBA_MSB)) << 24) | + (s->hcyl << 16) | (s->lcyl << 8) | s->sector; } } else { /* CHS */ sector_num =3D ((s->hcyl << 8) | s->lcyl) * s->heads * s->sectors + - (s->select & 0x0f) * s->sectors + (s->sector - 1); + (s->select & (ATA_DEV_HS)) * s->sectors + (s->sector - 1); } =20 return sector_num; @@ -610,7 +610,7 @@ int64_t ide_get_sector(IDEState *s) void ide_set_sector(IDEState *s, int64_t sector_num) { unsigned int cyl, r; - if (s->select & 0x40) { + if (s->select & (ATA_DEV_LBA)) { if (s->lba48) { s->sector =3D sector_num; s->lcyl =3D sector_num >> 8; @@ -620,7 +620,8 @@ void ide_set_sector(IDEState *s, int64_t sector_num) s->hob_hcyl =3D sector_num >> 40; } else { /* LBA28 */ - s->select =3D (s->select & 0xf0) | (sector_num >> 24); + s->select =3D (s->select & ~(ATA_DEV_LBA_MSB)) | + ((sector_num >> 24) & (ATA_DEV_LBA_MSB)); s->hcyl =3D (sector_num >> 16); s->lcyl =3D (sector_num >> 8); s->sector =3D (sector_num); @@ -631,7 +632,8 @@ void ide_set_sector(IDEState *s, int64_t sector_num) r =3D sector_num % (s->heads * s->sectors); s->hcyl =3D cyl >> 8; s->lcyl =3D cyl; - s->select =3D (s->select & 0xf0) | ((r / s->sectors) & 0x0f); + s->select =3D (s->select & ~(ATA_DEV_HS)) | + ((r / s->sectors) & (ATA_DEV_HS)); s->sector =3D (r % s->sectors) + 1; } } @@ -1302,10 +1304,10 @@ void ide_ioport_write(void *opaque, uint32_t addr, = uint32_t val) break; case ATA_IOPORT_WR_DEVICE_HEAD: ide_clear_hob(bus); - bus->ifs[0].select =3D val | 0xa0; - bus->ifs[1].select =3D val | 0xa0; + bus->ifs[0].select =3D val | (ATA_DEV_ALWAYS_ON); + bus->ifs[1].select =3D val | (ATA_DEV_ALWAYS_ON); /* select drive */ - bus->unit =3D (val >> 4) & 1; + bus->unit =3D (val & (ATA_DEV_SELECT)) ? 1 : 0; break; default: case ATA_IOPORT_WR_COMMAND: @@ -1343,7 +1345,7 @@ static void ide_reset(IDEState *s) s->hob_lcyl =3D 0; s->hob_hcyl =3D 0; =20 - s->select =3D 0xa0; + s->select =3D (ATA_DEV_ALWAYS_ON); s->status =3D READY_STAT | SEEK_STAT; =20 s->lba48 =3D 0; --=20 2.26.2 From nobody Sun May 19 16:27:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1601577208; cv=none; d=zohomail.com; s=zohoarc; b=cFj/ra8Q8vhUjc13y6BVULrEJy8DHJ4ipyacFzb37V0qKdBe6ilcki/vLhqIBP2O6jJNUzvlPIkiyc33o195pY1XLy3SfWyCAgzWrFgF37MR2bPf31/eqACnTKC6XG4eBa8LNPSaZ7FUQIw4vI/64bxRgf2FUX7GQL6tdlXUs3w= ARC-Message-Signature: i=1; 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Thu, 1 Oct 2020 17:47:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601574427; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WUlI7YRqEBWIcjGaIwTXsdH7kwWOc4UyHnJG6Saz5cY=; b=CO8jlCn7DNmeyP0E2fBy7723G/ag9v6HPsxF9XcZhw3LzbKght58pOwoxwLfMowxIEANzZ ZWCVPFw+DQU/OjI7QjVJ6WA7OGYEsqAT0JmWJ+f2G6WoRM25czsZBdTuvBEYJwJttI+8PV 1Xl74eP3Be9UVxUoJXgDF1PBRxR7e8A= X-MC-Unique: 6a19ufkbMw-QnXr8AZsglA-1 From: John Snow To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 8/9] ide: clear interrupt on command write Date: Thu, 1 Oct 2020 13:46:48 -0400 Message-Id: <20201001174649.1911016-9-jsnow@redhat.com> In-Reply-To: <20201001174649.1911016-1-jsnow@redhat.com> References: <20201001174649.1911016-1-jsnow@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; 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charset="utf-8" Not known to fix any bug, but I couldn't help but notice that ATA specifies that writing to this register should clear an interrupt. ATA7: Section 5.3.3 (Command register - Effect) ATA6: Section 7.4.4 (Command register - Effect) ATA5: Section 7.4.4 (Command register - Effect) ATA4: Section 7.4.4 (Command register - Effect) ATA3: Section 5.2.2 (Command register) Other editions: try searching for the phrase "Writing this register". Signed-off-by: John Snow --- hw/ide/core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/ide/core.c b/hw/ide/core.c index 8a55352e4b2..0d745d63a18 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -1312,6 +1312,7 @@ void ide_ioport_write(void *opaque, uint32_t addr, ui= nt32_t val) default: case ATA_IOPORT_WR_COMMAND: ide_clear_hob(bus); + qemu_irq_lower(bus->irq); ide_exec_cmd(bus, val); break; } --=20 2.26.2 From nobody Sun May 19 16:27:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1601577091; cv=none; d=zohomail.com; s=zohoarc; b=bSxX/VYnWeGlHKhFZ14L6vnzuKW+U4DZigGQfoBkO/NIkK6vd2prSbAvNd7nF19gtCQ5Kv2pDHuNq2QeCMtB70KsyGcBoJsUrFLXdLMMWPIXyXbIcu80SEbD8eHtHqRz9nISuBhPkhGB3YRG0lUdXQWEp5Z0toE4msH9CBfdqDk= ARC-Message-Signature: i=1; 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Thu, 1 Oct 2020 17:47:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601574438; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=dUHnpLwVdnwHzpPtlw7iMCZujqB+2ubRgsKhRQHIqYE=; b=MM3xfBuzaYLsFRGfjj2w/iQndaHHR/3juOsLSicpRrTxfCVJ5CmOcBv7tGKVpTLrWA0gKf RJlfLjwt5lF4bOsjQwf9b458epU9skgZOKk0on0GwF7lv/WkthA2ECd1VrPYB92HN4Ei2K bjSIvUNMzSv+m+Rr+8oBIvIdP/jp7OE= X-MC-Unique: PGlBVT1lOTOQmRL2sltrzw-1 From: John Snow To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 9/9] ide: cancel pending callbacks on SRST Date: Thu, 1 Oct 2020 13:46:49 -0400 Message-Id: <20201001174649.1911016-10-jsnow@redhat.com> In-Reply-To: <20201001174649.1911016-1-jsnow@redhat.com> References: <20201001174649.1911016-1-jsnow@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; 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charset="utf-8" The SRST implementation did not keep up with the rest of IDE; it is possible to perform a weak reset on an IDE device to remove the BSY/DRQ bits, and then issue writes to the control/device registers which can cause chaos with the state machine. Fix that by actually performing a real reset. Reported-by: Alexander Bulekov Fixes: https://bugs.launchpad.net/qemu/+bug/1878253 Fixes: https://bugs.launchpad.net/qemu/+bug/1887303 Fixes: https://bugs.launchpad.net/qemu/+bug/1887309 Signed-off-by: John Snow --- hw/ide/core.c | 58 +++++++++++++++++++++++++++++++++++---------------- 1 file changed, 40 insertions(+), 18 deletions(-) diff --git a/hw/ide/core.c b/hw/ide/core.c index 0d745d63a18..0e32abd7796 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -2241,6 +2241,37 @@ uint32_t ide_status_read(void *opaque, uint32_t addr) return ret; } =20 +static void ide_perform_srst(IDEState *s) +{ + s->status |=3D BUSY_STAT; + + /* Halt PIO (Via register state); PIO BH remains scheduled. */ + ide_transfer_halt(s); + + /* Cancel DMA -- may drain block device and invoke callbacks */ + ide_cancel_dma_sync(s); + + /* Cancel PIO callback, reset registers/signature, etc */ + ide_reset(s); + + if (s->drive_kind =3D=3D IDE_CD) { + /* ATAPI drives do not set READY or SEEK */ + s->status =3D 0x00; + } +} + +static void ide_bus_perform_srst(void *opaque) +{ + IDEBus *bus =3D opaque; + IDEState *s; + int i; + + for (i =3D 0; i < 2; i++) { + s =3D &bus->ifs[i]; + ide_perform_srst(s); + } +} + void ide_ctrl_write(void *opaque, uint32_t addr, uint32_t val) { IDEBus *bus =3D opaque; @@ -2249,26 +2280,17 @@ void ide_ctrl_write(void *opaque, uint32_t addr, ui= nt32_t val) =20 trace_ide_ctrl_write(addr, val, bus); =20 - /* common for both drives */ - if (!(bus->cmd & IDE_CTRL_RESET) && - (val & IDE_CTRL_RESET)) { - /* reset low to high */ - for(i =3D 0;i < 2; i++) { + /* Device0 and Device1 each have their own control register, + * but QEMU models it as just one register in the controller. */ + if ((bus->cmd & IDE_CTRL_RESET) && + !(val & IDE_CTRL_RESET)) { + /* SRST triggers on falling edge */ + for (i =3D 0; i < 2; i++) { s =3D &bus->ifs[i]; - s->status =3D BUSY_STAT | SEEK_STAT; - s->error =3D 0x01; - } - } else if ((bus->cmd & IDE_CTRL_RESET) && - !(val & IDE_CTRL_RESET)) { - /* high to low */ - for(i =3D 0;i < 2; i++) { - s =3D &bus->ifs[i]; - if (s->drive_kind =3D=3D IDE_CD) - s->status =3D 0x00; /* NOTE: READY is _not_ set */ - else - s->status =3D READY_STAT | SEEK_STAT; - ide_set_signature(s); + s->status |=3D BUSY_STAT; } + aio_bh_schedule_oneshot(qemu_get_aio_context(), + ide_bus_perform_srst, bus); } =20 bus->cmd =3D val; --=20 2.26.2