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Iglesias" , Aurelien Jarno Subject: [PATCH 02/16] target/mips: Move cpu_mips_get_random() with CP0 helpers Date: Mon, 28 Sep 2020 19:15:25 +0200 Message-Id: <20200928171539.788309-3-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) The get_random() helper uses the CP0_Wired register, which is unrelated to the CP0_Count register use as timer. Commit e16fe40c872 ("Move the MIPS CPU timer in a separate file") incorrectly moved this get_random() helper with timer specific code. Move it back to generic CP0 helpers. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- target/mips/internal.h | 2 +- target/mips/cp0_helper.c | 25 +++++++++++++++++++++++++ target/mips/cp0_timer.c | 25 ------------------------- 3 files changed, 26 insertions(+), 26 deletions(-) diff --git a/target/mips/internal.h b/target/mips/internal.h index 7f159a9230c..087cabaa6d4 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -144,6 +144,7 @@ void r4k_helper_tlbr(CPUMIPSState *env); void r4k_helper_tlbinv(CPUMIPSState *env); void r4k_helper_tlbinvf(CPUMIPSState *env); void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra); +uint32_t cpu_mips_get_random(CPUMIPSState *env); =20 void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, unsigned size, @@ -209,7 +210,6 @@ void cpu_state_reset(CPUMIPSState *s); void cpu_mips_realize_env(CPUMIPSState *env); =20 /* cp0_timer.c */ -uint32_t cpu_mips_get_random(CPUMIPSState *env); uint32_t cpu_mips_get_count(CPUMIPSState *env); void cpu_mips_store_count(CPUMIPSState *env, uint32_t value); void cpu_mips_store_compare(CPUMIPSState *env, uint32_t value); diff --git a/target/mips/cp0_helper.c b/target/mips/cp0_helper.c index de64add038b..12143ac55b9 100644 --- a/target/mips/cp0_helper.c +++ b/target/mips/cp0_helper.c @@ -203,6 +203,31 @@ static void sync_c0_entryhi(CPUMIPSState *cpu, int tc) *tcst |=3D asid; } =20 +/* XXX: do not use a global */ +uint32_t cpu_mips_get_random(CPUMIPSState *env) +{ + static uint32_t seed =3D 1; + static uint32_t prev_idx; + uint32_t idx; + uint32_t nb_rand_tlb =3D env->tlb->nb_tlb - env->CP0_Wired; + + if (nb_rand_tlb =3D=3D 1) { + return env->tlb->nb_tlb - 1; + } + + /* Don't return same value twice, so get another value */ + do { + /* + * Use a simple algorithm of Linear Congruential Generator + * from ISO/IEC 9899 standard. + */ + seed =3D 1103515245 * seed + 12345; + idx =3D (seed >> 16) % nb_rand_tlb + env->CP0_Wired; + } while (idx =3D=3D prev_idx); + prev_idx =3D idx; + return idx; +} + /* CP0 helpers */ target_ulong helper_mfc0_mvpcontrol(CPUMIPSState *env) { diff --git a/target/mips/cp0_timer.c b/target/mips/cp0_timer.c index bd7efb152dd..9c38e9da1c8 100644 --- a/target/mips/cp0_timer.c +++ b/target/mips/cp0_timer.c @@ -29,31 +29,6 @@ =20 #define TIMER_PERIOD 10 /* 10 ns period for 100 Mhz frequency */ =20 -/* XXX: do not use a global */ -uint32_t cpu_mips_get_random(CPUMIPSState *env) -{ - static uint32_t seed =3D 1; - static uint32_t prev_idx =3D 0; - uint32_t idx; - uint32_t nb_rand_tlb =3D env->tlb->nb_tlb - env->CP0_Wired; - - if (nb_rand_tlb =3D=3D 1) { - return env->tlb->nb_tlb - 1; - } - - /* Don't return same value twice, so get another value */ - do { - /* - * Use a simple algorithm of Linear Congruential Generator - * from ISO/IEC 9899 standard. - */ - seed =3D 1103515245 * seed + 12345; - idx =3D (seed >> 16) % nb_rand_tlb + env->CP0_Wired; - } while (idx =3D=3D prev_idx); - prev_idx =3D idx; - return idx; -} - /* MIPS R4K timer */ static void cpu_mips_timer_update(CPUMIPSState *env) { --=20 2.26.2