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bh=fVocPT0chyJCn5Dv/9OWEIkEEsuls05up+nlpt9cTEc=; b=gzmx3vIF3pPp8Nm65tdu6+r265ax4Dm1Zie1dv0S2sQ2NpdzxE0L7qXXwzGt6qWF4coQt3 jD2jpWUOGwyQ1ft8Ibwi1jv+MZVioL8VeB90wjfXxj0EvY+lbKQlPXbtjMLbD1apK3bKKR AwmYuAJrEIVpjH8sz9llDyOIq4pP6kI= X-MC-Unique: egPlxi8DNluChxY2eu3zYA-1 From: David Hildenbrand To: qemu-devel@nongnu.org Subject: [PATCH v2 6/9] s390x/tcg: Implement BRANCH INDIRECT ON CONDITION (BIC) Date: Mon, 28 Sep 2020 14:27:14 +0200 Message-Id: <20200928122717.30586-7-david@redhat.com> In-Reply-To: <20200928122717.30586-1-david@redhat.com> References: <20200928122717.30586-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=david@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" Just like BRANCH ON CONDITION - however the address is read from memory (always 8 bytes are read), we have to wrap the address manually. The address is read using current CPU DAT/address-space controls, just like ordinary data. Signed-off-by: David Hildenbrand Reviewed-by: Richard Henderson --- target/s390x/insn-data.def | 2 ++ target/s390x/translate.c | 8 ++++++++ 2 files changed, 10 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 455efe73da..cb40aea9a3 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -115,6 +115,8 @@ /* BRANCH RELATIVE AND SAVE */ C(0xa705, BRAS, RI_b, Z, 0, 0, r1, 0, basi, 0) C(0xc005, BRASL, RIL_b, Z, 0, 0, r1, 0, basi, 0) +/* BRANCH INDIRECT ON CONDITION */ + C(0xe347, BIC, RXY_b, MIE2,0, m2_64w, 0, 0, bc, 0) /* BRANCH ON CONDITION */ C(0x0700, BCR, RR_b, Z, 0, r2_nz, 0, 0, bc, 0) C(0x4700, BC, RX_b, Z, 0, a2, 0, 0, bc, 0) diff --git a/target/s390x/translate.c b/target/s390x/translate.c index f20ebd7c6a..893b1f54a8 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -5935,6 +5935,14 @@ static void in2_m2_64(DisasContext *s, DisasOps *o) } #define SPEC_in2_m2_64 0 =20 +static void in2_m2_64w(DisasContext *s, DisasOps *o) +{ + in2_a2(s, o); + tcg_gen_qemu_ld64(o->in2, o->in2, get_mem_index(s)); + gen_addi_and_wrap_i64(s, o->in2, o->in2, 0); +} +#define SPEC_in2_m2_64w 0 + #ifndef CONFIG_USER_ONLY static void in2_m2_64a(DisasContext *s, DisasOps *o) { --=20 2.26.2