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[83.57.170.65]) by smtp.gmail.com with ESMTPSA id a20sm10167454wmm.40.2020.09.19.06.24.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Sep 2020 06:24:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=apNiNwtCTkCJZflMQCw25LK+sf/BwC+K1q+Rj9YfQ1k=; b=HYm7E7KeFgPd3AN4N5LzKzdbFZpTIeyfPZfhPbZkDrHrHqS2pJdzUaQiuq5i5DYFRH joXSLEJT9VfFTDc8kd8/le0nBySj3fWMcc/KEI9KptiU8MxN5nBhfUqO53OcveJQxMDD U0KkW4h9PiozlgG3R+3zRpbpr+iSmcGbcMYi3s0SkMGg7I8RHXyUcwzY/vWlWJgtBEMM GqheZ/0qMi5D8WXZvUIQPLgF5fMFReYD8tCxv8O6yhzrmDFOX6x3p2TDR0ZDjslSVWk1 O0zJJzb680g2mhRKhg8O+tKKiE/N9EBmJApdFv9AaiYyATOa5DF6Mr+aCQHf0W+d2gkd lptw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; bh=apNiNwtCTkCJZflMQCw25LK+sf/BwC+K1q+Rj9YfQ1k=; b=LmAYE5XtSYjikoZ8Yx7XZP9vxnB2ZtYUmP5vobdez+M7/0rN9hCvpdbj6Q+DgnCTvs 5c6hc9pK8/9gSvbU+mfg5hoR1cTo0kTffbw4dvyoB7108j8L9WfUTUF2gMwaksbXaQQ2 Y8rrc9IMDV7vnqUmt4PL9hyKMPndY2FMQvbW3bHij6TnwZcsuS6GiacEhOg91u6K0XR3 /ntvYEH9jrmHaBC+3LUidDKig2jaxHyc2rZQbpo5BnGrRUCCsnCcBQEs9aIDn/WF33mR EZ47RxzMdP4NICE80bwbiQEinPoPiSHv5RnIM5xkKz3dkeGBCvM5KA0Zc3Mx6HpnvztN NjcA== X-Gm-Message-State: AOAM532tabK8wHRGQlEMf1BulnzwZkeh8Xrjz4SCg+EyumJ3rdXpCNCu dPnDDsVDL05sdD2gsvCGgJM= X-Google-Smtp-Source: ABdhPJxY35h5rPeG8embz1az1CPijlMYmaWEWPR3XTztEWh/JkY232N3kUSZKqiGBhIm9YxZN2QBjA== X-Received: by 2002:adf:ba4f:: with SMTP id t15mr19868280wrg.335.1600521878572; Sat, 19 Sep 2020 06:24:38 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Tyrone Ting , Alistair Francis , qemu-arm@nongnu.org, Havard Skinnemoen , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH] hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer Date: Sat, 19 Sep 2020 15:24:35 +0200 Message-Id: <20200919132435.310527-1-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Fix integer handling issues handling issue reported by Coverity: hw/ssi/npcm7xx_fiu.c: 162 in npcm7xx_fiu_flash_read() >>> CID 1432730: Integer handling issues (NEGATIVE_RETURNS) >>> "npcm7xx_fiu_cs_index(fiu, f)" is passed to a parameter that cann= ot be negative. 162 npcm7xx_fiu_select(fiu, npcm7xx_fiu_cs_index(fiu, f)); hw/ssi/npcm7xx_fiu.c: 221 in npcm7xx_fiu_flash_write() 218 cs_id =3D npcm7xx_fiu_cs_index(fiu, f); 219 trace_npcm7xx_fiu_flash_write(DEVICE(fiu)->canonical_path, cs= _id, addr, 220 size, v); >>> CID 1432729: Integer handling issues (NEGATIVE_RETURNS) >>> "cs_id" is passed to a parameter that cannot be negative. 221 npcm7xx_fiu_select(fiu, cs_id); Since the index of the flash can not be negative, return an unsigned type. Reported-by: Coverity (CID 1432729 & 1432730: NEGATIVE_RETURNS) Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Havard Skinnemoen --- hw/ssi/npcm7xx_fiu.c | 12 ++++++------ hw/ssi/trace-events | 2 +- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/hw/ssi/npcm7xx_fiu.c b/hw/ssi/npcm7xx_fiu.c index 104e8f2b963..5040132b074 100644 --- a/hw/ssi/npcm7xx_fiu.c +++ b/hw/ssi/npcm7xx_fiu.c @@ -103,7 +103,8 @@ enum NPCM7xxFIURegister { * Returns the index of flash in the fiu->flash array. This corresponds to= the * chip select ID of the flash. */ -static int npcm7xx_fiu_cs_index(NPCM7xxFIUState *fiu, NPCM7xxFIUFlash *fla= sh) +static unsigned npcm7xx_fiu_cs_index(NPCM7xxFIUState *fiu, + NPCM7xxFIUFlash *flash) { int index =3D flash - fiu->flash; =20 @@ -113,20 +114,19 @@ static int npcm7xx_fiu_cs_index(NPCM7xxFIUState *fiu,= NPCM7xxFIUFlash *flash) } =20 /* Assert the chip select specified in the UMA Control/Status Register. */ -static void npcm7xx_fiu_select(NPCM7xxFIUState *s, int cs_id) +static void npcm7xx_fiu_select(NPCM7xxFIUState *s, unsigned cs_id) { trace_npcm7xx_fiu_select(DEVICE(s)->canonical_path, cs_id); =20 if (cs_id < s->cs_count) { qemu_irq_lower(s->cs_lines[cs_id]); + s->active_cs =3D cs_id; } else { qemu_log_mask(LOG_GUEST_ERROR, "%s: UMA to CS%d; this module has only %d chip selec= ts", DEVICE(s)->canonical_path, cs_id, s->cs_count); - cs_id =3D -1; + s->active_cs =3D -1; } - - s->active_cs =3D cs_id; } =20 /* Deassert the currently active chip select. */ @@ -206,7 +206,7 @@ static void npcm7xx_fiu_flash_write(void *opaque, hwadd= r addr, uint64_t v, NPCM7xxFIUFlash *f =3D opaque; NPCM7xxFIUState *fiu =3D f->fiu; uint32_t dwr_cfg; - int cs_id; + unsigned cs_id; int i; =20 if (fiu->active_cs !=3D -1) { diff --git a/hw/ssi/trace-events b/hw/ssi/trace-events index 2f83ef833fb..612d3d6087a 100644 --- a/hw/ssi/trace-events +++ b/hw/ssi/trace-events @@ -19,4 +19,4 @@ npcm7xx_fiu_deselect(const char *id, int cs) "%s deselect= CS%d" npcm7xx_fiu_ctrl_read(const char *id, uint64_t addr, uint32_t data) "%s of= fset: 0x%04" PRIx64 " value: 0x%08" PRIx32 npcm7xx_fiu_ctrl_write(const char *id, uint64_t addr, uint32_t data) "%s o= ffset: 0x%04" PRIx64 " value: 0x%08" PRIx32 npcm7xx_fiu_flash_read(const char *id, int cs, uint64_t addr, unsigned int= size, uint64_t value) "%s[%d] offset: 0x%08" PRIx64 " size: %u value: 0x%"= PRIx64 -npcm7xx_fiu_flash_write(const char *id, int cs, uint64_t addr, unsigned in= t size, uint64_t value) "%s[%d] offset: 0x%08" PRIx64 " size: %u value: 0x%= " PRIx64 +npcm7xx_fiu_flash_write(const char *id, unsigned cs, uint64_t addr, unsign= ed int size, uint64_t value) "%s[%d] offset: 0x%08" PRIx64 " size: %u value= : 0x%" PRIx64 --=20 2.26.2