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Fri, 18 Sep 2020 03:27:17 -0400 Received: from mxplan5.mail.ovh.net (unknown [10.108.4.132]) by mo529.mail-out.ovh.net (Postfix) with ESMTPS id B2AC65C5D986; Fri, 18 Sep 2020 09:27:05 +0200 (CEST) Received: from kaod.org (37.59.142.96) by DAG4EX1.mxp5.local (172.16.2.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2044.4; Fri, 18 Sep 2020 09:27:05 +0200 Authentication-Results: garm.ovh; auth=pass (GARM-96R0011e5b4873-ded1-4af5-ad61-f03b036f5d29, ECEC63DD04C3092DE3B5C7147C06DCFEA73B34A9) smtp.auth=clg@kaod.org From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: Subject: [PULL 1/3] hw/arm/aspeed: Map the UART5 device unconditionally Date: Fri, 18 Sep 2020 09:27:01 +0200 Message-ID: <20200918072703.331138-2-clg@kaod.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200918072703.331138-1-clg@kaod.org> References: <20200918072703.331138-1-clg@kaod.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Originating-IP: [37.59.142.96] X-ClientProxiedBy: DAG6EX1.mxp5.local (172.16.2.51) To DAG4EX1.mxp5.local (172.16.2.31) X-Ovh-Tracer-GUID: daee5ac3-acaa-429c-878c-b00fe81f28ac X-Ovh-Tracer-Id: 7010134297991351264 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedujedrtdehgdduvdduucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecuhedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephffvufffkffojghfgggtgfhisehtkeertdertdejnecuhfhrohhmpeevrogurhhitgcunfgvucfiohgrthgvrhcuoegtlhhgsehkrghougdrohhrgheqnecuggftrfgrthhtvghrnhepheehfeegjeeitdfffeetjeduveejueefuefgtdefueelueetveeliefhhffgtdelnecukfhppedtrddtrddtrddtpdefjedrheelrddugedvrdelieenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhhouggvpehsmhhtphdqohhuthdphhgvlhhopehmgihplhgrnhehrdhmrghilhdrohhvhhdrnhgvthdpihhnvghtpedtrddtrddtrddtpdhmrghilhhfrhhomheptghlgheskhgrohgurdhorhhgpdhrtghpthhtoheptghlgheskhgrohgurdhorhhg Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=178.32.125.2; envelope-from=clg@kaod.org; helo=smtpout1.mo529.mail-out.ovh.net X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/18 03:27:05 X-ACL-Warn: Detected OS = Linux 3.11 and newer X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daud=C3=A9 The UART5 is present on the machine regardless there is a character device connected to it. Map it unconditionally. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: C=C3=A9dric Le Goater Message-Id: <20200905212415.760452-1-f4bug@amsat.org> Signed-off-by: C=C3=A9dric Le Goater --- hw/arm/aspeed_ast2600.c | 8 +++----- hw/arm/aspeed_soc.c | 8 +++----- 2 files changed, 6 insertions(+), 10 deletions(-) diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 9d95e4214357..1450bde7cf26 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -325,11 +325,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *de= v, Error **errp) } =20 /* UART - attach an 8250 to the IO space as our UART5 */ - if (serial_hd(0)) { - qemu_irq uart5 =3D aspeed_soc_get_irq(s, ASPEED_DEV_UART5); - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], = 2, - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); - } + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), + 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); =20 /* I2C */ object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr), diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 35be126db6fd..7eefd54ac07a 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -283,11 +283,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error= **errp) } =20 /* UART - attach an 8250 to the IO space as our UART5 */ - if (serial_hd(0)) { - qemu_irq uart5 =3D aspeed_soc_get_irq(s, ASPEED_DEV_UART5); - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], = 2, - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); - } + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), 38400, + serial_hd(0), DEVICE_LITTLE_ENDIAN); =20 /* I2C */ object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr), --=20 2.25.4 From nobody Mon Apr 29 01:20:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1600414610; cv=none; d=zohomail.com; s=zohoarc; b=dJSuXG/Kk9jy9j+axE1HltevRZOPutkelbNBq3fTlEnN95felOIz33QATjwkqETV4rrP1LD8eA7M09I47xal8wDe4ag0RlQJVCUGZC+DM2stJJIg5ypqjdS8tDeaADFa1Dd6EPkzPdm9Ax0Y0xCM559M7cC6FH9vBB9qz7hsVOY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1600414610; 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Fri, 18 Sep 2020 03:27:19 -0400 Received: from smtpout1.mo804.mail-out.ovh.net ([79.137.123.220]:41897) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kJAnc-0003lr-ON for qemu-devel@nongnu.org; Fri, 18 Sep 2020 03:27:18 -0400 Received: from mxplan5.mail.ovh.net (unknown [10.108.1.179]) by mo804.mail-out.ovh.net (Postfix) with ESMTPS id 575FB62F468F; Fri, 18 Sep 2020 09:27:06 +0200 (CEST) Received: from kaod.org (37.59.142.96) by DAG4EX1.mxp5.local (172.16.2.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2044.4; Fri, 18 Sep 2020 09:27:05 +0200 Authentication-Results: garm.ovh; auth=pass (GARM-96R001b2f8559a-14e6-41c9-8032-d655c38789ec, ECEC63DD04C3092DE3B5C7147C06DCFEA73B34A9) smtp.auth=clg@kaod.org From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: Subject: [PULL 2/3] hw/arm/aspeed: Add machine properties to define the flash models Date: Fri, 18 Sep 2020 09:27:02 +0200 Message-ID: <20200918072703.331138-3-clg@kaod.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200918072703.331138-1-clg@kaod.org> References: <20200918072703.331138-1-clg@kaod.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Originating-IP: [37.59.142.96] X-ClientProxiedBy: DAG6EX1.mxp5.local (172.16.2.51) To DAG4EX1.mxp5.local (172.16.2.31) X-Ovh-Tracer-GUID: c2dbda0d-ff30-4377-ab7f-cd2628be6dbb X-Ovh-Tracer-Id: 7010134295899966371 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedujedrtdehgdduvdduucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecuhedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephffvufffkffojghfgggtgfhisehtkeertdertdejnecuhfhrohhmpeevrogurhhitgcunfgvucfiohgrthgvrhcuoegtlhhgsehkrghougdrohhrgheqnecuggftrfgrthhtvghrnhepheehfeegjeeitdfffeetjeduveejueefuefgtdefueelueetveeliefhhffgtdelnecukfhppedtrddtrddtrddtpdefjedrheelrddugedvrdelieenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhhouggvpehsmhhtphdqohhuthdphhgvlhhopehmgihplhgrnhehrdhmrghilhdrohhvhhdrnhgvthdpihhnvghtpedtrddtrddtrddtpdhmrghilhhfrhhomheptghlgheskhgrohgurdhorhhgpdhrtghpthhtoheptghlgheskhgrohgurdhorhhg Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=79.137.123.220; envelope-from=clg@kaod.org; helo=smtpout1.mo804.mail-out.ovh.net X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/18 03:27:07 X-ACL-Warn: Detected OS = Linux 3.11 and newer X-Spam_score_int: -5 X-Spam_score: -0.6 X-Spam_bar: / X-Spam_report: (-0.6 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_BL_SPAMCOP_NET=1.347, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?q?=E9=83=81=E9=9B=B7?= , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Joel Stanley Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Some machines don't have much differences a part from the flash model being used. Introduce new machine properties to change them from the command line. For instance, to start the ast2500-evb machine with a different FMC chip and a 64M SPI chip, use : -M ast2500-evb,fmc-model=3Dmx25l25635e,spi-model=3Dmx66u51235f Cc: =E9=83=81=E9=9B=B7 Reviewed-by: Joel Stanley Tested-by: Lei YU Message-Id: <20200915054859.2338477-1-clg@kaod.org> Signed-off-by: C=C3=A9dric Le Goater --- docs/system/arm/aspeed.rst | 18 +++++++++++++++ hw/arm/aspeed.c | 45 ++++++++++++++++++++++++++++++++++++-- 2 files changed, 61 insertions(+), 2 deletions(-) diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst index 45f891eb3cad..2d33d023453e 100644 --- a/docs/system/arm/aspeed.rst +++ b/docs/system/arm/aspeed.rst @@ -83,3 +83,21 @@ The image should be attached as an MTD drive. Run : =20 $ qemu-system-arm -M romulus-bmc -nic user \ -drive file=3Dflash-romulus,format=3Draw,if=3Dmtd -nographic + +Options specific to Aspeed machines are : + + * ``execute-in-place`` which emulates the boot from the CE0 flash + device by using the FMC controller to load the instructions, and + not simply from RAM. This takes a little longer. + + * ``fmc-model`` to change the FMC Flash model. FW needs support for + the chip model to boot. + + * ``spi-model`` to change the SPI Flash model. + +For instance, to start the ``ast2500-evb`` machine with a different +FMC chip and a bigger (64M) SPI chip, use : + +.. code-block:: bash + + -M ast2500-evb,fmc-model=3Dmx25l25635e,spi-model=3Dmx66u51235f diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 8bfb1c79ddc5..bdb981d2f878 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -41,6 +41,8 @@ struct AspeedMachineState { MemoryRegion ram_container; MemoryRegion max_ram; bool mmio_exec; + char *fmc_model; + char *spi_model; }; =20 /* Palmetto hardware value: 0x120CE416 */ @@ -332,8 +334,10 @@ static void aspeed_machine_init(MachineState *machine) "max_ram", max_ram_size - ram_size); memory_region_add_subregion(&bmc->ram_container, ram_size, &bmc->max_r= am); =20 - aspeed_board_init_flashes(&bmc->soc.fmc, amc->fmc_model); - aspeed_board_init_flashes(&bmc->soc.spi[0], amc->spi_model); + aspeed_board_init_flashes(&bmc->soc.fmc, bmc->fmc_model ? + bmc->fmc_model : amc->fmc_model); + aspeed_board_init_flashes(&bmc->soc.spi[0], bmc->spi_model ? + bmc->spi_model : amc->spi_model); =20 /* Install first FMC flash content as a boot rom. */ if (drive0) { @@ -570,6 +574,34 @@ static void aspeed_machine_instance_init(Object *obj) ASPEED_MACHINE(obj)->mmio_exec =3D false; } =20 +static char *aspeed_get_fmc_model(Object *obj, Error **errp) +{ + AspeedMachineState *bmc =3D ASPEED_MACHINE(obj); + return g_strdup(bmc->fmc_model); +} + +static void aspeed_set_fmc_model(Object *obj, const char *value, Error **e= rrp) +{ + AspeedMachineState *bmc =3D ASPEED_MACHINE(obj); + + g_free(bmc->fmc_model); + bmc->fmc_model =3D g_strdup(value); +} + +static char *aspeed_get_spi_model(Object *obj, Error **errp) +{ + AspeedMachineState *bmc =3D ASPEED_MACHINE(obj); + return g_strdup(bmc->spi_model); +} + +static void aspeed_set_spi_model(Object *obj, const char *value, Error **e= rrp) +{ + AspeedMachineState *bmc =3D ASPEED_MACHINE(obj); + + g_free(bmc->spi_model); + bmc->spi_model =3D g_strdup(value); +} + static void aspeed_machine_class_props_init(ObjectClass *oc) { object_class_property_add_bool(oc, "execute-in-place", @@ -577,6 +609,15 @@ static void aspeed_machine_class_props_init(ObjectClas= s *oc) aspeed_set_mmio_exec); object_class_property_set_description(oc, "execute-in-place", "boot directly from CE0 flash device"); + + object_class_property_add_str(oc, "fmc-model", aspeed_get_fmc_model, + aspeed_set_fmc_model); + object_class_property_set_description(oc, "fmc-model", + "Change the FMC Flash model"); + object_class_property_add_str(oc, "spi-model", aspeed_get_spi_model, + aspeed_set_spi_model); + object_class_property_set_description(oc, "spi-model", + "Change the SPI Flash model"); } =20 static int aspeed_soc_num_cpus(const char *soc_name) --=20 2.25.4 From nobody Mon Apr 29 01:20:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=79.137.123.220; envelope-from=clg@kaod.org; helo=smtpout1.mo804.mail-out.ovh.net X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/18 03:27:07 X-ACL-Warn: Detected OS = Linux 3.11 and newer X-Spam_score_int: -5 X-Spam_score: -0.6 X-Spam_bar: / X-Spam_report: (-0.6 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_BL_SPAMCOP_NET=1.347, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Joel Stanley , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" From: Joel Stanley Aspeed have released an updated datasheet (v7) containing the silicon id for the AST2600 A2. It looks like this: SCU004 SCU014 AST2600-A0 0x05000303 0x05000303 AST2600-A1 0x05010303 0x05010303 AST2600-A2 0x05010303 0x05020303 AST2620-A1 0x05010203 0x05010203 AST2620-A2 0x05010203 0x05020203 The SCU004 (silicon id 1) value matches SCU014 for A0, but for subsequent revisions it is hard coded to the A1 value. Qemu effectively dropped support for the A0 in 7582591ae745 ("aspeed: Support AST2600A1 silicon revision") as the A0 reset table was removed, so it makes sense to only support the behaviour of A1 and onwards. Signed-off-by: Joel Stanley Reviewed-by: C=C3=A9dric Le Goater Message-Id: <20200916082012.776628-1-joel@jms.id.au> Signed-off-by: C=C3=A9dric Le Goater --- hw/misc/aspeed_scu.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index dc6dd87c22f4..40a38ebd8549 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -670,7 +670,12 @@ static void aspeed_ast2600_scu_reset(DeviceState *dev) =20 memcpy(s->regs, asc->resets, asc->nr_regs * 4); =20 - s->regs[AST2600_SILICON_REV] =3D s->silicon_rev; + /* + * A0 reports A0 in _REV, but subsequent revisions report A1 regardless + * of actual revision. QEMU and Linux only support A1 onwards so this = is + * sufficient. + */ + s->regs[AST2600_SILICON_REV] =3D AST2600_A1_SILICON_REV; s->regs[AST2600_SILICON_REV2] =3D s->silicon_rev; s->regs[AST2600_HW_STRAP1] =3D s->hw_strap1; s->regs[AST2600_HW_STRAP2] =3D s->hw_strap2; --=20 2.25.4