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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id x16sm20834041wrq.62.2020.09.14.07.06.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Sep 2020 07:06:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=4Wx6PXj8KizxtYio9NXwuWyl3mh6LdgyhmTm+qqDWJY=; b=kDaIheu4LRUn52/HnkZnU4n3j2Z/Kt6RoC1D2NuqX7k26d+l94WgUuvZ1FzolA4j4Z Qvhva/G6gOpALj3XuHAHwa6OMgSCs9H3ddCN6XGQXhtm6bt7l+WcEGKjfyuK9B0IgQ1n eXAj9AaTq2lHTfA6vRAC0l/Lbi00ek+y2eSCgaZ/h40H0qmV4v06bC9ggPHeWapJJUID j4XgU3oHT2keMRkHjTrbm70g63EKNigOlVndYKKXiQ9aqNiYH6MXnqQaRxO9VOHEuiPU PQCQlZCgcYr8pBKQR8CgLFSswdgDTFRkCrg52xh9QtKvPLckxVHqg8ST1ja84uSC8aQ+ KE6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4Wx6PXj8KizxtYio9NXwuWyl3mh6LdgyhmTm+qqDWJY=; b=QTVidSGaRlIMjYUcg+EFW1Gbf32mhKsU+avqd6kS7yHcANbf/N0YaITmDG18H8MmTn 376I42YBkg4eQGxZgtX8BCIYmgtvu3fjKQOVR2q0smvZY4PugdziNFjgtJP9LdHDLoZ7 seuKCcvC7yVh9nlB9TI2eqbLfR709v34w3pkgT/onDMvFwuXeMT+D8VTE5D1EfTlDXER Gr3PC9YNnMJ3QaWwMJ0QMsoIqrCaVOoaCkaFL9L+w0A3lHo4jxiLIh8OyEgFUiyjieHI yJbaho3vvJ/YbNYgP7XHjZfZzkQuKbW9Le2RYaVEqrKvRU8jwA8Wnsf898X7VQu25+c5 8j8w== X-Gm-Message-State: AOAM531vtPsYjz5lE7Ja3l9itGxhf2AuDnNIg+PA/EvaWyPgHT8fHzH+ C0PaSMsh5Zpm5WzX7DTbjqWZSELXjt8aWJ3T X-Google-Smtp-Source: ABdhPJyehNcBLPGgCyYpMR4GoGavZQak00JCr9ZyHGo23s1Uor61Lx0iDYVf7mvCCo65MVHhe/i4mQ== X-Received: by 2002:a1c:81c9:: with SMTP id c192mr10308402wmd.2.1600092404606; Mon, 14 Sep 2020 07:06:44 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 01/36] hw/misc/a9scu: Do not allow invalid CPU count Date: Mon, 14 Sep 2020 15:06:06 +0100 Message-Id: <20200914140641.21369-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200914140641.21369-1-peter.maydell@linaro.org> References: <20200914140641.21369-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x333.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 Per the datasheet (DDI0407 r2p0): "The SCU connects one to four Cortex-A9 processors to the memory system through the AXI interfaces." Change the instance_init() handler to a device_realize() one so we can verify the property is in range, and return an error to the caller if not. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20200901144100.116742-2-f4bug@amsat.org Signed-off-by: Peter Maydell --- hw/misc/a9scu.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/hw/misc/a9scu.c b/hw/misc/a9scu.c index 324371a1c00..915f127761e 100644 --- a/hw/misc/a9scu.c +++ b/hw/misc/a9scu.c @@ -12,8 +12,11 @@ #include "hw/misc/a9scu.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qapi/error.h" #include "qemu/module.h" =20 +#define A9_SCU_CPU_MAX 4 + static uint64_t a9_scu_read(void *opaque, hwaddr offset, unsigned size) { @@ -105,12 +108,17 @@ static void a9_scu_reset(DeviceState *dev) s->control =3D 0; } =20 -static void a9_scu_init(Object *obj) +static void a9_scu_realize(DeviceState *dev, Error **errp) { - A9SCUState *s =3D A9_SCU(obj); - SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); + A9SCUState *s =3D A9_SCU(dev); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); =20 - memory_region_init_io(&s->iomem, obj, &a9_scu_ops, s, + if (!s->num_cpu || s->num_cpu > A9_SCU_CPU_MAX) { + error_setg(errp, "Illegal CPU count: %u", s->num_cpu); + return; + } + + memory_region_init_io(&s->iomem, OBJECT(s), &a9_scu_ops, s, "a9-scu", 0x100); sysbus_init_mmio(sbd, &s->iomem); } @@ -138,13 +146,13 @@ static void a9_scu_class_init(ObjectClass *klass, voi= d *data) device_class_set_props(dc, a9_scu_properties); dc->vmsd =3D &vmstate_a9_scu; dc->reset =3D a9_scu_reset; + dc->realize =3D a9_scu_realize; } =20 static const TypeInfo a9_scu_info =3D { .name =3D TYPE_A9_SCU, .parent =3D TYPE_SYS_BUS_DEVICE, .instance_size =3D sizeof(A9SCUState), - .instance_init =3D a9_scu_init, .class_init =3D a9_scu_class_init, }; =20 --=20 2.20.1