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[83.57.170.65]) by smtp.gmail.com with ESMTPSA id t1sm5089317wmi.16.2020.09.10.13.54.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Sep 2020 13:54:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jBgL1iKIvz4jH+dRa8U6fT1B6oJw6/SF3dkJ8j+0tYI=; b=svLfx+sk71ilf1v7mWwgPQgvz9Qd0vt5/dpJ0UrIuGsT7baiAv6AaII2q9v/Bc2ziN ra9Rv1ExUCMKzbvSHQMisdWXjYNITHFwZ4meCebEaOiJwlwBtiGz06jhiCeVSPxzgLut LRKcwSuUbWkl0M1ETT+5a+pFx1HojMoVC7CbJV6zQt/4Wmbb78TlfvZ/cB9tZEeh6EWH M8CXjS2qoeIZ6hX1RMyz2eFWNpGe7yIG4jdH/R3+4we0+OlQCveaA1SxZdAcY527artu JK4wcVb71UXyAslT946KDkUGKDxiDMa/3ubCiXkPB3THJ6znEgJQpj6cBQsBr4djMiNw qt4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=jBgL1iKIvz4jH+dRa8U6fT1B6oJw6/SF3dkJ8j+0tYI=; b=F74tblKF11IJdYKDtmLLNHCwmN9MBVdJG4MwRb/ecmTFHw0PyA6RJvZrfwOPysbHzG KsA5SOo8d+e3QW0DmhCDYs9nutdrXYTqB3WdUjx95yTNOhBa3j7n3PstV9EmkGVa26uk f5eTdnfwBz6B2WzOcBLkxsmI7TPcg6DktkFG1MbUdOITjvIhEMROOqTaMBcZLDfs/QFT qLtKp1uxvJQ+Kth/EZLs7PgoKymaQWkZ+xIHcrsmzySI+PFnJph3eYZYarHJa/JHJ2Pi /Ub0zSf6HmCanDpMx4uRhVf+fGn6uaZzV75THhLw0wmzLocNdAk10B0fuCIQfjFOJibi n44g== X-Gm-Message-State: AOAM531FU+/rkKXA7DrDuikH+HpoIojX641T414E86lG36h/o7wj8zoG 4a8yQDxexycvTPBtkeOoMYU= X-Google-Smtp-Source: ABdhPJwv4fKzCEYQmsDnkP5x2gyr6A31QscgE8a8Jy+2REJYvQuVfT6rfomLk2OBmZECRyJgl/YIUQ== X-Received: by 2002:a5d:5042:: with SMTP id h2mr10980380wrt.409.1599771279223; Thu, 10 Sep 2020 13:54:39 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Paolo Bonzini , Luc Michel , Andrzej Zaborowski , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Joel Stanley , Peter Maydell , Eduardo Habkost , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Andrew Jeffery , qemu-arm@nongnu.org Subject: [PATCH v5 6/7] hw/misc/mps2-scc: Use the LED device Date: Thu, 10 Sep 2020 22:54:28 +0200 Message-Id: <20200910205429.727766-7-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200910205429.727766-1-f4bug@amsat.org> References: <20200910205429.727766-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Per the 'ARM MPS2 and MPS2+ FPGA Prototyping Boards Technical Reference Manual' (100112_0200_07_en): 2.1 Overview of the MPS2 and MPS2+ hardware The MPS2 and MPS2+ FPGA Prototyping Boards contain the following components and interfaces: * User switches and user LEDs: - Two green LEDs and two push buttons that connect to the FPGA. - Eight green LEDs and one 8-way dip switch that connect to the MCC. Add the 8 LEDs connected to the MCC. This remplaces the 'mps2_scc_leds' trace events by the generic 'led_set_intensity' event. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- https://youtu.be/l9kD70uPchk?t=3D288 --- include/hw/misc/mps2-scc.h | 2 ++ hw/misc/mps2-scc.c | 25 ++++++++++++++----------- hw/misc/Kconfig | 1 + hw/misc/trace-events | 1 - 4 files changed, 17 insertions(+), 12 deletions(-) diff --git a/include/hw/misc/mps2-scc.h b/include/hw/misc/mps2-scc.h index 7045473788b..8542f384227 100644 --- a/include/hw/misc/mps2-scc.h +++ b/include/hw/misc/mps2-scc.h @@ -13,6 +13,7 @@ #define MPS2_SCC_H =20 #include "hw/sysbus.h" +#include "hw/misc/led.h" =20 #define TYPE_MPS2_SCC "mps2-scc" #define MPS2_SCC(obj) OBJECT_CHECK(MPS2SCC, (obj), TYPE_MPS2_SCC) @@ -25,6 +26,7 @@ typedef struct { =20 /*< public >*/ MemoryRegion iomem; + LEDState *led[8]; =20 uint32_t cfg0; uint32_t cfg1; diff --git a/hw/misc/mps2-scc.c b/hw/misc/mps2-scc.c index 9d0909e7b35..745505b849d 100644 --- a/hw/misc/mps2-scc.c +++ b/hw/misc/mps2-scc.c @@ -20,11 +20,13 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qemu/bitops.h" #include "trace.h" #include "hw/sysbus.h" #include "migration/vmstate.h" #include "hw/registerfields.h" #include "hw/misc/mps2-scc.h" +#include "hw/misc/led.h" #include "hw/qdev-properties.h" =20 REG32(CFG0, 0) @@ -152,18 +154,10 @@ static void mps2_scc_write(void *opaque, hwaddr offse= t, uint64_t value, s->cfg0 =3D value; break; case A_CFG1: - /* CFG1 bits [7:0] control the board LEDs. We don't currently have - * a mechanism for displaying this graphically, so use a trace eve= nt. - */ - trace_mps2_scc_leds(value & 0x80 ? '*' : '.', - value & 0x40 ? '*' : '.', - value & 0x20 ? '*' : '.', - value & 0x10 ? '*' : '.', - value & 0x08 ? '*' : '.', - value & 0x04 ? '*' : '.', - value & 0x02 ? '*' : '.', - value & 0x01 ? '*' : '.'); s->cfg1 =3D value; + for (size_t i =3D 0; i < ARRAY_SIZE(s->led); i++) { + led_set_state(s->led[i], extract32(value, i, 1)); + } break; case A_CFGDATA_OUT: s->cfgdata_out =3D value; @@ -245,10 +239,19 @@ static void mps2_scc_init(Object *obj) =20 memory_region_init_io(&s->iomem, obj, &mps2_scc_ops, s, "mps2-scc", 0x= 1000); sysbus_init_mmio(sbd, &s->iomem); + } =20 static void mps2_scc_realize(DeviceState *dev, Error **errp) { + MPS2SCC *s =3D MPS2_SCC(dev); + + for (size_t i =3D 0; i < ARRAY_SIZE(s->led); i++) { + char *name =3D g_strdup_printf("SCC LED%zu", i); + s->led[i] =3D led_create_simple(OBJECT(dev), GPIO_POLARITY_ACTIVE_= HIGH, + LED_COLOR_GREEN, name); + g_free(name); + } } =20 static const VMStateDescription mps2_scc_vmstate =3D { diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig index 0cecad45aad..7557a3e7b46 100644 --- a/hw/misc/Kconfig +++ b/hw/misc/Kconfig @@ -97,6 +97,7 @@ config MPS2_FPGAIO =20 config MPS2_SCC bool + select LED =20 config TZ_MPC bool diff --git a/hw/misc/trace-events b/hw/misc/trace-events index 43b9e0cf250..a620a358feb 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -85,7 +85,6 @@ aspeed_scu_write(uint64_t offset, unsigned size, uint32_t= data) "To 0x%" PRIx64 mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC rea= d: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC wr= ite: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" mps2_scc_reset(void) "MPS2 SCC: reset" -mps2_scc_leds(char led7, char led6, char led5, char led4, char led3, char = led2, char led1, char led0) "MPS2 SCC LEDs: %c%c%c%c%c%c%c%c" mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MP= S2 SCC config write: function %d device %d data 0x%" PRIx32 mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS= 2 SCC config read: function %d device %d data 0x%" PRIx32 =20 --=20 2.26.2