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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Thu, 10 Sep 2020 09:42:38 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kele Huang Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @gmail.com) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Detect mips store instructions SWXC1 and SDXC1 for MIPS64 since MIPS64r1, and MIPS32 since MIPS32r2. Signed-off-by: Kele Huang --- accel/tcg/user-exec.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index bb039eb32d..e69b4d8780 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -712,6 +712,27 @@ int cpu_signal_handler(int host_signum, void *pinfo, =20 /* XXX: compute is_write */ is_write =3D 0; + + /* + * Detect store instructions. Required in all versions of MIPS64 + * since MIPS64r1. Not available in MIPS32r1. Required by MIPS32r2 + * and subsequent versions of MIPS32. + */ + switch ((insn >> 3) & 0x7) { + case 0x1: + switch (insn & 0x7) { + case 0x0: /* SWXC1 */ + case 0x1: /* SDXC1 */ + is_write =3D 1; + break; + default: + break; + } + break; + default: + break; + } + return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask); } =20 --=20 2.17.1