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bh=HT+NqsXqZ55lovfZdVRNYKERL4Z23yYzyKSPgI5rRk8=; b=eNeB703yTxx5L5eUwn7N8Jpzq8VV3ZUMnUaQS4BpfK3vMpVSEjwv0+iGD36jhKwAKhZuP6 gELtwrhHUXZQz0MsG/aRyKycraw2Dn4B83NpiMbWp+7VcmKXUktBbtI48gilYg262S5C2/ GyRcbX+lB8oR+kYLjDQwTMindHJGa4o= X-MC-Unique: LVZL2t5YP2SLNxFT_AV6cA-1 From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 06/20] rx: Rename QOM type check macros Date: Wed, 2 Sep 2020 07:53:09 -0400 Message-Id: <20200902115323.850385-7-ehabkost@redhat.com> In-Reply-To: <20200902115323.850385-1-ehabkost@redhat.com> References: <20200902115323.850385-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" Currently we have a RXCPU typedef and a RXCPU type checking macro, but OBJECT_DECLARE* would transform the RXCPU macro into a function, and the function name would conflict with the typedef name. Rename the RXCPU* QOM type check macros to RX_CPU*, so we will avoid the conflict and make the macro names consistent with the TYPE_RX_CPU constant name. This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost Message-Id: <20200825192110.3528606-53-ehabkost@redhat.com> Reviewed-by: Peter Maydell Signed-off-by: Eduardo Habkost --- target/rx/cpu-qom.h | 6 +++--- hw/rx/rx-gdbsim.c | 4 ++-- target/rx/cpu.c | 14 +++++++------- target/rx/gdbstub.c | 4 ++-- target/rx/helper.c | 4 ++-- target/rx/translate.c | 2 +- 6 files changed, 17 insertions(+), 17 deletions(-) diff --git a/target/rx/cpu-qom.h b/target/rx/cpu-qom.h index 3e81856ef5..af937bc680 100644 --- a/target/rx/cpu-qom.h +++ b/target/rx/cpu-qom.h @@ -25,11 +25,11 @@ =20 #define TYPE_RX62N_CPU RX_CPU_TYPE_NAME("rx62n") =20 -#define RXCPU_CLASS(klass) \ +#define RX_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(RXCPUClass, (klass), TYPE_RX_CPU) -#define RXCPU(obj) \ +#define RX_CPU(obj) \ OBJECT_CHECK(RXCPU, (obj), TYPE_RX_CPU) -#define RXCPU_GET_CLASS(obj) \ +#define RX_CPU_GET_CLASS(obj) \ OBJECT_GET_CLASS(RXCPUClass, (obj), TYPE_RX_CPU) =20 /* diff --git a/hw/rx/rx-gdbsim.c b/hw/rx/rx-gdbsim.c index 54992ebe57..6914de2e59 100644 --- a/hw/rx/rx-gdbsim.c +++ b/hw/rx/rx-gdbsim.c @@ -118,7 +118,7 @@ static void rx_gdbsim_init(MachineState *machine) * the latter half of the SDRAM space. */ kernel_offset =3D machine->ram_size / 2; - rx_load_image(RXCPU(first_cpu), kernel_filename, + rx_load_image(RX_CPU(first_cpu), kernel_filename, SDRAM_BASE + kernel_offset, kernel_offset); if (dtb_filename) { ram_addr_t dtb_offset; @@ -141,7 +141,7 @@ static void rx_gdbsim_init(MachineState *machine) rom_add_blob_fixed("dtb", dtb, dtb_size, SDRAM_BASE + dtb_offset); /* Set dtb address to R1 */ - RXCPU(first_cpu)->env.regs[1] =3D SDRAM_BASE + dtb_offset; + RX_CPU(first_cpu)->env.regs[1] =3D SDRAM_BASE + dtb_offset; } } } diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 219e05397b..23ee17a701 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -28,14 +28,14 @@ =20 static void rx_cpu_set_pc(CPUState *cs, vaddr value) { - RXCPU *cpu =3D RXCPU(cs); + RXCPU *cpu =3D RX_CPU(cs); =20 cpu->env.pc =3D value; } =20 static void rx_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb) { - RXCPU *cpu =3D RXCPU(cs); + RXCPU *cpu =3D RX_CPU(cs); =20 cpu->env.pc =3D tb->pc; } @@ -48,8 +48,8 @@ static bool rx_cpu_has_work(CPUState *cs) =20 static void rx_cpu_reset(DeviceState *dev) { - RXCPU *cpu =3D RXCPU(dev); - RXCPUClass *rcc =3D RXCPU_GET_CLASS(cpu); + RXCPU *cpu =3D RX_CPU(dev); + RXCPUClass *rcc =3D RX_CPU_GET_CLASS(cpu); CPURXState *env =3D &cpu->env; uint32_t *resetvec; =20 @@ -108,7 +108,7 @@ static ObjectClass *rx_cpu_class_by_name(const char *cp= u_model) static void rx_cpu_realize(DeviceState *dev, Error **errp) { CPUState *cs =3D CPU(dev); - RXCPUClass *rcc =3D RXCPU_GET_CLASS(dev); + RXCPUClass *rcc =3D RX_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 cpu_exec_realizefn(cs, &local_err); @@ -164,7 +164,7 @@ static bool rx_cpu_tlb_fill(CPUState *cs, vaddr addr, i= nt size, static void rx_cpu_init(Object *obj) { CPUState *cs =3D CPU(obj); - RXCPU *cpu =3D RXCPU(obj); + RXCPU *cpu =3D RX_CPU(obj); CPURXState *env =3D &cpu->env; =20 cpu_set_cpustate_pointers(cpu); @@ -176,7 +176,7 @@ static void rx_cpu_class_init(ObjectClass *klass, void = *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); CPUClass *cc =3D CPU_CLASS(klass); - RXCPUClass *rcc =3D RXCPU_CLASS(klass); + RXCPUClass *rcc =3D RX_CPU_CLASS(klass); =20 device_class_set_parent_realize(dc, rx_cpu_realize, &rcc->parent_realize); diff --git a/target/rx/gdbstub.c b/target/rx/gdbstub.c index 9391e8151e..c811d4810b 100644 --- a/target/rx/gdbstub.c +++ b/target/rx/gdbstub.c @@ -22,7 +22,7 @@ =20 int rx_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) { - RXCPU *cpu =3D RXCPU(cs); + RXCPU *cpu =3D RX_CPU(cs); CPURXState *env =3D &cpu->env; =20 switch (n) { @@ -54,7 +54,7 @@ int rx_cpu_gdb_read_register(CPUState *cs, GByteArray *me= m_buf, int n) =20 int rx_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { - RXCPU *cpu =3D RXCPU(cs); + RXCPU *cpu =3D RX_CPU(cs); CPURXState *env =3D &cpu->env; uint32_t psw; switch (n) { diff --git a/target/rx/helper.c b/target/rx/helper.c index a6a337a311..3e380a94fe 100644 --- a/target/rx/helper.c +++ b/target/rx/helper.c @@ -44,7 +44,7 @@ void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int= rte) #define INT_FLAGS (CPU_INTERRUPT_HARD | CPU_INTERRUPT_FIR) void rx_cpu_do_interrupt(CPUState *cs) { - RXCPU *cpu =3D RXCPU(cs); + RXCPU *cpu =3D RX_CPU(cs); CPURXState *env =3D &cpu->env; int do_irq =3D cs->interrupt_request & INT_FLAGS; uint32_t save_psw; @@ -121,7 +121,7 @@ void rx_cpu_do_interrupt(CPUState *cs) =20 bool rx_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { - RXCPU *cpu =3D RXCPU(cs); + RXCPU *cpu =3D RX_CPU(cs); CPURXState *env =3D &cpu->env; int accept =3D 0; /* hardware interrupt (Normal) */ diff --git a/target/rx/translate.c b/target/rx/translate.c index da9713d362..482278edd2 100644 --- a/target/rx/translate.c +++ b/target/rx/translate.c @@ -128,7 +128,7 @@ static int bdsp_s(DisasContext *ctx, int d) =20 void rx_cpu_dump_state(CPUState *cs, FILE *f, int flags) { - RXCPU *cpu =3D RXCPU(cs); + RXCPU *cpu =3D RX_CPU(cs); CPURXState *env =3D &cpu->env; int i; uint32_t psw; --=20 2.26.2