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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Implement the fp16 versions of the VFP VSEL instruction. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20200828183354.27913-18-peter.maydell@linaro.org --- target/arm/vfp-uncond.decode | 6 ++++-- target/arm/translate-vfp.c.inc | 16 ++++++++++++---- 2 files changed, 16 insertions(+), 6 deletions(-) diff --git a/target/arm/vfp-uncond.decode b/target/arm/vfp-uncond.decode index b7cd9d11ed5..8ba7b1703e0 100644 --- a/target/arm/vfp-uncond.decode +++ b/target/arm/vfp-uncond.decode @@ -44,10 +44,12 @@ @vfp_dnm_s ................................ vm=3D%vm_sp vn=3D%vn_sp vd= =3D%vd_sp @vfp_dnm_d ................................ vm=3D%vm_dp vn=3D%vn_dp vd= =3D%vd_dp =20 +VSEL 1111 1110 0. cc:2 .... .... 1001 .0.0 .... \ + vm=3D%vm_sp vn=3D%vn_sp vd=3D%vd_sp sz=3D1 VSEL 1111 1110 0. cc:2 .... .... 1010 .0.0 .... \ - vm=3D%vm_sp vn=3D%vn_sp vd=3D%vd_sp dp=3D0 + vm=3D%vm_sp vn=3D%vn_sp vd=3D%vd_sp sz=3D2 VSEL 1111 1110 0. cc:2 .... .... 1011 .0.0 .... \ - vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp dp=3D1 + vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp sz=3D3 =20 VMAXNM_hp 1111 1110 1.00 .... .... 1001 .0.0 .... @vfp_dnm_s VMINNM_hp 1111 1110 1.00 .... .... 1001 .1.0 .... @vfp_dnm_s diff --git a/target/arm/translate-vfp.c.inc b/target/arm/translate-vfp.c.inc index 583e7ccdb20..869b67b2b93 100644 --- a/target/arm/translate-vfp.c.inc +++ b/target/arm/translate-vfp.c.inc @@ -190,18 +190,22 @@ static bool vfp_access_check(DisasContext *s) static bool trans_VSEL(DisasContext *s, arg_VSEL *a) { uint32_t rd, rn, rm; - bool dp =3D a->dp; + int sz =3D a->sz; =20 if (!dc_isar_feature(aa32_vsel, s)) { return false; } =20 - if (dp && !dc_isar_feature(aa32_fpdp_v2, s)) { + if (sz =3D=3D 3 && !dc_isar_feature(aa32_fpdp_v2, s)) { + return false; + } + + if (sz =3D=3D 1 && !dc_isar_feature(aa32_fp16_arith, s)) { return false; } =20 /* UNDEF accesses to D16-D31 if they don't exist */ - if (dp && !dc_isar_feature(aa32_simd_r32, s) && + if (sz =3D=3D 3 && !dc_isar_feature(aa32_simd_r32, s) && ((a->vm | a->vn | a->vd) & 0x10)) { return false; } @@ -214,7 +218,7 @@ static bool trans_VSEL(DisasContext *s, arg_VSEL *a) return true; } =20 - if (dp) { + if (sz =3D=3D 3) { TCGv_i64 frn, frm, dest; TCGv_i64 tmp, zero, zf, nf, vf; =20 @@ -307,6 +311,10 @@ static bool trans_VSEL(DisasContext *s, arg_VSEL *a) tcg_temp_free_i32(tmp); break; } + /* For fp16 the top half is always zeroes */ + if (sz =3D=3D 1) { + tcg_gen_andi_i32(dest, dest, 0xffff); + } neon_store_reg32(dest, rd); tcg_temp_free_i32(frn); tcg_temp_free_i32(frm); --=20 2.20.1