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bh=Drboy62O1LBCh7uah3AZ0Zl6FneOi0JiDtImU/qB8Yk=; b=IKjbChgW5lMmLbFiFyNQjE+UwMcMw6YJe4N8IIQyyamDgSxzOc9AC91bC0wtrj/hLhmoA5 KP9aPzh1gnTxOPvhIONs98PcJzyDDVdlnK1ZeAP9VJjel8lCZWrf4GPJuSZKmKZNL6zfX8 Ce+Abkq576NGFCytE2TOvEgieSSRiM8= X-MC-Unique: MH3ZqCvYNoSPf-v-uik8Iw-1 From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v4 10/18] [automated] Move QOM typedefs and add missing includes (pass 3) Date: Mon, 31 Aug 2020 17:07:32 -0400 Message-Id: <20200831210740.126168-11-ehabkost@redhat.com> In-Reply-To: <20200831210740.126168-1-ehabkost@redhat.com> References: <20200831210740.126168-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.001 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.120; envelope-from=ehabkost@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/31 15:02:38 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Alistair Francis , "Daniel P. Berrange" , qemu-riscv@nongnu.org, Sagar Karandikar , "Michael S. Tsirkin" , Bastian Koppelmann , Helge Deller , Raphael Norwitz , qemu-arm@nongnu.org, Palmer Dabbelt , Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE. Patch generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=3DQOMStructTypedefSplit $(git grep -l '' -- '*.[ch]') which will split "typdef struct { ... } TypedefName" declarations. Followed by: $ ./scripts/codeconverter/converter.py -i --pattern=3DMoveSymbols \ $(git grep -l '' -- '*.[ch]') which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary Signed-off-by: Eduardo Habkost --- Changes series v3 -> v4: this is a new patch added in series v4 The script was re-run after series rebase. This is being submitted as a separate patch to make review easier, but it can be squashed into the previous patch once it gets reviewed. --- Cc: Richard Henderson Cc: Helge Deller Cc: Peter Maydell Cc: Palmer Dabbelt Cc: Alistair Francis Cc: Sagar Karandikar Cc: Bastian Koppelmann Cc: Raphael Norwitz Cc: "Michael S. Tsirkin" Cc: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Cc: qemu-riscv@nongnu.org --- include/hw/arm/armsse.h | 11 +++++++---- include/hw/riscv/spike.h | 6 ++++-- include/hw/virtio/vhost-user-blk.h | 6 ++++-- hw/hppa/lasi.c | 6 ++++-- 4 files changed, 19 insertions(+), 10 deletions(-) diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index 347b977ae5..e5788e9d3c 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -105,8 +105,11 @@ #include "hw/or-irq.h" #include "hw/core/split-irq.h" #include "hw/cpu/cluster.h" +#include "qom/object.h" =20 #define TYPE_ARM_SSE "arm-sse" +typedef struct ARMSSE ARMSSE; +typedef struct ARMSSEClass ARMSSEClass; #define ARM_SSE(obj) OBJECT_CHECK(ARMSSE, (obj), TYPE_ARM_SSE) =20 /* @@ -140,7 +143,7 @@ #define RAM3_PPU 6 #define NUM_PPUS 7 =20 -typedef struct ARMSSE { +struct ARMSSE { /*< private >*/ SysBusDevice parent_obj; =20 @@ -215,14 +218,14 @@ typedef struct ARMSSE { uint32_t init_svtor; bool cpu_fpu[SSE_MAX_CPUS]; bool cpu_dsp[SSE_MAX_CPUS]; -} ARMSSE; +}; =20 typedef struct ARMSSEInfo ARMSSEInfo; =20 -typedef struct ARMSSEClass { +struct ARMSSEClass { SysBusDeviceClass parent_class; const ARMSSEInfo *info; -} ARMSSEClass; +}; =20 #define ARM_SSE_CLASS(klass) \ OBJECT_CLASS_CHECK(ARMSSEClass, (klass), TYPE_ARM_SSE) diff --git a/include/hw/riscv/spike.h b/include/hw/riscv/spike.h index b0a18a9c94..121396d07a 100644 --- a/include/hw/riscv/spike.h +++ b/include/hw/riscv/spike.h @@ -21,15 +21,17 @@ =20 #include "hw/riscv/riscv_hart.h" #include "hw/sysbus.h" +#include "qom/object.h" =20 #define SPIKE_CPUS_MAX 8 #define SPIKE_SOCKETS_MAX 8 =20 #define TYPE_SPIKE_MACHINE MACHINE_TYPE_NAME("spike") +typedef struct SpikeState SpikeState; #define SPIKE_MACHINE(obj) \ OBJECT_CHECK(SpikeState, (obj), TYPE_SPIKE_MACHINE) =20 -typedef struct { +struct SpikeState { /*< private >*/ MachineState parent; =20 @@ -37,7 +39,7 @@ typedef struct { RISCVHartArrayState soc[SPIKE_SOCKETS_MAX]; void *fdt; int fdt_size; -} SpikeState; +}; =20 enum { SPIKE_MROM, diff --git a/include/hw/virtio/vhost-user-blk.h b/include/hw/virtio/vhost-u= ser-blk.h index 292d17147c..9d38877907 100644 --- a/include/hw/virtio/vhost-user-blk.h +++ b/include/hw/virtio/vhost-user-blk.h @@ -20,14 +20,16 @@ #include "chardev/char-fe.h" #include "hw/virtio/vhost.h" #include "hw/virtio/vhost-user.h" +#include "qom/object.h" =20 #define TYPE_VHOST_USER_BLK "vhost-user-blk" +typedef struct VHostUserBlk VHostUserBlk; #define VHOST_USER_BLK(obj) \ OBJECT_CHECK(VHostUserBlk, (obj), TYPE_VHOST_USER_BLK) =20 #define VHOST_USER_BLK_AUTO_NUM_QUEUES UINT16_MAX =20 -typedef struct VHostUserBlk { +struct VHostUserBlk { VirtIODevice parent_obj; CharBackend chardev; int32_t bootindex; @@ -41,6 +43,6 @@ typedef struct VHostUserBlk { struct vhost_virtqueue *vhost_vqs; VirtQueue **virtqs; bool connected; -} VHostUserBlk; +}; =20 #endif diff --git a/hw/hppa/lasi.c b/hw/hppa/lasi.c index 194aa3e619..1acb9ce631 100644 --- a/hw/hppa/lasi.c +++ b/hw/hppa/lasi.c @@ -26,6 +26,7 @@ #include "hw/input/lasips2.h" #include "exec/address-spaces.h" #include "migration/vmstate.h" +#include "qom/object.h" =20 #define TYPE_LASI_CHIP "lasi-chip" =20 @@ -52,10 +53,11 @@ #define ICR_BUS_ERROR_BIT LASI_BIT(8) /* bit 8 in ICR */ #define ICR_TOC_BIT LASI_BIT(1) /* bit 1 in ICR */ =20 +typedef struct LasiState LasiState; #define LASI_CHIP(obj) \ OBJECT_CHECK(LasiState, (obj), TYPE_LASI_CHIP) =20 -typedef struct LasiState { +struct LasiState { PCIHostState parent_obj; =20 uint32_t irr; @@ -70,7 +72,7 @@ typedef struct LasiState { time_t rtc_ref; =20 MemoryRegion this_mem; -} LasiState; +}; =20 static bool lasi_chip_mem_valid(void *opaque, hwaddr addr, unsigned size, bool is_write, --=20 2.26.2