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bh=xrWoitSvz9YuRsnnfywphA9dYFgl5WlCvOUyAhl9mMY=; b=fILRbhvBAyRe9RijsH8rxWyx88XnBVgX0FSlK7mfv/kaKYbQ9U+maO+aF0qww6fBfpee2j bo8BSffbzkLKX/sqqSAfm7KXRp6XBzIoVKh5cCHzj0v6UB+zdiXHkebh+8rceWc4+qNOQt UZIacOzBKc1u34SSSpBWQGLdwn6en6c= X-MC-Unique: y_z_g5VZM1uTrGq0ecVc1A-1 From: Eduardo Habkost To: qemu-devel@nongnu.org Subject: [PATCH v4 09/18] [automated] Move QOM typedefs and add missing includes (pass 2) Date: Mon, 31 Aug 2020 17:07:31 -0400 Message-Id: <20200831210740.126168-10-ehabkost@redhat.com> In-Reply-To: <20200831210740.126168-1-ehabkost@redhat.com> References: <20200831210740.126168-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.139.110.120; envelope-from=ehabkost@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/31 02:13:08 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , "Daniel P. Berrange" , Yoshinori Sato , Juan Quintela , Laurent Vivier , "Dr. David Alan Gilbert" , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE. Patch generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=3DQOMStructTypedefSplit $(git grep -l '' -- '*.[ch]') which will split "typdef struct { ... } TypedefName" declarations. Followed by: $ ./scripts/codeconverter/converter.py -i --pattern=3DMoveSymbols \ $(git grep -l '' -- '*.[ch]') which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary Reviewed-by: Juan Quintela Signed-off-by: Eduardo Habkost --- Changes v3 -> v4: none Changes series v2 -> v3: this is a new patch added in series v3 The script was re-run after rebase and after additional patches were added to this series. This is being submitted as a separate patch to make review easier, but it can be squashed into the previous patch once it gets reviewed. Signed-off-by: Eduardo Habkost --- Cc: Peter Maydell Cc: Laurent Vivier Cc: David Gibson Cc: "C=C3=A9dric Le Goater" Cc: Juan Quintela Cc: "Dr. David Alan Gilbert" Cc: Yoshinori Sato Cc: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org --- include/hw/block/swim.h | 6 ++++-- include/hw/display/macfb.h | 18 ++++++++++------- include/hw/ppc/xive.h | 41 +++++++++++++++++++++++--------------- include/hw/rdma/rdma.h | 5 +++-- migration/migration.h | 6 ++++-- target/rx/cpu-qom.h | 6 ++++-- hw/arm/integratorcp.c | 16 +++++++++------ hw/arm/versatilepb.c | 6 ++++-- hw/arm/vexpress.c | 11 ++++++---- hw/sd/pl181.c | 6 ++++-- 10 files changed, 76 insertions(+), 45 deletions(-) diff --git a/include/hw/block/swim.h b/include/hw/block/swim.h index 9d8b65c561..f013d634f7 100644 --- a/include/hw/block/swim.h +++ b/include/hw/block/swim.h @@ -13,6 +13,7 @@ =20 #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qom/object.h" =20 #define SWIM_MAX_FD 2 =20 @@ -67,10 +68,11 @@ struct SWIMCtrl { }; =20 #define TYPE_SWIM "swim" +typedef struct Swim Swim; #define SWIM(obj) OBJECT_CHECK(Swim, (obj), TYPE_SWIM) =20 -typedef struct Swim { +struct Swim { SysBusDevice parent_obj; SWIMCtrl ctrl; -} Swim; +}; #endif diff --git a/include/hw/display/macfb.h b/include/hw/display/macfb.h index 347871b623..d330ee9823 100644 --- a/include/hw/display/macfb.h +++ b/include/hw/display/macfb.h @@ -16,6 +16,7 @@ #include "qemu/osdep.h" #include "exec/memory.h" #include "ui/console.h" +#include "qom/object.h" =20 typedef struct MacfbState { MemoryRegion mem_vram; @@ -31,34 +32,37 @@ typedef struct MacfbState { } MacfbState; =20 #define TYPE_MACFB "sysbus-macfb" +typedef struct MacfbSysBusState MacfbSysBusState; #define MACFB(obj) \ OBJECT_CHECK(MacfbSysBusState, (obj), TYPE_MACFB) =20 -typedef struct { +struct MacfbSysBusState { SysBusDevice busdev; =20 MacfbState macfb; -} MacfbSysBusState; +}; =20 +#define TYPE_NUBUS_MACFB "nubus-macfb" +typedef struct MacfbNubusDeviceClass MacfbNubusDeviceClass; +typedef struct MacfbNubusState MacfbNubusState; #define NUBUS_MACFB_CLASS(class) \ OBJECT_CLASS_CHECK(MacfbNubusDeviceClass, (class), TYPE_NUBUS_MACFB) #define NUBUS_MACFB_GET_CLASS(obj) \ OBJECT_GET_CLASS(MacfbNubusDeviceClass, (obj), TYPE_NUBUS_MACFB) =20 -typedef struct MacfbNubusDeviceClass { +struct MacfbNubusDeviceClass { DeviceClass parent_class; =20 DeviceRealize parent_realize; -} MacfbNubusDeviceClass; +}; =20 -#define TYPE_NUBUS_MACFB "nubus-macfb" #define NUBUS_MACFB(obj) \ OBJECT_CHECK(MacfbNubusState, (obj), TYPE_NUBUS_MACFB) =20 -typedef struct { +struct MacfbNubusState { NubusDevice busdev; =20 MacfbState macfb; -} MacfbNubusState; +}; =20 #endif diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h index 2c42ae92d2..8ef9af1969 100644 --- a/include/hw/ppc/xive.h +++ b/include/hw/ppc/xive.h @@ -143,6 +143,7 @@ #include "sysemu/kvm.h" #include "hw/sysbus.h" #include "hw/ppc/xive_regs.h" +#include "qom/object.h" =20 /* * XIVE Notifier (Interface between Source and Router) @@ -153,21 +154,23 @@ typedef struct XiveNotifier XiveNotifier; #define TYPE_XIVE_NOTIFIER "xive-notifier" #define XIVE_NOTIFIER(obj) \ INTERFACE_CHECK(XiveNotifier, (obj), TYPE_XIVE_NOTIFIER) +typedef struct XiveNotifierClass XiveNotifierClass; #define XIVE_NOTIFIER_CLASS(klass) \ OBJECT_CLASS_CHECK(XiveNotifierClass, (klass), TYPE_XIVE_NOTIFIER) #define XIVE_NOTIFIER_GET_CLASS(obj) \ OBJECT_GET_CLASS(XiveNotifierClass, (obj), TYPE_XIVE_NOTIFIER) =20 -typedef struct XiveNotifierClass { +struct XiveNotifierClass { InterfaceClass parent; void (*notify)(XiveNotifier *xn, uint32_t lisn); -} XiveNotifierClass; +}; =20 /* * XIVE Interrupt Source */ =20 #define TYPE_XIVE_SOURCE "xive-source" +typedef struct XiveSource XiveSource; #define XIVE_SOURCE(obj) OBJECT_CHECK(XiveSource, (obj), TYPE_XIVE_SOURCE) =20 /* @@ -177,7 +180,7 @@ typedef struct XiveNotifierClass { #define XIVE_SRC_H_INT_ESB 0x1 /* ESB managed with hcall H_INT_ESB */ #define XIVE_SRC_STORE_EOI 0x2 /* Store EOI supported */ =20 -typedef struct XiveSource { +struct XiveSource { DeviceState parent; =20 /* IRQs */ @@ -198,7 +201,7 @@ typedef struct XiveSource { MemoryRegion esb_mmio_kvm; =20 XiveNotifier *xive; -} XiveSource; +}; =20 /* * ESB MMIO setting. Can be one page, for both source triggering and @@ -304,6 +307,7 @@ void xive_source_set_irq(void *opaque, int srcno, int v= al); */ =20 #define TYPE_XIVE_TCTX "xive-tctx" +typedef struct XiveTCTX XiveTCTX; #define XIVE_TCTX(obj) OBJECT_CHECK(XiveTCTX, (obj), TYPE_XIVE_TCTX) =20 /* @@ -319,7 +323,7 @@ void xive_source_set_irq(void *opaque, int srcno, int v= al); =20 typedef struct XivePresenter XivePresenter; =20 -typedef struct XiveTCTX { +struct XiveTCTX { DeviceState parent_obj; =20 CPUState *cs; @@ -329,20 +333,22 @@ typedef struct XiveTCTX { uint8_t regs[XIVE_TM_RING_COUNT * XIVE_TM_RING_SIZE]; =20 XivePresenter *xptr; -} XiveTCTX; +}; =20 /* * XIVE Router */ typedef struct XiveFabric XiveFabric; =20 -typedef struct XiveRouter { +struct XiveRouter { SysBusDevice parent; =20 XiveFabric *xfb; -} XiveRouter; +}; +typedef struct XiveRouter XiveRouter; =20 #define TYPE_XIVE_ROUTER "xive-router" +typedef struct XiveRouterClass XiveRouterClass; #define XIVE_ROUTER(obj) \ OBJECT_CHECK(XiveRouter, (obj), TYPE_XIVE_ROUTER) #define XIVE_ROUTER_CLASS(klass) \ @@ -350,7 +356,7 @@ typedef struct XiveRouter { #define XIVE_ROUTER_GET_CLASS(obj) \ OBJECT_GET_CLASS(XiveRouterClass, (obj), TYPE_XIVE_ROUTER) =20 -typedef struct XiveRouterClass { +struct XiveRouterClass { SysBusDeviceClass parent; =20 /* XIVE table accessors */ @@ -365,7 +371,7 @@ typedef struct XiveRouterClass { int (*write_nvt)(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx, XiveNVT *nvt, uint8_t word_number); uint8_t (*get_block_id)(XiveRouter *xrtr); -} XiveRouterClass; +}; =20 int xive_router_get_eas(XiveRouter *xrtr, uint8_t eas_blk, uint32_t eas_id= x, XiveEAS *eas); @@ -391,19 +397,20 @@ typedef struct XiveTCTXMatch { #define TYPE_XIVE_PRESENTER "xive-presenter" #define XIVE_PRESENTER(obj) \ INTERFACE_CHECK(XivePresenter, (obj), TYPE_XIVE_PRESENTER) +typedef struct XivePresenterClass XivePresenterClass; #define XIVE_PRESENTER_CLASS(klass) \ OBJECT_CLASS_CHECK(XivePresenterClass, (klass), TYPE_XIVE_PRESENTER) #define XIVE_PRESENTER_GET_CLASS(obj) \ OBJECT_GET_CLASS(XivePresenterClass, (obj), TYPE_XIVE_PRESENTER) =20 -typedef struct XivePresenterClass { +struct XivePresenterClass { InterfaceClass parent; int (*match_nvt)(XivePresenter *xptr, uint8_t format, uint8_t nvt_blk, uint32_t nvt_idx, bool cam_ignore, uint8_t priority, uint32_t logic_serv, XiveTCTXMatch *match); bool (*in_kernel)(const XivePresenter *xptr); -} XivePresenterClass; +}; =20 int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx, uint8_t format, @@ -417,28 +424,30 @@ int xive_presenter_tctx_match(XivePresenter *xptr, Xi= veTCTX *tctx, #define TYPE_XIVE_FABRIC "xive-fabric" #define XIVE_FABRIC(obj) \ INTERFACE_CHECK(XiveFabric, (obj), TYPE_XIVE_FABRIC) +typedef struct XiveFabricClass XiveFabricClass; #define XIVE_FABRIC_CLASS(klass) \ OBJECT_CLASS_CHECK(XiveFabricClass, (klass), TYPE_XIVE_FABRIC) #define XIVE_FABRIC_GET_CLASS(obj) \ OBJECT_GET_CLASS(XiveFabricClass, (obj), TYPE_XIVE_FABRIC) =20 -typedef struct XiveFabricClass { +struct XiveFabricClass { InterfaceClass parent; int (*match_nvt)(XiveFabric *xfb, uint8_t format, uint8_t nvt_blk, uint32_t nvt_idx, bool cam_ignore, uint8_t priority, uint32_t logic_serv, XiveTCTXMatch *match); -} XiveFabricClass; +}; =20 /* * XIVE END ESBs */ =20 #define TYPE_XIVE_END_SOURCE "xive-end-source" +typedef struct XiveENDSource XiveENDSource; #define XIVE_END_SOURCE(obj) \ OBJECT_CHECK(XiveENDSource, (obj), TYPE_XIVE_END_SOURCE) =20 -typedef struct XiveENDSource { +struct XiveENDSource { DeviceState parent; =20 uint32_t nr_ends; @@ -448,7 +457,7 @@ typedef struct XiveENDSource { MemoryRegion esb_mmio; =20 XiveRouter *xrtr; -} XiveENDSource; +}; =20 /* * For legacy compatibility, the exceptions define up to 256 different diff --git a/include/hw/rdma/rdma.h b/include/hw/rdma/rdma.h index fd3d70103d..aef82e58db 100644 --- a/include/hw/rdma/rdma.h +++ b/include/hw/rdma/rdma.h @@ -19,6 +19,7 @@ =20 #define INTERFACE_RDMA_PROVIDER "rdma" =20 +typedef struct RdmaProviderClass RdmaProviderClass; #define RDMA_PROVIDER_CLASS(klass) \ OBJECT_CLASS_CHECK(RdmaProviderClass, (klass), \ INTERFACE_RDMA_PROVIDER) @@ -31,10 +32,10 @@ =20 typedef struct RdmaProvider RdmaProvider; =20 -typedef struct RdmaProviderClass { +struct RdmaProviderClass { InterfaceClass parent; =20 void (*print_statistics)(Monitor *mon, RdmaProvider *obj); -} RdmaProviderClass; +}; =20 #endif diff --git a/migration/migration.h b/migration/migration.h index ae497bd45a..4103e549bb 100644 --- a/migration/migration.h +++ b/migration/migration.h @@ -21,6 +21,7 @@ #include "qemu/coroutine_int.h" #include "io/channel.h" #include "net/announce.h" +#include "qom/object.h" =20 struct PostcopyBlocktimeContext; =20 @@ -114,6 +115,7 @@ void fill_destination_postcopy_migration_info(Migration= Info *info); =20 #define TYPE_MIGRATION "migration" =20 +typedef struct MigrationClass MigrationClass; #define MIGRATION_OBJ_CLASS(klass) \ OBJECT_CLASS_CHECK(MigrationClass, (klass), TYPE_MIGRATION) #define MIGRATION_OBJ(obj) \ @@ -121,10 +123,10 @@ void fill_destination_postcopy_migration_info(Migrati= onInfo *info); #define MIGRATION_OBJ_GET_CLASS(obj) \ OBJECT_GET_CLASS(MigrationClass, (obj), TYPE_MIGRATION) =20 -typedef struct MigrationClass { +struct MigrationClass { /*< private >*/ DeviceClass parent_class; -} MigrationClass; +}; =20 struct MigrationState { diff --git a/target/rx/cpu-qom.h b/target/rx/cpu-qom.h index 9054762326..dd96469e04 100644 --- a/target/rx/cpu-qom.h +++ b/target/rx/cpu-qom.h @@ -20,12 +20,14 @@ #define RX_CPU_QOM_H =20 #include "hw/core/cpu.h" +#include "qom/object.h" =20 #define TYPE_RX_CPU "rx-cpu" =20 #define TYPE_RX62N_CPU RX_CPU_TYPE_NAME("rx62n") =20 typedef struct RXCPU RXCPU; +typedef struct RXCPUClass RXCPUClass; #define RX_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(RXCPUClass, (klass), TYPE_RX_CPU) #define RX_CPU(obj) \ @@ -40,14 +42,14 @@ typedef struct RXCPU RXCPU; * * A RX CPU model. */ -typedef struct RXCPUClass { +struct RXCPUClass { /*< private >*/ CPUClass parent_class; /*< public >*/ =20 DeviceRealize parent_realize; DeviceReset parent_reset; -} RXCPUClass; +}; =20 #define CPUArchState struct CPURXState =20 diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index fe7c2b9d4b..75e608e68e 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -26,12 +26,14 @@ #include "hw/hw.h" #include "hw/irq.h" #include "hw/sd/sd.h" +#include "qom/object.h" =20 #define TYPE_INTEGRATOR_CM "integrator_core" +typedef struct IntegratorCMState IntegratorCMState; #define INTEGRATOR_CM(obj) \ OBJECT_CHECK(IntegratorCMState, (obj), TYPE_INTEGRATOR_CM) =20 -typedef struct IntegratorCMState { +struct IntegratorCMState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -51,7 +53,7 @@ typedef struct IntegratorCMState { uint32_t int_level; uint32_t irq_enabled; uint32_t fiq_enabled; -} IntegratorCMState; +}; =20 static uint8_t integrator_spd[128] =3D { 128, 8, 4, 11, 9, 1, 64, 0, 2, 0xa0, 0xa0, 0, 0, 8, 0, 1, @@ -326,10 +328,11 @@ static void integratorcm_realize(DeviceState *d, Erro= r **errp) /* Primary interrupt controller. */ =20 #define TYPE_INTEGRATOR_PIC "integrator_pic" +typedef struct icp_pic_state icp_pic_state; #define INTEGRATOR_PIC(obj) \ OBJECT_CHECK(icp_pic_state, (obj), TYPE_INTEGRATOR_PIC) =20 -typedef struct icp_pic_state { +struct icp_pic_state { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -340,7 +343,7 @@ typedef struct icp_pic_state { uint32_t fiq_enabled; qemu_irq parent_irq; qemu_irq parent_fiq; -} icp_pic_state; +}; =20 static const VMStateDescription vmstate_icp_pic =3D { .name =3D "icp_pic", @@ -465,10 +468,11 @@ static void icp_pic_init(Object *obj) /* CP control registers. */ =20 #define TYPE_ICP_CONTROL_REGS "icp-ctrl-regs" +typedef struct ICPCtrlRegsState ICPCtrlRegsState; #define ICP_CONTROL_REGS(obj) \ OBJECT_CHECK(ICPCtrlRegsState, (obj), TYPE_ICP_CONTROL_REGS) =20 -typedef struct ICPCtrlRegsState { +struct ICPCtrlRegsState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -477,7 +481,7 @@ typedef struct ICPCtrlRegsState { =20 qemu_irq mmc_irq; uint32_t intreg_state; -} ICPCtrlRegsState; +}; =20 #define ICP_GPIO_MMC_WPROT "mmc-wprot" #define ICP_GPIO_MMC_CARDIN "mmc-cardin" diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 9127579984..0e2d74cef2 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -26,6 +26,7 @@ #include "qemu/error-report.h" #include "hw/char/pl011.h" #include "hw/sd/sd.h" +#include "qom/object.h" =20 #define VERSATILE_FLASH_ADDR 0x34000000 #define VERSATILE_FLASH_SIZE (64 * 1024 * 1024) @@ -34,10 +35,11 @@ /* Primary interrupt controller. */ =20 #define TYPE_VERSATILE_PB_SIC "versatilepb_sic" +typedef struct vpb_sic_state vpb_sic_state; #define VERSATILE_PB_SIC(obj) \ OBJECT_CHECK(vpb_sic_state, (obj), TYPE_VERSATILE_PB_SIC) =20 -typedef struct vpb_sic_state { +struct vpb_sic_state { SysBusDevice parent_obj; =20 MemoryRegion iomem; @@ -46,7 +48,7 @@ typedef struct vpb_sic_state { uint32_t pic_enable; qemu_irq parent[32]; int irq; -} vpb_sic_state; +}; =20 static const VMStateDescription vmstate_vpb_sic =3D { .name =3D "versatilepb_sic", diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index 95405f5940..4c2c377823 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -44,6 +44,7 @@ #include "hw/cpu/a15mpcore.h" #include "hw/i2c/arm_sbcon_i2c.h" #include "hw/sd/sd.h" +#include "qom/object.h" =20 #define VEXPRESS_BOARD_ID 0x8e0 #define VEXPRESS_FLASH_SIZE (64 * 1024 * 1024) @@ -166,16 +167,18 @@ static hwaddr motherboard_aseries_map[] =3D { =20 typedef struct VEDBoardInfo VEDBoardInfo; =20 -typedef struct { +struct VexpressMachineClass { MachineClass parent; VEDBoardInfo *daughterboard; -} VexpressMachineClass; +}; +typedef struct VexpressMachineClass VexpressMachineClass; =20 -typedef struct { +struct VexpressMachineState { MachineState parent; bool secure; bool virt; -} VexpressMachineState; +}; +typedef struct VexpressMachineState VexpressMachineState; =20 #define TYPE_VEXPRESS_MACHINE "vexpress" #define TYPE_VEXPRESS_A9_MACHINE MACHINE_TYPE_NAME("vexpress-a9") diff --git a/hw/sd/pl181.c b/hw/sd/pl181.c index 579d68ad83..cb2ef0fb39 100644 --- a/hw/sd/pl181.c +++ b/hw/sd/pl181.c @@ -18,15 +18,17 @@ #include "qemu/error-report.h" #include "qapi/error.h" #include "trace.h" +#include "qom/object.h" =20 #define PL181_FIFO_LEN 16 =20 #define TYPE_PL181 "pl181" +typedef struct PL181State PL181State; #define PL181(obj) OBJECT_CHECK(PL181State, (obj), TYPE_PL181) =20 #define TYPE_PL181_BUS "pl181-bus" =20 -typedef struct PL181State { +struct PL181State { SysBusDevice parent_obj; =20 MemoryRegion iomem; @@ -56,7 +58,7 @@ typedef struct PL181State { /* GPIO outputs for 'card is readonly' and 'card inserted' */ qemu_irq card_readonly; qemu_irq card_inserted; -} PL181State; +}; =20 static const VMStateDescription vmstate_pl181 =3D { .name =3D "pl181", --=20 2.26.2