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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id s20sm356251wmh.21.2020.08.28.11.34.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Aug 2020 11:34:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=X35NeqBctB9mslvjbHDeW7p7u1Isiz5hswfcsubx4hw=; b=SxubAn0tbMmA12D/zBBdAmu9w7RlgU52vVlzcNRfnIDs9WtNjzh5wX+LKzfe743KkE EB5emIOOGzgl48MHyIAfRhaTz+kLXD70MA89FrOJX4uO3KhKzYPt5MNu0pCQumdRE4H0 g0Ix0yNLa6GyG00X9GcGMPX5+1qAiEEldnVuRY/dc0vVi0URikF9x0RfWGwliHgDqYgy F0TTxrHfCP8aqbJYKn7Px4WSEKYyG224Rlw+rpKo6pvxLzdyKyI5iUrlwETsxmokdeHQ 2lyyJqhJJVepC62QwjfvrqZxIuFDJWGgn0UsB/6wmM9iB9vBX/X8VHK1k7LGFoh0CuN6 Ezjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=X35NeqBctB9mslvjbHDeW7p7u1Isiz5hswfcsubx4hw=; b=Av8h1Fp87prmWjphxjKjGi3840vun4tkI2Hf529r3ZYN6unua/hudS2sUbWVkcUWA+ 2HLHS55UDXvbX9heOZ78zWhY+swKvhsr9Uqun+CK1Qg4lN25QSxvi0gShqQ8p/kpynlG H5sTbTgi6pUd+liOik2+LjIM1VtFhGGQb6F9TQdKDtwMD/ERzhXNneD+pXM5fh4Sa3+i bhGFWFihucTBeY+hCR4cSvvQDBFSeaKxtJ+J+qDlae8qOkPnqiWJOC/stn4KjUFAdBfp vNfnYUGh/NJafBpMPALIwnGK6kzdPJJQMTNLn0C4Ls/O5mpFVwUMtL62u7vmg0oavX2Z pDaA== X-Gm-Message-State: AOAM533PQJy+3wilOSlfDCodWh6AAJxezW/vjDCRC91NS9HxzbDvnBt0 VqMIU2ceNHMjCYTOyqNzeAUSIw== X-Google-Smtp-Source: ABdhPJwni1cj4H+rqAEyat8m7Yi4D5+2E8M7g3pvbhkw6+TP5xqIdJqrYqyYkEb8HzynlHb835h5ww== X-Received: by 2002:a1c:e1d6:: with SMTP id y205mr41505wmg.92.1598639665695; Fri, 28 Aug 2020 11:34:25 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 24/45] target/arm: Implement fp16 for Neon VRECPE, VRSQRTE using gvec Date: Fri, 28 Aug 2020 19:33:33 +0100 Message-Id: <20200828183354.27913-25-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200828183354.27913-1-peter.maydell@linaro.org> References: <20200828183354.27913-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::344; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x344.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" We already have gvec helpers for floating point VRECPE and VRQSRTE, so convert the Neon decoder to use them and add the fp16 support. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/translate-neon.c.inc | 29 +++++++++++++++++++++++++++-- 1 file changed, 27 insertions(+), 2 deletions(-) diff --git a/target/arm/translate-neon.c.inc b/target/arm/translate-neon.c.= inc index 9d0959517fa..872f093a1fc 100644 --- a/target/arm/translate-neon.c.inc +++ b/target/arm/translate-neon.c.inc @@ -3857,13 +3857,38 @@ static bool do_2misc_fp(DisasContext *s, arg_2misc = *a, return do_2misc_fp(s, a, FUNC); \ } =20 -DO_2MISC_FP(VRECPE_F, gen_helper_recpe_f32) -DO_2MISC_FP(VRSQRTE_F, gen_helper_rsqrte_f32) DO_2MISC_FP(VCVT_FS, gen_helper_vfp_sitos) DO_2MISC_FP(VCVT_FU, gen_helper_vfp_uitos) DO_2MISC_FP(VCVT_SF, gen_helper_vfp_tosizs) DO_2MISC_FP(VCVT_UF, gen_helper_vfp_touizs) =20 +#define DO_2MISC_FP_VEC(INSN, HFUNC, SFUNC) \ + static void gen_##INSN(unsigned vece, uint32_t rd_ofs, \ + uint32_t rm_ofs, \ + uint32_t oprsz, uint32_t maxsz) \ + { \ + static gen_helper_gvec_2_ptr * const fns[4] =3D { \ + NULL, HFUNC, SFUNC, NULL, \ + }; \ + TCGv_ptr fpst; \ + fpst =3D fpstatus_ptr(vece =3D=3D 1 ? FPST_STD_F16 : FPST_STD); = \ + tcg_gen_gvec_2_ptr(rd_ofs, rm_ofs, fpst, oprsz, maxsz, 0, \ + fns[vece]); \ + tcg_temp_free_ptr(fpst); \ + } \ + static bool trans_##INSN(DisasContext *s, arg_2misc *a) \ + { \ + if (a->size =3D=3D 0 || = \ + (a->size =3D=3D 1 && !dc_isar_feature(aa32_fp16_arith, s))) = \ + { \ + return false; \ + } \ + return do_2misc_vec(s, a, gen_##INSN); \ + } + +DO_2MISC_FP_VEC(VRECPE_F, gen_helper_gvec_frecpe_h, gen_helper_gvec_frecpe= _s) +DO_2MISC_FP_VEC(VRSQRTE_F, gen_helper_gvec_frsqrte_h, gen_helper_gvec_frsq= rte_s) + static bool trans_VRINTX(DisasContext *s, arg_2misc *a) { if (!arm_dc_feature(s, ARM_FEATURE_V8)) { --=20 2.20.1