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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" It makes sense to keep BIMM with D_FLAG, as they can be written back to iflags at the same time. BIMM_FLAG does not need to be added to IFLAGS_TB_MASK because it does not affect the next TB, only the exception path out of the current TB. Renumber IMM_FLAG, as the value 4 holds no particular significance; pack these two flags at the bottom of the bitfield. Signed-off-by: Richard Henderson --- target/microblaze/cpu.h | 4 ++-- target/microblaze/helper.c | 2 +- target/microblaze/translate.c | 12 +++++------- 3 files changed, 8 insertions(+), 10 deletions(-) diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 2fc7cf26f1..a5df1fa28f 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -231,7 +231,6 @@ typedef struct CPUMBState CPUMBState; struct CPUMBState { uint32_t btaken; uint32_t btarget; - uint32_t bimm; =20 uint32_t imm; uint32_t regs[32]; @@ -253,7 +252,8 @@ struct CPUMBState { uint32_t res_val; =20 /* Internal flags. */ -#define IMM_FLAG 4 +#define IMM_FLAG (1 << 0) +#define BIMM_FLAG (1 << 1) /* MSR_EE (1 << 8) */ /* MSR_UM (1 << 11) */ /* MSR_VM (1 << 13) */ diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index f8e2ca12a9..06f4322e09 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -166,7 +166,7 @@ void mb_cpu_do_interrupt(CPUState *cs) /* Reexecute the branch. */ env->regs[17] -=3D 4; /* was the branch immprefixed?. */ - if (env->bimm) { + if (env->iflags & BIMM_FLAG) { env->regs[17] -=3D 4; log_cpu_state_mask(CPU_LOG_INT, cs, 0); } diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index d2baa7db0e..97a436c8d5 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1351,13 +1351,11 @@ static void eval_cond_jmp(DisasContext *dc, TCGv_i3= 2 pc_true, TCGv_i32 pc_false) =20 static void dec_setup_dslot(DisasContext *dc) { - TCGv_i32 tmp =3D tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_F= LAG)); - - dc->delayed_branch =3D 2; - dc->tb_flags |=3D D_FLAG; - - tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUMBState, bimm)); - tcg_temp_free_i32(tmp); + dc->delayed_branch =3D 2; + dc->tb_flags |=3D D_FLAG; + if (dc->type_b && (dc->tb_flags & IMM_FLAG)) { + dc->tb_flags |=3D BIMM_FLAG; + } } =20 static void dec_bcc(DisasContext *dc) --=20 2.25.1