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bh=lNzykSHfQCEIpFJ5XM0092y7W6KXjPRMMDAtUoYUgf4=; b=EID4PErtMaqb2Tln0RSD9gK65bSY89YpHU2b8uDz6p1hNrheuCQIufTb6etIx8ItYCW8ki Jo6OcIZZN09TjeN5bD+v65uxDBLlKxealf+f0qLNq9qvBgfjYXepzbnRCZOQ9P+zmEKkF9 tJxQ2zrRJdMjhIDM4mifkPkj1NxPQRg= X-MC-Unique: wSMRzwu7O8iWm1Q9aYmmKg-1 From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 08/53] opentitan: Rename memmap enum constants Date: Thu, 27 Aug 2020 15:20:37 -0400 Message-Id: <20200827192122.658035-9-ehabkost@redhat.com> In-Reply-To: <20200827192122.658035-1-ehabkost@redhat.com> References: <20200827192122.658035-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.139.110.120; envelope-from=ehabkost@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/27 00:13:19 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.959, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Roman Bolshakov , Alistair Francis , Igor Mammedov , Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Some of the enum constant names conflict with the QOM type check macros (IBEX_PLIC, IBEX_UART). This needs to be addressed to allow us to transform the QOM type check macros into functions generated by OBJECT_DECLARE_TYPE(). Rename all the constants to IBEX_DEV_*, to avoid conflicts. Reviewed-by: Alistair Francis Reviewed-by: Daniel P. Berrang=C3=A9 Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-8-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/riscv/opentitan.h | 38 ++++++++-------- hw/riscv/opentitan.c | 84 ++++++++++++++++++------------------ 2 files changed, 61 insertions(+), 61 deletions(-) diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h index 8f29b9cbbf..835a80f896 100644 --- a/include/hw/riscv/opentitan.h +++ b/include/hw/riscv/opentitan.h @@ -49,25 +49,25 @@ typedef struct OpenTitanState { } OpenTitanState; =20 enum { - IBEX_ROM, - IBEX_RAM, - IBEX_FLASH, - IBEX_UART, - IBEX_GPIO, - IBEX_SPI, - IBEX_FLASH_CTRL, - IBEX_RV_TIMER, - IBEX_AES, - IBEX_HMAC, - IBEX_PLIC, - IBEX_PWRMGR, - IBEX_RSTMGR, - IBEX_CLKMGR, - IBEX_PINMUX, - IBEX_ALERT_HANDLER, - IBEX_NMI_GEN, - IBEX_USBDEV, - IBEX_PADCTRL, + IBEX_DEV_ROM, + IBEX_DEV_RAM, + IBEX_DEV_FLASH, + IBEX_DEV_UART, + IBEX_DEV_GPIO, + IBEX_DEV_SPI, + IBEX_DEV_FLASH_CTRL, + IBEX_DEV_RV_TIMER, + IBEX_DEV_AES, + IBEX_DEV_HMAC, + IBEX_DEV_PLIC, + IBEX_DEV_PWRMGR, + IBEX_DEV_RSTMGR, + IBEX_DEV_CLKMGR, + IBEX_DEV_PINMUX, + IBEX_DEV_ALERT_HANDLER, + IBEX_DEV_NMI_GEN, + IBEX_DEV_USBDEV, + IBEX_DEV_PADCTRL, }; =20 enum { diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index a8f0039e51..23ba3b4bfc 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -32,25 +32,25 @@ static const struct MemmapEntry { hwaddr base; hwaddr size; } ibex_memmap[] =3D { - [IBEX_ROM] =3D { 0x00008000, 16 * KiB }, - [IBEX_RAM] =3D { 0x10000000, 0x10000 }, - [IBEX_FLASH] =3D { 0x20000000, 0x80000 }, - [IBEX_UART] =3D { 0x40000000, 0x10000 }, - [IBEX_GPIO] =3D { 0x40010000, 0x10000 }, - [IBEX_SPI] =3D { 0x40020000, 0x10000 }, - [IBEX_FLASH_CTRL] =3D { 0x40030000, 0x10000 }, - [IBEX_PINMUX] =3D { 0x40070000, 0x10000 }, - [IBEX_RV_TIMER] =3D { 0x40080000, 0x10000 }, - [IBEX_PLIC] =3D { 0x40090000, 0x10000 }, - [IBEX_PWRMGR] =3D { 0x400A0000, 0x10000 }, - [IBEX_RSTMGR] =3D { 0x400B0000, 0x10000 }, - [IBEX_CLKMGR] =3D { 0x400C0000, 0x10000 }, - [IBEX_AES] =3D { 0x40110000, 0x10000 }, - [IBEX_HMAC] =3D { 0x40120000, 0x10000 }, - [IBEX_ALERT_HANDLER] =3D { 0x40130000, 0x10000 }, - [IBEX_NMI_GEN] =3D { 0x40140000, 0x10000 }, - [IBEX_USBDEV] =3D { 0x40150000, 0x10000 }, - [IBEX_PADCTRL] =3D { 0x40160000, 0x10000 } + [IBEX_DEV_ROM] =3D { 0x00008000, 16 * KiB }, + [IBEX_DEV_RAM] =3D { 0x10000000, 0x10000 }, + [IBEX_DEV_FLASH] =3D { 0x20000000, 0x80000 }, + [IBEX_DEV_UART] =3D { 0x40000000, 0x10000 }, + [IBEX_DEV_GPIO] =3D { 0x40010000, 0x10000 }, + [IBEX_DEV_SPI] =3D { 0x40020000, 0x10000 }, + [IBEX_DEV_FLASH_CTRL] =3D { 0x40030000, 0x10000 }, + [IBEX_DEV_PINMUX] =3D { 0x40070000, 0x10000 }, + [IBEX_DEV_RV_TIMER] =3D { 0x40080000, 0x10000 }, + [IBEX_DEV_PLIC] =3D { 0x40090000, 0x10000 }, + [IBEX_DEV_PWRMGR] =3D { 0x400A0000, 0x10000 }, + [IBEX_DEV_RSTMGR] =3D { 0x400B0000, 0x10000 }, + [IBEX_DEV_CLKMGR] =3D { 0x400C0000, 0x10000 }, + [IBEX_DEV_AES] =3D { 0x40110000, 0x10000 }, + [IBEX_DEV_HMAC] =3D { 0x40120000, 0x10000 }, + [IBEX_DEV_ALERT_HANDLER] =3D { 0x40130000, 0x10000 }, + [IBEX_DEV_NMI_GEN] =3D { 0x40140000, 0x10000 }, + [IBEX_DEV_USBDEV] =3D { 0x40150000, 0x10000 }, + [IBEX_DEV_PADCTRL] =3D { 0x40160000, 0x10000 } }; =20 static void opentitan_board_init(MachineState *machine) @@ -66,12 +66,12 @@ static void opentitan_board_init(MachineState *machine) qdev_realize(DEVICE(&s->soc), NULL, &error_abort); =20 memory_region_init_ram(main_mem, NULL, "riscv.lowrisc.ibex.ram", - memmap[IBEX_RAM].size, &error_fatal); + memmap[IBEX_DEV_RAM].size, &error_fatal); memory_region_add_subregion(sys_mem, - memmap[IBEX_RAM].base, main_mem); + memmap[IBEX_DEV_RAM].base, main_mem); =20 if (machine->firmware) { - riscv_load_firmware(machine->firmware, memmap[IBEX_RAM].base, NULL= ); + riscv_load_firmware(machine->firmware, memmap[IBEX_DEV_RAM].base, = NULL); } =20 if (machine->kernel_filename) { @@ -115,28 +115,28 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev= _soc, Error **errp) =20 /* Boot ROM */ memory_region_init_rom(&s->rom, OBJECT(dev_soc), "riscv.lowrisc.ibex.r= om", - memmap[IBEX_ROM].size, &error_fatal); + memmap[IBEX_DEV_ROM].size, &error_fatal); memory_region_add_subregion(sys_mem, - memmap[IBEX_ROM].base, &s->rom); + memmap[IBEX_DEV_ROM].base, &s->rom); =20 /* Flash memory */ memory_region_init_rom(&s->flash_mem, OBJECT(dev_soc), "riscv.lowrisc.= ibex.flash", - memmap[IBEX_FLASH].size, &error_fatal); - memory_region_add_subregion(sys_mem, memmap[IBEX_FLASH].base, + memmap[IBEX_DEV_FLASH].size, &error_fatal); + memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH].base, &s->flash_mem); =20 /* PLIC */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->plic), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->plic), 0, memmap[IBEX_PLIC].base); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->plic), 0, memmap[IBEX_DEV_PLIC].bas= e); =20 /* UART */ qdev_prop_set_chr(DEVICE(&(s->uart)), "chardev", serial_hd(0)); if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart), errp)) { return; } - sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart), 0, memmap[IBEX_UART].base); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart), 0, memmap[IBEX_DEV_UART].bas= e); sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 0, qdev_get_gpio_in(DEVICE(&s->plic), IBEX_UART_TX_WATERMARK_IRQ)); @@ -151,33 +151,33 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev= _soc, Error **errp) IBEX_UART_RX_OVERFLOW_IRQ)); =20 create_unimplemented_device("riscv.lowrisc.ibex.gpio", - memmap[IBEX_GPIO].base, memmap[IBEX_GPIO].size); + memmap[IBEX_DEV_GPIO].base, memmap[IBEX_DEV_GPIO].size); create_unimplemented_device("riscv.lowrisc.ibex.spi", - memmap[IBEX_SPI].base, memmap[IBEX_SPI].size); + memmap[IBEX_DEV_SPI].base, memmap[IBEX_DEV_SPI].size); create_unimplemented_device("riscv.lowrisc.ibex.flash_ctrl", - memmap[IBEX_FLASH_CTRL].base, memmap[IBEX_FLASH_CTRL].size); + memmap[IBEX_DEV_FLASH_CTRL].base, memmap[IBEX_DEV_FLASH_CTRL].size= ); create_unimplemented_device("riscv.lowrisc.ibex.rv_timer", - memmap[IBEX_RV_TIMER].base, memmap[IBEX_RV_TIMER].size); + memmap[IBEX_DEV_RV_TIMER].base, memmap[IBEX_DEV_RV_TIMER].size); create_unimplemented_device("riscv.lowrisc.ibex.pwrmgr", - memmap[IBEX_PWRMGR].base, memmap[IBEX_PWRMGR].size); + memmap[IBEX_DEV_PWRMGR].base, memmap[IBEX_DEV_PWRMGR].size); create_unimplemented_device("riscv.lowrisc.ibex.rstmgr", - memmap[IBEX_RSTMGR].base, memmap[IBEX_RSTMGR].size); + memmap[IBEX_DEV_RSTMGR].base, memmap[IBEX_DEV_RSTMGR].size); create_unimplemented_device("riscv.lowrisc.ibex.clkmgr", - memmap[IBEX_CLKMGR].base, memmap[IBEX_CLKMGR].size); + memmap[IBEX_DEV_CLKMGR].base, memmap[IBEX_DEV_CLKMGR].size); create_unimplemented_device("riscv.lowrisc.ibex.aes", - memmap[IBEX_AES].base, memmap[IBEX_AES].size); + memmap[IBEX_DEV_AES].base, memmap[IBEX_DEV_AES].size); create_unimplemented_device("riscv.lowrisc.ibex.hmac", - memmap[IBEX_HMAC].base, memmap[IBEX_HMAC].size); + memmap[IBEX_DEV_HMAC].base, memmap[IBEX_DEV_HMAC].size); create_unimplemented_device("riscv.lowrisc.ibex.pinmux", - memmap[IBEX_PINMUX].base, memmap[IBEX_PINMUX].size); + memmap[IBEX_DEV_PINMUX].base, memmap[IBEX_DEV_PINMUX].size); create_unimplemented_device("riscv.lowrisc.ibex.alert_handler", - memmap[IBEX_ALERT_HANDLER].base, memmap[IBEX_ALERT_HANDLER].size); + memmap[IBEX_DEV_ALERT_HANDLER].base, memmap[IBEX_DEV_ALERT_HANDLER= ].size); create_unimplemented_device("riscv.lowrisc.ibex.nmi_gen", - memmap[IBEX_NMI_GEN].base, memmap[IBEX_NMI_GEN].size); + memmap[IBEX_DEV_NMI_GEN].base, memmap[IBEX_DEV_NMI_GEN].size); create_unimplemented_device("riscv.lowrisc.ibex.usbdev", - memmap[IBEX_USBDEV].base, memmap[IBEX_USBDEV].size); + memmap[IBEX_DEV_USBDEV].base, memmap[IBEX_DEV_USBDEV].size); create_unimplemented_device("riscv.lowrisc.ibex.padctrl", - memmap[IBEX_PADCTRL].base, memmap[IBEX_PADCTRL].size); + memmap[IBEX_DEV_PADCTRL].base, memmap[IBEX_DEV_PADCTRL].size); } =20 static void lowrisc_ibex_soc_class_init(ObjectClass *oc, void *data) --=20 2.26.2