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bh=UDAB9lmlWJRibKtreg8TJ47DL+Yfto/OwhiERIuiAAc=; b=cYd6m+Hk0kJP8mSN52Yyn/0xlYnbIbFVaSGDJQAEuAI6dWG/zJuz+DTngYJevKPaIMktMA vxIjMnRCQbyz0r5j17Fl3tMXkZHeh35m3ig1FJrwIPvYFVSOfMAeleAwNl4kENEj7JeXMO nc7W8gi5Aynf8Le30eGG6ofdZ5aFIy4= X-MC-Unique: Wtdeo2QeNKu9WKP08wxvfA-1 From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 24/53] armsse: Rename QOM macros to avoid conflicts Date: Thu, 27 Aug 2020 15:20:53 -0400 Message-Id: <20200827192122.658035-25-ehabkost@redhat.com> In-Reply-To: <20200827192122.658035-1-ehabkost@redhat.com> References: <20200827192122.658035-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ehabkost@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.139.110.61; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/27 07:16:16 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.959, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Roman Bolshakov , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Rename TYPE_ARMSSE to TYPE_ARM_SSE, and ARMSSE*() type checking macros to ARM_SSE*(). This will avoid a future conflict between an ARM_SSE() type checking macro and the ARMSSE typedef name. Reviewed-by: Daniel P. Berrang=C3=A9 Signed-off-by: Eduardo Habkost Tested-By: Roman Bolshakov Message-Id: <20200825192110.3528606-26-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/arm/armsse.h | 12 ++++++------ hw/arm/armsse.c | 24 ++++++++++++------------ 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index 84080c2299..529816286d 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -106,8 +106,8 @@ #include "hw/core/split-irq.h" #include "hw/cpu/cluster.h" =20 -#define TYPE_ARMSSE "arm-sse" -#define ARMSSE(obj) OBJECT_CHECK(ARMSSE, (obj), TYPE_ARMSSE) +#define TYPE_ARM_SSE "arm-sse" +#define ARM_SSE(obj) OBJECT_CHECK(ARMSSE, (obj), TYPE_ARM_SSE) =20 /* * These type names are for specific IoTKit subsystems; other than @@ -224,9 +224,9 @@ typedef struct ARMSSEClass { const ARMSSEInfo *info; } ARMSSEClass; =20 -#define ARMSSE_CLASS(klass) \ - OBJECT_CLASS_CHECK(ARMSSEClass, (klass), TYPE_ARMSSE) -#define ARMSSE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(ARMSSEClass, (obj), TYPE_ARMSSE) +#define ARM_SSE_CLASS(klass) \ + OBJECT_CLASS_CHECK(ARMSSEClass, (klass), TYPE_ARM_SSE) +#define ARM_SSE_GET_CLASS(obj) \ + OBJECT_GET_CLASS(ARMSSEClass, (obj), TYPE_ARM_SSE) =20 #endif diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index dcbff9bd8f..6264eab16b 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -167,7 +167,7 @@ static void irq_status_forwarder(void *opaque, int n, i= nt level) =20 static void nsccfg_handler(void *opaque, int n, int level) { - ARMSSE *s =3D ARMSSE(opaque); + ARMSSE *s =3D ARM_SSE(opaque); =20 s->nsccfg =3D level; } @@ -233,8 +233,8 @@ static void armsse_forward_sec_resp_cfg(ARMSSE *s) =20 static void armsse_init(Object *obj) { - ARMSSE *s =3D ARMSSE(obj); - ARMSSEClass *asc =3D ARMSSE_GET_CLASS(obj); + ARMSSE *s =3D ARM_SSE(obj); + ARMSSEClass *asc =3D ARM_SSE_GET_CLASS(obj); const ARMSSEInfo *info =3D asc->info; int i; =20 @@ -391,7 +391,7 @@ static void armsse_exp_irq(void *opaque, int n, int lev= el) =20 static void armsse_mpcexp_status(void *opaque, int n, int level) { - ARMSSE *s =3D ARMSSE(opaque); + ARMSSE *s =3D ARM_SSE(opaque); qemu_set_irq(s->mpcexp_status_in[n], level); } =20 @@ -401,7 +401,7 @@ static qemu_irq armsse_get_common_irq_in(ARMSSE *s, int= irqno) * Return a qemu_irq which can be used to signal IRQ n to * all CPUs in the SSE. */ - ARMSSEClass *asc =3D ARMSSE_GET_CLASS(s); + ARMSSEClass *asc =3D ARM_SSE_GET_CLASS(s); const ARMSSEInfo *info =3D asc->info; =20 assert(irq_is_common[irqno]); @@ -428,8 +428,8 @@ static void map_ppu(ARMSSE *s, int ppuidx, const char *= name, hwaddr addr) =20 static void armsse_realize(DeviceState *dev, Error **errp) { - ARMSSE *s =3D ARMSSE(dev); - ARMSSEClass *asc =3D ARMSSE_GET_CLASS(dev); + ARMSSE *s =3D ARM_SSE(dev); + ARMSSEClass *asc =3D ARM_SSE_GET_CLASS(dev); const ARMSSEInfo *info =3D asc->info; int i; MemoryRegion *mr; @@ -1114,7 +1114,7 @@ static void armsse_idau_check(IDAUInterface *ii, uint= 32_t address, * of the address bits. The NSC attribute is guest-adjustable via the * NSCCFG register in the security controller. */ - ARMSSE *s =3D ARMSSE(ii); + ARMSSE *s =3D ARM_SSE(ii); int region =3D extract32(address, 28, 4); =20 *ns =3D !(region & 1); @@ -1136,7 +1136,7 @@ static const VMStateDescription armsse_vmstate =3D { =20 static void armsse_reset(DeviceState *dev) { - ARMSSE *s =3D ARMSSE(dev); + ARMSSE *s =3D ARM_SSE(dev); =20 s->nsccfg =3D 0; } @@ -1145,7 +1145,7 @@ static void armsse_class_init(ObjectClass *klass, voi= d *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); IDAUInterfaceClass *iic =3D IDAU_INTERFACE_CLASS(klass); - ARMSSEClass *asc =3D ARMSSE_CLASS(klass); + ARMSSEClass *asc =3D ARM_SSE_CLASS(klass); const ARMSSEInfo *info =3D data; =20 dc->realize =3D armsse_realize; @@ -1157,7 +1157,7 @@ static void armsse_class_init(ObjectClass *klass, voi= d *data) } =20 static const TypeInfo armsse_info =3D { - .name =3D TYPE_ARMSSE, + .name =3D TYPE_ARM_SSE, .parent =3D TYPE_SYS_BUS_DEVICE, .instance_size =3D sizeof(ARMSSE), .instance_init =3D armsse_init, @@ -1177,7 +1177,7 @@ static void armsse_register_types(void) for (i =3D 0; i < ARRAY_SIZE(armsse_variants); i++) { TypeInfo ti =3D { .name =3D armsse_variants[i].name, - .parent =3D TYPE_ARMSSE, + .parent =3D TYPE_ARM_SSE, .class_init =3D armsse_class_init, .class_data =3D (void *)&armsse_variants[i], }; --=20 2.26.2