From nobody Mon Feb 9 20:32:50 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1598520240; cv=none; d=zohomail.com; s=zohoarc; b=cl6OGkeGTk8MwXkEIn0aUL1FNisv33mnH3HEqmsv1OqOigDgGQDqC7diUfTAiheCnt4a0mHGWSD+oLDnpS7oWX6XnqCHSiMQnVx2V7lu1DwxB7rQVzL0e6uLR/9BCc7S+jEJIBV1ixsVmnXr1hy/k3k14yyNPEg5okSXQgM9GeE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1598520240; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=IDyL0XUtMqXtiXGTjoUdfi6abz14fl+7mrSazDWNDfA=; b=cEXe4XX2nlka3CrkaT7EsyDgkYkcfZUXnRrOoz/FmPgJTeuJdmN78IDJ83TH5anB/7uzHyWBfe788akpgGDpBriZSzoAIN67y9wAs8e3s/9JcA5nazMzKnJTwGESq8TTHtUcKoI0U8jx6hLv50lDyCwlPCN+rvYP9UqptwQ4dc4= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 159852024013214.78571476301397; Thu, 27 Aug 2020 02:24:00 -0700 (PDT) Received: from localhost ([::1]:55334 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kBE8U-0004Sw-Tg for importer@patchew.org; Thu, 27 Aug 2020 05:23:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56994) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBE7M-0002fZ-AD; Thu, 27 Aug 2020 05:22:48 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:56348 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBE7I-0003FZ-TX; Thu, 27 Aug 2020 05:22:48 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id B558FEA7BFE0E03DBA3A; Thu, 27 Aug 2020 17:22:40 +0800 (CST) Received: from huawei.com (10.174.187.31) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Thu, 27 Aug 2020 17:22:30 +0800 From: Yifei Jiang To: , Subject: [PATCH RFC v3 06/14] target/riscv: Support start kernel directly by KVM Date: Thu, 27 Aug 2020 17:21:29 +0800 Message-ID: <20200827092137.479-7-jiangyifei@huawei.com> X-Mailer: git-send-email 2.26.2.windows.1 In-Reply-To: <20200827092137.479-1-jiangyifei@huawei.com> References: <20200827092137.479-1-jiangyifei@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.174.187.31] X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=45.249.212.35; envelope-from=jiangyifei@huawei.com; helo=huawei.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/27 05:22:41 X-ACL-Warn: Detected OS = Linux 3.11 and newer [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: victor.zhangxiaofeng@huawei.com, sagark@eecs.berkeley.edu, kvm@vger.kernel.org, libvir-list@redhat.com, kbastian@mail.uni-paderborn.de, anup.patel@wdc.com, yinyipeng1@huawei.com, Alistair.Francis@wdc.com, Yifei Jiang , kvm-riscv@lists.infradead.org, palmer@dabbelt.com, dengkai1@huawei.com, wu.wubin@huawei.com, zhang.zhanghailiang@huawei.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Get kernel and fdt start address in virt.c, and pass them to KVM when cpu reset. In addition, add kvm_riscv.h to place riscv specific interface. Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin --- hw/riscv/virt.c | 8 ++++++++ target/riscv/cpu.c | 4 ++++ target/riscv/cpu.h | 3 +++ target/riscv/kvm.c | 14 ++++++++++++++ target/riscv/kvm_riscv.h | 24 ++++++++++++++++++++++++ 5 files changed, 53 insertions(+) create mode 100644 target/riscv/kvm_riscv.h diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 6e91cf129e..e3336522bf 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -41,6 +41,7 @@ #include "sysemu/sysemu.h" #include "hw/pci/pci.h" #include "hw/pci-host/gpex.h" +#include "sysemu/kvm.h" =20 #if defined(TARGET_RISCV32) # define BIOS_FILENAME "opensbi-riscv32-generic-fw_dynamic.bin" @@ -482,6 +483,7 @@ static void virt_machine_init(MachineState *machine) uint64_t kernel_entry; int i; unsigned int smp_cpus =3D machine->smp.cpus; + CPUState *cs; =20 /* Initialize SOC */ object_initialize_child(OBJECT(machine), "soc", &s->soc, @@ -547,6 +549,12 @@ static void virt_machine_init(MachineState *machine) virt_memmap[VIRT_MROM].size, kernel_entry, fdt_load_addr, s->fdt); =20 + for (cs =3D first_cpu; cs; cs =3D CPU_NEXT(cs)) { + RISCVCPU *riscv_cpu =3D RISCV_CPU(cs); + riscv_cpu->env.kernel_addr =3D kernel_entry; + riscv_cpu->env.fdt_addr =3D fdt_load_addr; + } + /* create PLIC hart topology configuration string */ plic_hart_config_len =3D (strlen(VIRT_PLIC_HART_CONFIG) + 1) * smp_cpu= s; plic_hart_config =3D g_malloc0(plic_hart_config_len); diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 228b9bdb5d..266e70cc47 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -28,6 +28,7 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "fpu/softfloat-helpers.h" +#include "kvm_riscv.h" =20 /* RISC-V CPU definitions */ =20 @@ -321,6 +322,9 @@ static void riscv_cpu_reset(DeviceState *dev) cs->exception_index =3D EXCP_NONE; env->load_res =3D -1; set_default_nan_mode(1, &env->fp_status); +#ifdef CONFIG_KVM + kvm_riscv_reset_vcpu(cpu); +#endif } =20 static void riscv_cpu_disas_set_info(CPUState *s, disassemble_info *info) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index a804a5d0ba..d4cafe37e1 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -229,6 +229,9 @@ struct CPURISCVState { =20 /* Fields from here on are preserved across CPU reset. */ QEMUTimer *timer; /* Internal timer */ + + hwaddr kernel_addr; + hwaddr fdt_addr; }; =20 #define RISCV_CPU_CLASS(klass) \ diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c index 7afb4263e9..69217add16 100644 --- a/target/riscv/kvm.c +++ b/target/riscv/kvm.c @@ -37,6 +37,7 @@ #include "hw/irq.h" #include "qemu/log.h" #include "hw/loader.h" +#include "kvm_riscv.h" =20 static __u64 kvm_riscv_reg_id(__u64 type, __u64 idx) { @@ -438,3 +439,16 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run = *run) { return 0; } + +void kvm_riscv_reset_vcpu(RISCVCPU *cpu) +{ + CPURISCVState *env =3D &cpu->env; + + if (!kvm_enabled()) { + return; + } + env->pc =3D cpu->env.kernel_addr; + env->gpr[10] =3D kvm_arch_vcpu_id(CPU(cpu)); /* a0 */ + env->gpr[11] =3D cpu->env.fdt_addr; /* a1 */ +} + diff --git a/target/riscv/kvm_riscv.h b/target/riscv/kvm_riscv.h new file mode 100644 index 0000000000..f38c82bf59 --- /dev/null +++ b/target/riscv/kvm_riscv.h @@ -0,0 +1,24 @@ +/* + * QEMU KVM support -- RISC-V specific functions. + * + * Copyright (c) 2020 Huawei Technologies Co., Ltd + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License f= or + * more details. + * + * You should have received a copy of the GNU General Public License along= with + * this program. If not, see . + */ + +#ifndef QEMU_KVM_RISCV_H +#define QEMU_KVM_RISCV_H + +void kvm_riscv_reset_vcpu(RISCVCPU *cpu); + +#endif --=20 2.19.1