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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id g70sm7407388wmg.24.2020.08.25.09.08.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Aug 2020 09:08:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=+rL5y+LPIlyoU3TM7H1gns6WWZrHXRx5K1wFTm/QiuM=; b=xJZuXVRL1iwjKNnf33xvxu/cxUSn5DVXtEewSZkRHgU0staU6fGAjc2cBi6kYEl4zS JrKEQDgqJBN9lUozSLjigFTYFZfrFEDkWrNaTRFTgUx1yzPjXjEZ6x0RSzmKoNq4lpDB 1enJxz5UE+yZOv/0O1qXXLeJgVRhg92BenyDtkWi5qMYx3SGShPwT/3Rxrajby/r5H9n vXlZcvuSDn1S/cI/n4gQEwr0/49vwG5PtRTZp24DyKXOoE4sVFqmhndKtpt6E249k4wy qDOrQ3PuzD2JGphhRdPxYU9MNLCILv6xHukp68gAkbhaUf7M1MjUpWMcs9idvFUmgG6t EOKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=+rL5y+LPIlyoU3TM7H1gns6WWZrHXRx5K1wFTm/QiuM=; b=doOJ3Vz00gbB5zpPLCEzVs+eK4gXi+oQHMf9P4cJmthkaqRrOvkSgtxy43afRvCTaF dytEiD0pc/SgbmAY43H7VMzXsOAv5KFF57PAH5YyGwgPZbFFdQyZm2oTC14CMSQexPmu vaE91ztQ2yCn4uqVikNmCCTtKn1rwBLXvBuieGeXbu3wW1A7ixGXwUSWQBzXnAW95j6Y mKxy0NLwhnJAmX/IQtMOYHf4zccDxkXow7ftuIl4NuU0AxULezxGlxxLzUZ+s5lJKHgr uNY+0afpqFJEkhwighsS8XqoZLdxZA06EPfcaRNcbCTaarl/DboBNr1Fn36tmFxeoEfj GG+g== X-Gm-Message-State: AOAM531ch9OfOD6ZjlhJt2T8EJmtpBAR2J8T6vAQbH1E41+4I8unR7s8 7MsjIyzhu53L5NR1EXp9iuaAGg== X-Google-Smtp-Source: ABdhPJy2QTqLyT9oND6vSaVf8Qnmi/C2jf4i1iBCGvO/nFHI/Fs+Gp12cySADrREWtQLsCd2WE7H9w== X-Received: by 2002:a5d:4e03:: with SMTP id p3mr7901325wrt.354.1598371729571; Tue, 25 Aug 2020 09:08:49 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH] hw/timer/armv7m_systick: assert that board code set system_clock_scale Date: Tue, 25 Aug 2020 17:08:47 +0100 Message-Id: <20200825160847.18091-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::443; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x443.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" It is the responsibility of board code for an armv7m system to set system_clock_scale appropriately for the CPU speed of the core. If it forgets to do this, then QEMU will hang if the guest tries to use the systick timer in the "tick at the CPU clock frequency" mode. We forgot that in a couple of our boards (see commits ce4f70e81ed23c93f, e7e5a9595ab1136). Add an assertion in the systick reset method so we don't let any new boards in with the same bug. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- In the longer term we should make this a clocktree input and plumb it through the armv7m container and so on, but for the moment this assert() improves the current situation. --- hw/timer/armv7m_systick.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/timer/armv7m_systick.c b/hw/timer/armv7m_systick.c index 74c58bcf245..a8cec7eb56b 100644 --- a/hw/timer/armv7m_systick.c +++ b/hw/timer/armv7m_systick.c @@ -202,6 +202,14 @@ static void systick_reset(DeviceState *dev) { SysTickState *s =3D SYSTICK(dev); =20 + /* + * Forgetting to set system_clock_scale is always a board code + * bug. We can't check this earlier because for some boards + * (like stellaris) it is not yet configured at the point where + * the systick device is realized. + */ + assert(system_clock_scale !=3D 0); + s->control =3D 0; s->reload =3D 0; s->tick =3D 0; --=20 2.20.1