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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id q6sm24877057wma.22.2020.08.24.02.48.25 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Aug 2020 02:48:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=6kPWsc9hK5bWcqLb2sRsR3vabCpYIdyWe54DMmHZ/ow=; b=PnYaNqnzqSE4MqGBwRowlNMbxvyRyxRfEFCpEHYKlK5xaWaXC7AwTYyDqgLG+RzduN 80dxp0Y3HGOfnA2oY0L04FuTl/1Khx30SJOeaRYjxmL1phbBOkUod6zni5U1rtRpJp5U k/G7fxnsSFhFWr9bDkrE6e7CQPu9MKWsjNkaxhu16aCp/mF4FaN8JGBU6nxKgJ97Uecg LZ9h2EzMJSb33kgjWka+xBYFq3QRIeqSgM2PpayMrxCQziSVM+4fH+U6gITKQYATJhY/ 8L1WQE5bxTtUHBCvOPE8PwInxhfoJEeryHTQfVLq7LZ2O+yu9G+Dl4Rtqr8jqd6AD8h9 yL/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6kPWsc9hK5bWcqLb2sRsR3vabCpYIdyWe54DMmHZ/ow=; b=UrZ5dkOuwVmW3DYSYav7g3aZLW+sFSakQ4sRGKhlDicS9SUamtH70SGvFz/sguqtEy WhhiEUkpv9wAmBPuXs0LMd382An5RMIUFmSvXS5NgF6KK3D8oPBKp+bjKM+Bbc/1NRXt Qr5EmFb5jatrRv2tru7CfmHD4QUmatf0s5KrVmppc843qKz4COFC9Fv+JI/WSvrPKB+H mno+AYYqA/X0OqSL3J9jznc7mHwDwSVcPfdVAfbEY0eTaklNvEnIJ0wwTsrkCgAPntAv 438A39eBgpzmIcuxFzdr5nMPAwBYxoelS2Rwr/2fGfYvMxbetCYVquUiY4XEVzxDTxD1 xnqA== X-Gm-Message-State: AOAM531y/FABMesMXsSMZD393kVryY0FB6hMGy1jhXECYg2FQpFranDS 5QF18ksUz5n8jD5pOEVqWAjaQnzCd8q7ujov X-Google-Smtp-Source: ABdhPJzd9wWcGWTlAF7Mu5m2EMhL7xFpJOn7U/s2Mqv1MDcGQdiPqBE6bXH/B45zhmibMoJtsoX90g== X-Received: by 2002:adf:edc6:: with SMTP id v6mr4955796wro.221.1598262506471; Mon, 24 Aug 2020 02:48:26 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 11/27] hw/arm/smmuv3: Support HAD and advertise SMMUv3.1 support Date: Mon, 24 Aug 2020 10:47:55 +0100 Message-Id: <20200824094811.15439-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200824094811.15439-1-peter.maydell@linaro.org> References: <20200824094811.15439-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Eric Auger HAD is a mandatory features with SMMUv3.1 if S1P is set, which is our case. Other 3.1 mandatory features come with S2P which we don't have. So let's support HAD and advertise SMMUv3.1 support in AIDR. HAD support allows the CD to disable hierarchical attributes, ie. if the HAD0/1 bit is set, the APTable field of table descriptors walked through TTB0/1 is ignored. Signed-off-by: Eric Auger Reviewed-by: Peter Maydell Message-id: 20200728150815.11446-11-eric.auger@redhat.com Signed-off-by: Peter Maydell --- hw/arm/smmuv3-internal.h | 2 ++ include/hw/arm/smmu-common.h | 1 + hw/arm/smmu-common.c | 2 +- hw/arm/smmuv3.c | 6 +++++- hw/arm/trace-events | 2 +- 5 files changed, 10 insertions(+), 3 deletions(-) diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h index bd34a4f3300..9ae7d97fafd 100644 --- a/hw/arm/smmuv3-internal.h +++ b/hw/arm/smmuv3-internal.h @@ -54,6 +54,7 @@ REG32(IDR1, 0x4) =20 REG32(IDR2, 0x8) REG32(IDR3, 0xc) + FIELD(IDR3, HAD, 2, 1); REG32(IDR4, 0x10) REG32(IDR5, 0x14) FIELD(IDR5, OAS, 0, 3); @@ -578,6 +579,7 @@ static inline int pa_range(STE *ste) lo =3D (x)->word[(sel) * 2 + 2] & ~0xfULL; \ hi | lo; \ }) +#define CD_HAD(x, sel) extract32((x)->word[(sel) * 2 + 2], 1, 1) =20 #define CD_TSZ(x, sel) extract32((x)->word[0], (16 * (sel)) + 0, 6) #define CD_TG(x, sel) extract32((x)->word[0], (16 * (sel)) + 6, 2) diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h index 4f6acf634cf..880dccd7c04 100644 --- a/include/hw/arm/smmu-common.h +++ b/include/hw/arm/smmu-common.h @@ -50,6 +50,7 @@ typedef struct SMMUTransTableInfo { uint64_t ttb; /* TT base address */ uint8_t tsz; /* input range, ie. 2^(64 -tsz)*/ uint8_t granule_sz; /* granule page shift */ + bool had; /* hierarchical attribute disable */ } SMMUTransTableInfo; =20 typedef struct SMMUTLBEntry { diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index 8d89a86699a..3838db13952 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -316,7 +316,7 @@ static int smmu_ptw_64(SMMUTransCfg *cfg, if (is_table_pte(pte, level)) { ap =3D PTE_APTABLE(pte); =20 - if (is_permission_fault(ap, perm)) { + if (is_permission_fault(ap, perm) && !tt->had) { info->type =3D SMMU_PTW_ERR_PERMISSION; goto error; } diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 718f28462ea..b262f0e4a74 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -254,6 +254,8 @@ static void smmuv3_init_regs(SMMUv3State *s) s->idr[1] =3D FIELD_DP32(s->idr[1], IDR1, EVENTQS, SMMU_EVENTQS); s->idr[1] =3D FIELD_DP32(s->idr[1], IDR1, CMDQS, SMMU_CMDQS); =20 + s->idr[3] =3D FIELD_DP32(s->idr[3], IDR3, HAD, 1); + /* 4K and 64K granule support */ s->idr[5] =3D FIELD_DP32(s->idr[5], IDR5, GRAN4K, 1); s->idr[5] =3D FIELD_DP32(s->idr[5], IDR5, GRAN64K, 1); @@ -270,6 +272,7 @@ static void smmuv3_init_regs(SMMUv3State *s) =20 s->features =3D 0; s->sid_split =3D 0; + s->aidr =3D 0x1; } =20 static int smmu_get_ste(SMMUv3State *s, dma_addr_t addr, STE *buf, @@ -506,7 +509,8 @@ static int decode_cd(SMMUTransCfg *cfg, CD *cd, SMMUEve= ntInfo *event) if (tt->ttb & ~(MAKE_64BIT_MASK(0, cfg->oas))) { goto bad_cd; } - trace_smmuv3_decode_cd_tt(i, tt->tsz, tt->ttb, tt->granule_sz); + tt->had =3D CD_HAD(cd, i); + trace_smmuv3_decode_cd_tt(i, tt->tsz, tt->ttb, tt->granule_sz, tt-= >had); } =20 event->record_trans_faults =3D CD_R(cd); diff --git a/hw/arm/trace-events b/hw/arm/trace-events index 3d905e0f7d0..c8a4d80f6bd 100644 --- a/hw/arm/trace-events +++ b/hw/arm/trace-events @@ -39,7 +39,7 @@ smmuv3_translate_abort(const char *n, uint16_t sid, uint6= 4_t addr, bool is_write smmuv3_translate_success(const char *n, uint16_t sid, uint64_t iova, uint6= 4_t translated, int perm) "%s sid=3D%d iova=3D0x%"PRIx64" translated=3D0x%"= PRIx64" perm=3D0x%x" smmuv3_get_cd(uint64_t addr) "CD addr: 0x%"PRIx64 smmuv3_decode_cd(uint32_t oas) "oas=3D%d" -smmuv3_decode_cd_tt(int i, uint32_t tsz, uint64_t ttb, uint32_t granule_sz= ) "TT[%d]:tsz:%d ttb:0x%"PRIx64" granule_sz:%d" +smmuv3_decode_cd_tt(int i, uint32_t tsz, uint64_t ttb, uint32_t granule_sz= , bool had) "TT[%d]:tsz:%d ttb:0x%"PRIx64" granule_sz:%d had:%d" smmuv3_cmdq_cfgi_ste(int streamid) "streamid =3D%d" smmuv3_cmdq_cfgi_ste_range(int start, int end) "start=3D0x%d - end=3D0x%d" smmuv3_cmdq_cfgi_cd(uint32_t sid) "streamid =3D %d" --=20 2.20.1