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[81.40.121.121]) by smtp.gmail.com with ESMTPSA id g14sm598098wmk.37.2020.08.18.09.45.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Aug 2020 09:45:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1597769135; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EDUa2xT6CyPSFbp3gmOWIajlvuy8ALEmH1Y6JKlFOn4=; b=QEsT/frjdleDo2z6jkkHj21mbKEYv5WEzCU+f4uOBUlmio2STzp+pRpoG6Tx4P/I/73gQ4 sA9IWO/vDd0OJEMsSqVfI5c2v2D3CSjuMTZgiIZmQl66DGwepqMxLlmFmV5M/angPNBvdq m8GAnUY6yWJzq8Tbp42rWYe1814Xi0g= X-MC-Unique: SCjOOudMOeyQRHqDMjdbLg-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EDUa2xT6CyPSFbp3gmOWIajlvuy8ALEmH1Y6JKlFOn4=; b=JyZSFJmjxG8pdnlhogU6JesVL1tgtddt5V+H53gsBJyBTEL2KEfOl+DX9kIdTmyLlO Dcs78hieyRv1xY2ux9meKuRuRp0LTL3zJ4j2f1FK0tPG95zr0ewfiw0jv97QxUkT+Qdk p0PzgolUafL23+STyf2V0+jPVyU41zwZpyFApDFiD0zBwF9pqFyZ7CttE2oQ09pZaALg p3EmLrbvzqtbxvQZB3ULmUxDiK12J2/jsAZCNlAYAd6ox4J9lpAJ8VoMji037JhBNlm2 L2wYfCwJdv8O6bcRY/i475Ciswh2SD6Ms9eDqRU9mMPu8g00NNLu+7uCfKEqzErTUki9 gY9Q== X-Gm-Message-State: AOAM532JGKCdfN7iBla2xZxrFmD/GF1g+17e3INGElgS9P1nS31fKQZn cP3wIYNtcszaXhfL6UCc1iyw1vALtO+XT5INhZ+FG7+gKqMDj3KIaRY3m2f9crIIDC2en9mkyzz HRbFJbOac/VA8ec0= X-Received: by 2002:adf:b1dc:: with SMTP id r28mr121647wra.242.1597769131862; Tue, 18 Aug 2020 09:45:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxIn2qrl3iX+cB4Q+434IZczlOFkLoHvdMX1wc2QkYdFhuiYrhLgNMZ+iLsAiufRanv24hVJQ== X-Received: by 2002:adf:b1dc:: with SMTP id r28mr121624wra.242.1597769131675; Tue, 18 Aug 2020 09:45:31 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [RFC PATCH v3 4/5] util/vfio-helpers: Introduce qemu_vfio_pci_init_msix_irqs() Date: Tue, 18 Aug 2020 18:45:08 +0200 Message-Id: <20200818164509.736367-5-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200818164509.736367-1-philmd@redhat.com> References: <20200818164509.736367-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0.003 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8"; text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/18 03:22:11 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=-1, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , qemu-block@nongnu.org, Max Reitz , Alex Williamson , Stefan Hajnoczi , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) qemu_vfio_pci_init_irq() allows us to initialize any type of IRQ, but only one. Introduce qemu_vfio_pci_init_msix_irqs() which is specific to MSIX IRQ type, and allow us to use multiple IRQs (thus passing multiple eventfd notifiers). Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/qemu/vfio-helpers.h | 2 ++ util/vfio-helpers.c | 53 +++++++++++++++++++++++++++++++++++++ 2 files changed, 55 insertions(+) diff --git a/include/qemu/vfio-helpers.h b/include/qemu/vfio-helpers.h index 1f057c2b9e4..63108ebc8da 100644 --- a/include/qemu/vfio-helpers.h +++ b/include/qemu/vfio-helpers.h @@ -28,5 +28,7 @@ void qemu_vfio_pci_unmap_bar(QEMUVFIOState *s, int index,= void *bar, uint64_t offset, uint64_t size); int qemu_vfio_pci_init_irq(QEMUVFIOState *s, EventNotifier *e, int irq_type, Error **errp); +int qemu_vfio_pci_init_msix_irqs(QEMUVFIOState *s, EventNotifier *e, + unsigned irq_count, Error **errp); =20 #endif diff --git a/util/vfio-helpers.c b/util/vfio-helpers.c index 696f2d51712..fb3a79a5bcb 100644 --- a/util/vfio-helpers.c +++ b/util/vfio-helpers.c @@ -215,6 +215,59 @@ int qemu_vfio_pci_init_irq(QEMUVFIOState *s, EventNoti= fier *e, return 0; } =20 +/** + * Initialize device MSIX IRQs and register event notifiers. + * @irq_count: number of MSIX IRQs to initialize + * @e: Array of @irq_count notifiers (each corresponding to a MSIX IRQ) + */ +int qemu_vfio_pci_init_msix_irqs(QEMUVFIOState *s, EventNotifier *e, + unsigned irq_count, Error **errp) +{ + int r; + struct vfio_irq_set *irq_set; + size_t irq_set_size; + struct vfio_irq_info irq_info =3D { .argsz =3D sizeof(irq_info) }; + + irq_info.index =3D VFIO_PCI_MSIX_IRQ_INDEX; + if (ioctl(s->device, VFIO_DEVICE_GET_IRQ_INFO, &irq_info)) { + error_setg_errno(errp, errno, "Failed to get device interrupt info= "); + return -errno; + } + if (irq_info.count <=3D irq_count) { + error_setg(errp, + "Not enough device interrupts available (only %" PRIu32= ")", + irq_info.count); + return -EINVAL; + } + if (!(irq_info.flags & VFIO_IRQ_INFO_EVENTFD)) { + error_setg(errp, "Device interrupt doesn't support eventfd"); + return -EINVAL; + } + + irq_set_size =3D sizeof(*irq_set) + irq_count * sizeof(int32_t); + irq_set =3D g_malloc0(irq_set_size); + + /* Get to a known IRQ state */ + *irq_set =3D (struct vfio_irq_set) { + .argsz =3D irq_set_size, + .flags =3D VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER, + .index =3D irq_info.index, + .start =3D 0, + .count =3D irq_count, + }; + + for (unsigned i =3D 0; i < irq_count; i++) { + ((int32_t *)&irq_set->data)[i] =3D event_notifier_get_fd(&e[i]); + } + r =3D ioctl(s->device, VFIO_DEVICE_SET_IRQS, irq_set); + g_free(irq_set); + if (r) { + error_setg_errno(errp, errno, "Failed to setup device interrupts"); + return -errno; + } + return 0; +} + static int qemu_vfio_pci_read_config(QEMUVFIOState *s, void *buf, int size, int ofs) { --=20 2.26.2