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Tue, 18 Aug 2020 03:34:30 +0000 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 07I3YUVa53084456 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 18 Aug 2020 03:34:30 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 65525AC05B; Tue, 18 Aug 2020 03:34:30 +0000 (GMT) Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 706CFAC059; Tue, 18 Aug 2020 03:34:23 +0000 (GMT) Received: from morokweng.localdomain.com (unknown [9.211.138.167]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP; Tue, 18 Aug 2020 03:34:23 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=5Cp+2Pjd9M1dvY9eDK1iY1GEDvhSr53MHy1G+xNlYlQ=; b=D6v0p9KbMwMaNlo/upSL/zYD7tQlscocFY9DXoqVa9/DaXiTapk1vmYQ37OGQTkQiICl L1m6AGfWflnHhMP6esordhPN32CUIHFQDSwd0gXpz6Tyc0XqpyG5oXuWtc+8h/dhoJXM /OtmErxkLdAZknyuGsgi+Xx0yvZv/CEvzYJp7FU8N+gKW2vBMXGkJSzeIcr1rDUuzPTt 8S7DCV0Qg5y4Vm6k/L+cDG3nx3oEgEdU8JW2HaLTk4OG9DT1jQviu2KE2meRDV24RcNG ULkTDK05CQzrVFJs7t6jQ5HeyH+4zWuyE6a51lvoTr0v21gMzqJbBetj5JtJ4IUldC/x pA== From: Thiago Jung Bauermann To: qemu-ppc@nongnu.org Subject: [PATCH v4 5/8] mips/cps: Use start-powered-off CPUState property Date: Tue, 18 Aug 2020 00:33:20 -0300 Message-Id: <20200818033323.336912-6-bauerman@linux.ibm.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200818033323.336912-1-bauerman@linux.ibm.com> References: <20200818033323.336912-1-bauerman@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-08-18_01:2020-08-17, 2020-08-18 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 spamscore=0 mlxlogscore=999 bulkscore=0 suspectscore=1 priorityscore=1501 malwarescore=0 impostorscore=0 adultscore=0 clxscore=1015 phishscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2008180022 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Instead of setting CPUState::halted to 1 in main_cpu_reset(), use the start-powered-off property which makes cpu_common_reset() initialize it to 1 in common code. Also change creation of CPU object from cpu_create() to object_new() and qdev_realize() because cpu_create() realizes the CPU and it's not possible = to set a property after the object is realized. Signed-off-by: Thiago Jung Bauermann --- hw/mips/cps.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 615e1a1ad2..be85357dc0 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -52,9 +52,6 @@ static void main_cpu_reset(void *opaque) CPUState *cs =3D CPU(cpu); =20 cpu_reset(cs); - - /* All VPs are halted on reset. Leave powering up to CPC. */ - cs->halted =3D 1; } =20 static bool cpu_mips_itu_supported(CPUMIPSState *env) @@ -76,7 +73,9 @@ static void mips_cps_realize(DeviceState *dev, Error **er= rp) bool saar_present =3D false; =20 for (i =3D 0; i < s->num_vp; i++) { - cpu =3D MIPS_CPU(cpu_create(s->cpu_type)); + Error *err =3D NULL; + + cpu =3D MIPS_CPU(object_new(s->cpu_type)); =20 /* Init internal devices */ cpu_mips_irq_init_cpu(cpu); @@ -89,7 +88,16 @@ static void mips_cps_realize(DeviceState *dev, Error **e= rrp) env->itc_tag =3D mips_itu_get_tag_region(&s->itu); env->itu =3D &s->itu; } + /* All VPs are halted on reset. Leave powering up to CPC. */ + object_property_set_bool(OBJECT(cpu), "start-powered-off", true, + &error_abort); qemu_register_reset(main_cpu_reset, cpu); + + if (!qdev_realize(DEVICE(cpu), NULL, &err)) { + error_report_err(err); + object_unref(OBJECT(cpu)); + exit(EXIT_FAILURE); + } } =20 cpu =3D MIPS_CPU(first_cpu);