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That's all we know. X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Cornelia Huck , qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Cornelia Huck Add 5.2 machine types for arm/i440fx/q35/s390x/spapr. Signed-off-by: Cornelia Huck --- hw/arm/virt.c | 9 ++++++++- hw/core/machine.c | 3 +++ hw/i386/pc.c | 3 +++ hw/i386/pc_piix.c | 14 +++++++++++++- hw/i386/pc_q35.c | 13 ++++++++++++- hw/ppc/spapr.c | 15 +++++++++++++-- hw/s390x/s390-virtio-ccw.c | 14 +++++++++++++- include/hw/boards.h | 3 +++ include/hw/i386/pc.h | 3 +++ 9 files changed, 71 insertions(+), 6 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ecfee362a1..acf9bfbece 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2546,10 +2546,17 @@ static void machvirt_machine_init(void) } type_init(machvirt_machine_init); =20 +static void virt_machine_5_2_options(MachineClass *mc) +{ +} +DEFINE_VIRT_MACHINE_AS_LATEST(5, 2) + static void virt_machine_5_1_options(MachineClass *mc) { + virt_machine_5_2_options(mc); + compat_props_add(mc->compat_props, hw_compat_5_1, hw_compat_5_1_len); } -DEFINE_VIRT_MACHINE_AS_LATEST(5, 1) +DEFINE_VIRT_MACHINE(5, 1) =20 static void virt_machine_5_0_options(MachineClass *mc) { diff --git a/hw/core/machine.c b/hw/core/machine.c index 8d1a90c6cf..cf5f2dfaeb 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -28,6 +28,9 @@ #include "hw/mem/nvdimm.h" #include "migration/vmstate.h" =20 +GlobalProperty hw_compat_5_1[] =3D {}; +const size_t hw_compat_5_1_len =3D G_N_ELEMENTS(hw_compat_5_1); + GlobalProperty hw_compat_5_0[] =3D { { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, { "virtio-balloon-device", "page-poison", "false" }, diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 47c5ca3e34..9aa813949c 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -97,6 +97,9 @@ #include "fw_cfg.h" #include "trace.h" =20 +GlobalProperty pc_compat_5_1[] =3D {}; +const size_t pc_compat_5_1_len =3D G_N_ELEMENTS(pc_compat_5_1); + GlobalProperty pc_compat_5_0[] =3D { }; const size_t pc_compat_5_0_len =3D G_N_ELEMENTS(pc_compat_5_0); diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index b789e83f9a..c5ba70ca17 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -426,7 +426,7 @@ static void pc_i440fx_machine_options(MachineClass *m) machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE); } =20 -static void pc_i440fx_5_1_machine_options(MachineClass *m) +static void pc_i440fx_5_2_machine_options(MachineClass *m) { PCMachineClass *pcmc =3D PC_MACHINE_CLASS(m); pc_i440fx_machine_options(m); @@ -435,6 +435,18 @@ static void pc_i440fx_5_1_machine_options(MachineClass= *m) pcmc->default_cpu_version =3D 1; } =20 +DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL, + pc_i440fx_5_2_machine_options); + +static void pc_i440fx_5_1_machine_options(MachineClass *m) +{ + pc_i440fx_5_2_machine_options(m); + m->alias =3D NULL; + m->is_default =3D false; + compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len); + compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len); +} + DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL, pc_i440fx_5_1_machine_options); =20 diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index a3e607a544..0cb9c18cd4 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -353,7 +353,7 @@ static void pc_q35_machine_options(MachineClass *m) m->max_cpus =3D 288; } =20 -static void pc_q35_5_1_machine_options(MachineClass *m) +static void pc_q35_5_2_machine_options(MachineClass *m) { PCMachineClass *pcmc =3D PC_MACHINE_CLASS(m); pc_q35_machine_options(m); @@ -361,6 +361,17 @@ static void pc_q35_5_1_machine_options(MachineClass *m) pcmc->default_cpu_version =3D 1; } =20 +DEFINE_Q35_MACHINE(v5_2, "pc-q35-5.2", NULL, + pc_q35_5_2_machine_options); + +static void pc_q35_5_1_machine_options(MachineClass *m) +{ + pc_q35_5_2_machine_options(m); + m->alias =3D NULL; + compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len); + compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len); +} + DEFINE_Q35_MACHINE(v5_1, "pc-q35-5.1", NULL, pc_q35_5_1_machine_options); =20 diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index a5bb0736e2..dd2fa4826b 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -4581,15 +4581,26 @@ static void spapr_machine_latest_class_options(Mach= ineClass *mc) } \ type_init(spapr_machine_register_##suffix) =20 +/* + * pseries-5.2 + */ +static void spapr_machine_5_2_class_options(MachineClass *mc) +{ + /* Defaults for the latest behaviour inherited from the base class */ +} + +DEFINE_SPAPR_MACHINE(5_2, "5.2", true); + /* * pseries-5.1 */ static void spapr_machine_5_1_class_options(MachineClass *mc) { - /* Defaults for the latest behaviour inherited from the base class */ + spapr_machine_5_2_class_options(mc); + compat_props_add(mc->compat_props, hw_compat_5_1, hw_compat_5_1_len); } =20 -DEFINE_SPAPR_MACHINE(5_1, "5.1", true); +DEFINE_SPAPR_MACHINE(5_1, "5.1", false); =20 /* * pseries-5.0 diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index e72c61d2ea..f4ea6a9545 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -801,14 +801,26 @@ bool css_migration_enabled(void) } = \ type_init(ccw_machine_register_##suffix) =20 +static void ccw_machine_5_2_instance_options(MachineState *machine) +{ +} + +static void ccw_machine_5_2_class_options(MachineClass *mc) +{ +} +DEFINE_CCW_MACHINE(5_2, "5.2", true); + static void ccw_machine_5_1_instance_options(MachineState *machine) { + ccw_machine_5_2_instance_options(machine); } =20 static void ccw_machine_5_1_class_options(MachineClass *mc) { + ccw_machine_5_2_class_options(mc); + compat_props_add(mc->compat_props, hw_compat_5_1, hw_compat_5_1_len); } -DEFINE_CCW_MACHINE(5_1, "5.1", true); +DEFINE_CCW_MACHINE(5_1, "5.1", false); =20 static void ccw_machine_5_0_instance_options(MachineState *machine) { diff --git a/include/hw/boards.h b/include/hw/boards.h index 426ce5f625..bc5b82ad20 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -319,6 +319,9 @@ struct MachineState { } \ type_init(machine_initfn##_register_types) =20 +extern GlobalProperty hw_compat_5_1[]; +extern const size_t hw_compat_5_1_len; + extern GlobalProperty hw_compat_5_0[]; extern const size_t hw_compat_5_0_len; =20 diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 3d7ed3a55e..fe52e165b2 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -193,6 +193,9 @@ void pc_system_firmware_init(PCMachineState *pcms, Memo= ryRegion *rom_memory); void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, const CPUArchIdList *apic_ids, GArray *entry); =20 +extern GlobalProperty pc_compat_5_1[]; +extern const size_t pc_compat_5_1_len; + extern GlobalProperty pc_compat_5_0[]; extern const size_t pc_compat_5_0_len; =20 --=20 2.26.2 From nobody Tue May 14 21:06:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1597511228; cv=none; d=zohomail.com; s=zohoarc; b=AjTBkakDNLvMCX/xYnBLRQTNgF5YFwANwar2lJdW2aWCpeh1c+9wnKam63Np8G8noFJ7bwW3WbgKZlSXYfDfYodAdCMbBSoTZGFfeMUDlVpcuqD1ZhFpcGYu1MT+73EBDLehrivSU+nD37ohCoGXmmTAvOaBx1jo2IG8lt0iDj0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1597511228; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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That's all we know. X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, Eduardo Habkost , david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" The pSeries machine does not support asymmetrical NUMA configurations. CC: Eduardo Habkost CC: Marcel Apfelbaum Signed-off-by: Daniel Henrique Barboza --- hw/core/numa.c | 7 +++++++ hw/ppc/spapr.c | 1 + include/hw/boards.h | 1 + 3 files changed, 9 insertions(+) diff --git a/hw/core/numa.c b/hw/core/numa.c index d1a94a14f8..1e81233c1d 100644 --- a/hw/core/numa.c +++ b/hw/core/numa.c @@ -547,6 +547,7 @@ static int parse_numa(void *opaque, QemuOpts *opts, Err= or **errp) */ static void validate_numa_distance(MachineState *ms) { + MachineClass *mc =3D MACHINE_GET_CLASS(ms); int src, dst; bool is_asymmetrical =3D false; int nb_numa_nodes =3D ms->numa_state->num_nodes; @@ -575,6 +576,12 @@ static void validate_numa_distance(MachineState *ms) } =20 if (is_asymmetrical) { + if (mc->forbid_asymmetrical_numa) { + error_report("This machine type does not support " + "asymmetrical numa distances."); + exit(EXIT_FAILURE); + } + for (src =3D 0; src < nb_numa_nodes; src++) { for (dst =3D 0; dst < nb_numa_nodes; dst++) { if (src !=3D dst && numa_info[src].distance[dst] =3D=3D 0)= { diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index dd2fa4826b..3b16edaf4c 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -4512,6 +4512,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) */ mc->numa_mem_align_shift =3D 28; mc->auto_enable_numa =3D true; + mc->forbid_asymmetrical_numa =3D true; =20 smc->default_caps.caps[SPAPR_CAP_HTM] =3D SPAPR_CAP_OFF; smc->default_caps.caps[SPAPR_CAP_VSX] =3D SPAPR_CAP_ON; diff --git a/include/hw/boards.h b/include/hw/boards.h index bc5b82ad20..dc6cdd1c53 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -215,6 +215,7 @@ struct MachineClass { bool nvdimm_supported; bool numa_mem_supported; bool auto_enable_numa; + bool forbid_asymmetrical_numa; const char *default_ram_id; =20 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, --=20 2.26.2 From nobody Tue May 14 21:06:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1597506506; cv=none; d=zohomail.com; s=zohoarc; b=UXIQRxnrCa7uhQZMYu8kUXIU5qM+DNa86zgK29RogayNs+sVLd3GAPrVi/Ct+P+15xOWMSSKyw0eVELDO2jz47mxUCVgVt8oSgL7pdChMbcTi5BEvANkUP/RYzatfyNxww857V2HrCpliDYnH63L5wo63YwVRZgVyW2XKXV9ngk= ARC-Message-Signature: i=1; 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Fri, 14 Aug 2020 13:54:42 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Subject: [PATCH 03/10] spapr: robustify NVLink2 NUMA node logic Date: Fri, 14 Aug 2020 17:54:17 -0300 Message-Id: <20200814205424.543857-4-danielhb413@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200814205424.543857-1-danielhb413@gmail.com> References: <20200814205424.543857-1-danielhb413@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::742; envelope-from=danielhb413@gmail.com; helo=mail-qk1-x742.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" NVLink2 GPUs are allocated in their own NUMA node, at maximum distance from every other resource in the board. The existing logic makes some assumptions that don't scale well: - only NVLink2 GPUs will ever require such mechanism, meaning that the GPU logic is tightly coupled with the NUMA setup of the machine, via how ibm,max-associativity-domains is set. - the code is relying on the lack of support for sparse NUMA nodes in QEMU. Eventually this support can be implemented, and then the assumption that spapr->gpu_numa_id represents the total of NUMA nodes plus all generated NUMA ids for the GPUs, which relies on all QEMU NUMA nodes not being sparsed, has a good potential for disaster. This patch aims to fix both assumptions by creating a generic mechanism to get an available NUMA node, regardless of the NUMA setup being sparse or not. The idea is to rename the existing spapr->gpu_numa_id to spapr->current_numa_id and add a new spapr->extra_numa_nodes attribute. They are used in a new function called spapr_pci_get_available_numa_id(), that takes into account that the NUMA conf can be sparsed or not, to retrieve an available NUMA id for the caller. Each consecutive call of spapr_pci_get_available_numa_id() will generate a new ID, up to the limit of numa_state->num_nodes + spapr->extra_numa_nodes exceeding MAX_NODES. This is a generic code being used only by NVLink2 ATM, being available to be used in the future by any other device. With this new function in place, we can decouple ibm,max-associativity-domains logic from NVLink2 logic by using the new spapr->extra_numa_nodes to define the maxdomains of the forth NUMA level. Instead of defining it as gpu_numa_id, use num_nodes + extra_numa_nodes. This also makes it resilient to any future change in the support of sparse NUMA nodes. Despite all the code juggling, no functional change was made because sparse NUMA nodes isn't a thing and we do not support distinct NUMA distances via user input. Next patches will change that. Signed-off-by: Daniel Henrique Barboza --- hw/ppc/spapr.c | 15 ++++++++++----- hw/ppc/spapr_pci.c | 33 +++++++++++++++++++++++++++++++++ hw/ppc/spapr_pci_nvlink2.c | 10 ++++++---- include/hw/pci-host/spapr.h | 2 ++ include/hw/ppc/spapr.h | 4 +++- 5 files changed, 54 insertions(+), 10 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 3b16edaf4c..22e78cfc84 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -910,13 +910,13 @@ static void spapr_dt_rtas(SpaprMachineState *spapr, v= oid *fdt) cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE & 0xffffffff), cpu_to_be32(ms->smp.max_cpus / ms->smp.threads), }; - uint32_t maxdomain =3D cpu_to_be32(spapr->gpu_numa_id > 1 ? 1 : 0); + uint32_t maxdomain =3D cpu_to_be32(spapr->extra_numa_nodes > 1 ? 1 : 0= ); uint32_t maxdomains[] =3D { cpu_to_be32(4), maxdomain, maxdomain, maxdomain, - cpu_to_be32(spapr->gpu_numa_id), + cpu_to_be32(ms->numa_state->num_nodes + spapr->extra_numa_nodes), }; =20 _FDT(rtas =3D fdt_add_subnode(fdt, 0, "rtas")); @@ -2824,13 +2824,18 @@ static void spapr_machine_init(MachineState *machin= e) /* * NVLink2-connected GPU RAM needs to be placed on a separate NUMA nod= e. * We assign a new numa ID per GPU in spapr_pci_collect_nvgpu() which = is - * called from vPHB reset handler so we initialize the counter here. + * called from vPHB reset handler. We have code to generate an extra n= uma + * id to place the GPU via 'extra_numa_nodes' and 'current_numa_node',= which + * are initialized here. + * * If no NUMA is configured from the QEMU side, we start from 1 as GPU= RAM * must be equally distant from any other node. - * The final value of spapr->gpu_numa_id is going to be written to + * + * The extra NUMA node ids generated for GPU usage will be written to * max-associativity-domains in spapr_build_fdt(). */ - spapr->gpu_numa_id =3D MAX(1, machine->numa_state->num_nodes); + spapr->current_numa_id =3D 0; + spapr->extra_numa_nodes =3D 0; =20 if ((!kvm_enabled() || kvmppc_has_cap_mmu_radix()) && ppc_type_check_compat(machine->cpu_type, CPU_POWERPC_LOGICAL_3_00,= 0, diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 0a418f1e67..09ac58fd7f 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -2492,3 +2492,36 @@ void spapr_pci_switch_vga(bool big_endian) &big_endian); } } + +unsigned spapr_pci_get_available_numa_id(Error **errp) +{ + MachineState *machine =3D MACHINE(qdev_get_machine()); + SpaprMachineState *spapr =3D SPAPR_MACHINE(machine); + NodeInfo *numa_info =3D machine->numa_state->nodes; + unsigned i, start; + + if (machine->numa_state->num_nodes + spapr->extra_numa_nodes >=3D MAX_= NODES) { + error_setg(errp, + "Unable to get an extra NUMA node beyond MAX_NODES =3D = %d", + MAX_NODES); + return spapr->current_numa_id; + } + + if (spapr->extra_numa_nodes =3D=3D 0) { + start =3D 0; + } else { + start =3D spapr->current_numa_id + 1; + } + + for (i =3D start; i < MAX_NODES; i++) { + if (!numa_info[i].present) { + spapr->extra_numa_nodes++; + spapr->current_numa_id =3D i; + return i; + } + } + + error_setg(errp, "Unable to find a valid NUMA id"); + + return spapr->current_numa_id; +} diff --git a/hw/ppc/spapr_pci_nvlink2.c b/hw/ppc/spapr_pci_nvlink2.c index 76ae77ebc8..611c8a2957 100644 --- a/hw/ppc/spapr_pci_nvlink2.c +++ b/hw/ppc/spapr_pci_nvlink2.c @@ -87,9 +87,8 @@ static void spapr_pci_collect_nvgpu(SpaprPhbPciNvGpuConfi= g *nvgpus, PCIDevice *pdev, uint64_t tgt, MemoryRegion *mr, Error **errp) { - MachineState *machine =3D MACHINE(qdev_get_machine()); - SpaprMachineState *spapr =3D SPAPR_MACHINE(machine); SpaprPhbPciNvGpuSlot *nvslot =3D spapr_nvgpu_get_slot(nvgpus, tgt); + Error *local_err =3D NULL; =20 if (!nvslot) { error_setg(errp, "Found too many GPUs per vPHB"); @@ -100,8 +99,11 @@ static void spapr_pci_collect_nvgpu(SpaprPhbPciNvGpuCon= fig *nvgpus, =20 nvslot->gpa =3D nvgpus->nv2_ram_current; nvgpus->nv2_ram_current +=3D memory_region_size(mr); - nvslot->numa_id =3D spapr->gpu_numa_id; - ++spapr->gpu_numa_id; + + nvslot->numa_id =3D spapr_pci_get_available_numa_id(&local_err); + if (local_err) { + error_propagate(errp, local_err); + } } =20 static void spapr_pci_collect_nvnpu(SpaprPhbPciNvGpuConfig *nvgpus, diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 600eb55c34..8d93223a76 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -129,6 +129,8 @@ struct SpaprPhbState { #define SPAPR_PCI_NV2ATSD_WIN_SIZE (NVGPU_MAX_NUM * NVGPU_MAX_LINKS * \ 64 * KiB) =20 +unsigned spapr_pci_get_available_numa_id(Error **errp); + int spapr_dt_phb(SpaprMachineState *spapr, SpaprPhbState *phb, uint32_t intc_phandle, void *fdt, int *node_offset); =20 diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 3134d339e8..739a6a4942 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -227,7 +227,9 @@ struct SpaprMachineState { bool cmd_line_caps[SPAPR_CAP_NUM]; SpaprCapabilities def, eff, mig; =20 - unsigned gpu_numa_id; + unsigned current_numa_id; + unsigned extra_numa_nodes; + SpaprTpmProxy *tpm_proxy; =20 Error *fwnmi_migration_blocker; --=20 2.26.2 From nobody Tue May 14 21:06:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1597506732; cv=none; d=zohomail.com; s=zohoarc; b=JXMZaaUc2mg3t1GpRALa+DCvp61qaDJHhuB4Zb5aZ7T+XeYDNI5cLg/Li+mJubnk3y4aUiA9pL86MLhtsfqo9rdh5L22pBRl8v7QiikjSsXy25oDuzq0zbosl189niXeQXSk6SxX3+ny0YINv3W2XdOqoJF8k7mpq4a+UN70kJY= ARC-Message-Signature: i=1; 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Fri, 14 Aug 2020 13:54:44 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Subject: [PATCH 04/10] spapr: add spapr_machine_using_legacy_numa() helper Date: Fri, 14 Aug 2020 17:54:18 -0300 Message-Id: <20200814205424.543857-5-danielhb413@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200814205424.543857-1-danielhb413@gmail.com> References: <20200814205424.543857-1-danielhb413@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::744; envelope-from=danielhb413@gmail.com; helo=mail-qk1-x744.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" The changes to come to NUMA support are all guest visible. In theory we could just create a new 5_1 class option flag to avoid the changes to cascade to 5.1 and under. The reality is that these changes are only relevant if the machine has more than one NUMA node. There is no need to change guest behavior that has been around for years needlesly. This new helper will be used by the next patches to determine whether we should retain the (soon to be) legacy NUMA behavior in the pSeries machine. The new behavior will only be exposed if:: - machine is pseries-5.2 and newer; - more than one NUMA node is declared in NUMA state. Signed-off-by: Daniel Henrique Barboza Reviewed-by: David Gibson --- hw/ppc/spapr.c | 12 ++++++++++++ include/hw/ppc/spapr.h | 2 ++ 2 files changed, 14 insertions(+) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 22e78cfc84..073a59c47d 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -308,6 +308,15 @@ static hwaddr spapr_node0_size(MachineState *machine) return machine->ram_size; } =20 +bool spapr_machine_using_legacy_numa(SpaprMachineState *spapr) +{ + MachineState *machine =3D MACHINE(spapr); + SpaprMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(machine); + + return smc->pre_5_2_numa_associativity || + machine->numa_state->num_nodes <=3D 1; +} + static void add_str(GString *s, const gchar *s1) { g_string_append_len(s, s1, strlen(s1) + 1); @@ -4602,8 +4611,11 @@ DEFINE_SPAPR_MACHINE(5_2, "5.2", true); */ static void spapr_machine_5_1_class_options(MachineClass *mc) { + SpaprMachineClass *smc =3D SPAPR_MACHINE_CLASS(mc); + spapr_machine_5_2_class_options(mc); compat_props_add(mc->compat_props, hw_compat_5_1, hw_compat_5_1_len); + smc->pre_5_2_numa_associativity =3D true; } =20 DEFINE_SPAPR_MACHINE(5_1, "5.1", false); diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 739a6a4942..d9f1afa8b2 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -130,6 +130,7 @@ struct SpaprMachineClass { bool smp_threads_vsmt; /* set VSMT to smp_threads by default */ hwaddr rma_limit; /* clamp the RMA to this size */ bool pre_5_1_assoc_refpoints; + bool pre_5_2_numa_associativity; =20 void (*phb_placement)(SpaprMachineState *spapr, uint32_t index, uint64_t *buid, hwaddr *pio,=20 @@ -847,6 +848,7 @@ int spapr_max_server_number(SpaprMachineState *spapr); void spapr_store_hpte(PowerPCCPU *cpu, hwaddr ptex, uint64_t pte0, uint64_t pte1); void spapr_mce_req_event(PowerPCCPU *cpu, bool recovered); +bool spapr_machine_using_legacy_numa(SpaprMachineState *spapr); =20 /* DRC callbacks. */ void spapr_core_release(DeviceState *dev); --=20 2.26.2 From nobody Tue May 14 21:06:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::e44; envelope-from=danielhb413@gmail.com; helo=mail-vs1-xe44.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" The ibm,max-associativity-domains is considering that only a single associativity domain can exist in the same NUMA level. This is true today because we do not support any type of NUMA distance user customization, and all nodes are in the same distance to each other. To enhance NUMA distance support in the pSeries machine we need to make this limit flexible. This patch rewrites the max-associativity logic to consider that multiple associativity domains can co-exist in the same NUMA level. We're using the legacy_numa() helper to avoid leaking unneeded guest changes. Signed-off-by: Daniel Henrique Barboza --- hw/ppc/spapr.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 073a59c47d..b0c4b80a23 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -919,13 +919,20 @@ static void spapr_dt_rtas(SpaprMachineState *spapr, v= oid *fdt) cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE & 0xffffffff), cpu_to_be32(ms->smp.max_cpus / ms->smp.threads), }; - uint32_t maxdomain =3D cpu_to_be32(spapr->extra_numa_nodes > 1 ? 1 : 0= ); + + /* The maximum domains for a given NUMA level, supposing that every + * additional NUMA node belongs to the same domain (aside from the + * 4th level, where we must support all available NUMA domains), is + * total number of domains - 1. */ + uint32_t total_nodes_number =3D ms->numa_state->num_nodes + + spapr->extra_numa_nodes; + uint32_t maxdomain =3D cpu_to_be32(total_nodes_number - 1); uint32_t maxdomains[] =3D { cpu_to_be32(4), maxdomain, maxdomain, maxdomain, - cpu_to_be32(ms->numa_state->num_nodes + spapr->extra_numa_nodes), + cpu_to_be32(total_nodes_number), }; =20 _FDT(rtas =3D fdt_add_subnode(fdt, 0, "rtas")); @@ -962,6 +969,13 @@ static void spapr_dt_rtas(SpaprMachineState *spapr, vo= id *fdt) qemu_hypertas->str, qemu_hypertas->len)); g_string_free(qemu_hypertas, TRUE); =20 + if (spapr_machine_using_legacy_numa(spapr)) { + maxdomain =3D cpu_to_be32(spapr->extra_numa_nodes > 1 ? 1 : 0); + maxdomains[1] =3D maxdomain; + maxdomains[2] =3D maxdomain; + maxdomains[3] =3D maxdomain; + } + if (smc->pre_5_1_assoc_refpoints) { nr_refpoints =3D 2; } --=20 2.26.2 From nobody Tue May 14 21:06:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1597507597; cv=none; d=zohomail.com; s=zohoarc; b=JtMrZuakVCLxQ6giPu+iqGc2Q9+mTsNbqi6RvCdlblBmc3BzEs/wdk1RVUeNNCsq7gJOItSGTSvRkv75oi6ZR8/+37ASVMFiVQAM5hlnJo8jHc9g9CtvJABPzZqzi00sH4rc0DetZs2xZaKC/UxSFpnuUeED2AjInPmONaqV7Co= ARC-Message-Signature: i=1; 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Fri, 14 Aug 2020 13:54:47 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Subject: [PATCH 06/10] spapr: allow 4 NUMA levels in ibm, associativity-reference-points Date: Fri, 14 Aug 2020 17:54:20 -0300 Message-Id: <20200814205424.543857-7-danielhb413@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200814205424.543857-1-danielhb413@gmail.com> References: <20200814205424.543857-1-danielhb413@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f42; envelope-from=danielhb413@gmail.com; helo=mail-qv1-xf42.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" The value of ibm,associativity-reference-points is in sync with what Skiboot does. It's a three level NUMA configuration where the first two levels references the same associativity index (0x4), meaning that the next distance after the local_distance (10) is two orders away (a '40' value in the Linux kernel). The third level (0x2) was added to allow NVLink GPUs to be placed outside of the same associativity domain of the regular NUMA nodes. However, we have to deal with the possibility of user customization of the NUMA distances, something that Skiboot doesn't need to, and this current scheme is too tight. The next step to give users more flexibility is to define 4 distinct NUMA levels, allowing for 5 discrete values of distances (10, 20, 40, 80 and 160 as seen by the kernel). Signed-off-by: Daniel Henrique Barboza --- hw/ppc/spapr.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index b0c4b80a23..bc51d2db90 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -906,8 +906,9 @@ static void spapr_dt_rtas(SpaprMachineState *spapr, voi= d *fdt) GString *qemu_hypertas =3D g_string_sized_new(256); uint32_t refpoints[] =3D { cpu_to_be32(0x4), - cpu_to_be32(0x4), + cpu_to_be32(0x3), cpu_to_be32(0x2), + cpu_to_be32(0x1), }; uint32_t nr_refpoints =3D ARRAY_SIZE(refpoints); uint64_t max_device_addr =3D MACHINE(spapr)->device_memory->base + @@ -970,6 +971,10 @@ static void spapr_dt_rtas(SpaprMachineState *spapr, vo= id *fdt) g_string_free(qemu_hypertas, TRUE); =20 if (spapr_machine_using_legacy_numa(spapr)) { + refpoints[1] =3D cpu_to_be32(0x4); + refpoints[2] =3D cpu_to_be32(0x2); + nr_refpoints =3D 3; + maxdomain =3D cpu_to_be32(spapr->extra_numa_nodes > 1 ? 1 : 0); maxdomains[1] =3D maxdomain; maxdomains[2] =3D maxdomain; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::d43; envelope-from=danielhb413@gmail.com; helo=mail-io1-xd43.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" We have several places around hw/ppc files where we use the same code to set the ibm,associativity array. This patch creates a helper called spapr_set_associativity() to do that in a single place. It'll also make it saner to change the value of ibm,associativity in the next patches. After this patch, only 2 places are left with open code ibm,associativity assignment: - spapr_dt_dynamic_reconfiguration_memory() - h_home_node_associativity() in spapr_hcall.c The update of associativity values will be made in these places manually later on. Signed-off-by: Daniel Henrique Barboza Reviewed-by: David Gibson --- hw/ppc/spapr.c | 32 +++++++++++++++++++++----------- hw/ppc/spapr_nvdimm.c | 8 +++----- hw/ppc/spapr_pci.c | 8 +++----- include/hw/ppc/spapr.h | 1 + 4 files changed, 28 insertions(+), 21 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index bc51d2db90..b80a6f6936 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -201,15 +201,27 @@ static int spapr_fixup_cpu_smt_dt(void *fdt, int offs= et, PowerPCCPU *cpu, return ret; } =20 +void spapr_set_associativity(uint32_t *assoc, int node_id, int cpu_index) +{ + uint8_t assoc_size =3D 0x4; + + if (cpu_index >=3D 0) { + assoc_size =3D 0x5; + assoc[5] =3D cpu_to_be32(cpu_index); + } + + assoc[0] =3D cpu_to_be32(assoc_size); + assoc[1] =3D cpu_to_be32(0x0); + assoc[2] =3D cpu_to_be32(0x0); + assoc[3] =3D cpu_to_be32(0x0); + assoc[4] =3D cpu_to_be32(node_id); +} + static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, PowerPCCPU *cpu) { int index =3D spapr_get_vcpu_id(cpu); - uint32_t associativity[] =3D {cpu_to_be32(0x5), - cpu_to_be32(0x0), - cpu_to_be32(0x0), - cpu_to_be32(0x0), - cpu_to_be32(cpu->node_id), - cpu_to_be32(index)}; + uint32_t associativity[6]; + spapr_set_associativity(associativity, cpu->node_id, index); =20 /* Advertise NUMA via ibm,associativity */ return fdt_setprop(fdt, offset, "ibm,associativity", associativity, @@ -325,15 +337,13 @@ static void add_str(GString *s, const gchar *s1) static int spapr_dt_memory_node(void *fdt, int nodeid, hwaddr start, hwaddr size) { - uint32_t associativity[] =3D { - cpu_to_be32(0x4), /* length */ - cpu_to_be32(0x0), cpu_to_be32(0x0), - cpu_to_be32(0x0), cpu_to_be32(nodeid) - }; + uint32_t associativity[5]; char mem_name[32]; uint64_t mem_reg_property[2]; int off; =20 + spapr_set_associativity(associativity, nodeid, -1); + mem_reg_property[0] =3D cpu_to_be64(start); mem_reg_property[1] =3D cpu_to_be64(size); =20 diff --git a/hw/ppc/spapr_nvdimm.c b/hw/ppc/spapr_nvdimm.c index 81410aa63f..bd109bfc00 100644 --- a/hw/ppc/spapr_nvdimm.c +++ b/hw/ppc/spapr_nvdimm.c @@ -115,15 +115,13 @@ int spapr_dt_nvdimm(void *fdt, int parent_offset, &error_abort); uint64_t slot =3D object_property_get_uint(OBJECT(nvdimm), PC_DIMM_SLO= T_PROP, &error_abort); - uint32_t associativity[] =3D { - cpu_to_be32(0x4), /* length */ - cpu_to_be32(0x0), cpu_to_be32(0x0), - cpu_to_be32(0x0), cpu_to_be32(node) - }; + uint32_t associativity[5]; uint64_t lsize =3D nvdimm->label_size; uint64_t size =3D object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE= _PROP, NULL); =20 + spapr_set_associativity(associativity, node, -1); + drc =3D spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot); g_assert(drc); =20 diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 09ac58fd7f..c02ace226c 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -2321,11 +2321,8 @@ int spapr_dt_phb(SpaprMachineState *spapr, SpaprPhbS= tate *phb, cpu_to_be32(1), cpu_to_be32(RTAS_IBM_RESET_PE_DMA_WINDOW) }; - uint32_t associativity[] =3D {cpu_to_be32(0x4), - cpu_to_be32(0x0), - cpu_to_be32(0x0), - cpu_to_be32(0x0), - cpu_to_be32(phb->numa_node)}; + uint32_t associativity[5]; + SpaprTceTable *tcet; SpaprDrc *drc; Error *err =3D NULL; @@ -2358,6 +2355,7 @@ int spapr_dt_phb(SpaprMachineState *spapr, SpaprPhbSt= ate *phb, =20 /* Advertise NUMA via ibm,associativity */ if (phb->numa_node !=3D -1) { + spapr_set_associativity(associativity, phb->numa_node, -1); _FDT(fdt_setprop(fdt, bus_off, "ibm,associativity", associativity, sizeof(associativity))); } diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index d9f1afa8b2..cd158bf95a 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -863,6 +863,7 @@ int spapr_phb_dt_populate(SpaprDrc *drc, SpaprMachineSt= ate *spapr, =20 void spapr_rtc_read(SpaprRtcState *rtc, struct tm *tm, uint32_t *ns); int spapr_rtc_import_offset(SpaprRtcState *rtc, int64_t legacy_offset); +void spapr_set_associativity(uint32_t *assoc, int node_id, int cpu_index); =20 #define TYPE_SPAPR_RNG "spapr-rng" =20 --=20 2.26.2 From nobody Tue May 14 21:06:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::82d; envelope-from=danielhb413@gmail.com; helo=mail-qt1-x82d.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" We can't use the input from machine->numa_state->nodes directly in the pSeries machine because PAPR does not work with raw distance values, like ACPI SLIT does. We need to determine common associativity domains, based on similar performance/distance of the resources, and set these domains in the associativy array that goes to the FDT of each resource. To ease the translation between regular ACPI NUMA distance info to our PAPR dialect, let's create a matrix called numa_assoc_domains in the SpaprMachineClass. This matrix will be initiated during machine init, where we will read NUMA information from user input, apply a heuristic to determine the associativity domains for each node, then populate numa_assoc_domains accordingly. The changes are mostly centered in the spapr_set_associativity() helper that will use the values of numa_assoc_domains instead of using 0x0, with spapr_dt_dynamic_reconfiguration_memory() and h_home_node_associativity() being the exceptions. To keep the changes under control, we'll plug in the matrix usage in the existing code first. The actual heuristic to determine the associativity domains for each NUMA node will come in a follow-up patch. Note that the matrix is initiated with zeros, meaning that there is no guest changes implemented in this patch. We'll keep these changes from legacy NUMA guests by not initiating the matrix in these cases. Signed-off-by: Daniel Henrique Barboza --- hw/ppc/spapr.c | 46 +++++++++++++++++++++++------------ hw/ppc/spapr_hcall.c | 13 ++++++++-- hw/ppc/spapr_nvdimm.c | 13 +++++----- hw/ppc/spapr_pci.c | 3 ++- include/hw/ppc/spapr.h | 7 +++++- include/hw/ppc/spapr_nvdimm.h | 5 ++-- 6 files changed, 59 insertions(+), 28 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index b80a6f6936..4f50ab21ee 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -201,8 +201,13 @@ static int spapr_fixup_cpu_smt_dt(void *fdt, int offse= t, PowerPCCPU *cpu, return ret; } =20 -void spapr_set_associativity(uint32_t *assoc, int node_id, int cpu_index) +void spapr_set_associativity(uint32_t *assoc, int node_id, int cpu_index, + MachineState *machine) { + SpaprMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(machine); + uint8_t assoc_domain1 =3D smc->numa_assoc_domains[node_id][0]; + uint8_t assoc_domain2 =3D smc->numa_assoc_domains[node_id][1]; + uint8_t assoc_domain3 =3D smc->numa_assoc_domains[node_id][2]; uint8_t assoc_size =3D 0x4; =20 if (cpu_index >=3D 0) { @@ -211,17 +216,18 @@ void spapr_set_associativity(uint32_t *assoc, int nod= e_id, int cpu_index) } =20 assoc[0] =3D cpu_to_be32(assoc_size); - assoc[1] =3D cpu_to_be32(0x0); - assoc[2] =3D cpu_to_be32(0x0); - assoc[3] =3D cpu_to_be32(0x0); + assoc[1] =3D cpu_to_be32(assoc_domain1); + assoc[2] =3D cpu_to_be32(assoc_domain2); + assoc[3] =3D cpu_to_be32(assoc_domain3); assoc[4] =3D cpu_to_be32(node_id); } =20 -static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, PowerPCCPU *cpu) +static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, PowerPCCPU *cpu, + MachineState *machine) { int index =3D spapr_get_vcpu_id(cpu); uint32_t associativity[6]; - spapr_set_associativity(associativity, cpu->node_id, index); + spapr_set_associativity(associativity, cpu->node_id, index, machine); =20 /* Advertise NUMA via ibm,associativity */ return fdt_setprop(fdt, offset, "ibm,associativity", associativity, @@ -335,14 +341,14 @@ static void add_str(GString *s, const gchar *s1) } =20 static int spapr_dt_memory_node(void *fdt, int nodeid, hwaddr start, - hwaddr size) + hwaddr size, MachineState *machine) { uint32_t associativity[5]; char mem_name[32]; uint64_t mem_reg_property[2]; int off; =20 - spapr_set_associativity(associativity, nodeid, -1); + spapr_set_associativity(associativity, nodeid, -1, machine); =20 mem_reg_property[0] =3D cpu_to_be64(start); mem_reg_property[1] =3D cpu_to_be64(size); @@ -574,6 +580,7 @@ static int spapr_dt_dynamic_reconfiguration_memory(Spap= rMachineState *spapr, void *fdt) { MachineState *machine =3D MACHINE(spapr); + SpaprMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(machine); int nb_numa_nodes =3D machine->numa_state->num_nodes; int ret, i, offset; uint64_t lmb_size =3D SPAPR_MEMORY_BLOCK_SIZE; @@ -628,12 +635,17 @@ static int spapr_dt_dynamic_reconfiguration_memory(Sp= aprMachineState *spapr, int_buf[1] =3D cpu_to_be32(4); /* Number of entries per associativity = list */ cur_index +=3D 2; for (i =3D 0; i < nr_nodes; i++) { + uint8_t assoc_domain1 =3D smc->numa_assoc_domains[i][0]; + uint8_t assoc_domain2 =3D smc->numa_assoc_domains[i][1]; + uint8_t assoc_domain3 =3D smc->numa_assoc_domains[i][2]; + uint32_t associativity[] =3D { - cpu_to_be32(0x0), - cpu_to_be32(0x0), - cpu_to_be32(0x0), + cpu_to_be32(assoc_domain1), + cpu_to_be32(assoc_domain2), + cpu_to_be32(assoc_domain3), cpu_to_be32(i) }; + memcpy(cur_index, associativity, sizeof(associativity)); cur_index +=3D 4; } @@ -667,7 +679,7 @@ static int spapr_dt_memory(SpaprMachineState *spapr, vo= id *fdt) if (!mem_start) { /* spapr_machine_init() checks for rma_size <=3D node0_size * already */ - spapr_dt_memory_node(fdt, i, 0, spapr->rma_size); + spapr_dt_memory_node(fdt, i, 0, spapr->rma_size, machine); mem_start +=3D spapr->rma_size; node_size -=3D spapr->rma_size; } @@ -679,7 +691,7 @@ static int spapr_dt_memory(SpaprMachineState *spapr, vo= id *fdt) sizetmp =3D 1ULL << ctzl(mem_start); } =20 - spapr_dt_memory_node(fdt, i, mem_start, sizetmp); + spapr_dt_memory_node(fdt, i, mem_start, sizetmp, machine); node_size -=3D sizetmp; mem_start +=3D sizetmp; } @@ -809,7 +821,7 @@ static void spapr_dt_cpu(CPUState *cs, void *fdt, int o= ffset, pft_size_prop, sizeof(pft_size_prop)))); =20 if (ms->numa_state->num_nodes > 1) { - _FDT(spapr_fixup_cpu_numa_dt(fdt, offset, cpu)); + _FDT(spapr_fixup_cpu_numa_dt(fdt, offset, cpu, ms)); } =20 _FDT(spapr_fixup_cpu_smt_dt(fdt, offset, cpu, compat_smt)); @@ -1335,7 +1347,7 @@ void *spapr_build_fdt(SpaprMachineState *spapr, bool = reset, size_t space) =20 /* NVDIMM devices */ if (mc->nvdimm_supported) { - spapr_dt_persistent_memory(fdt); + spapr_dt_persistent_memory(fdt, machine); } =20 return fdt; @@ -3453,6 +3465,7 @@ static void spapr_nmi(NMIState *n, int cpu_index, Err= or **errp) int spapr_lmb_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr, void *fdt, int *fdt_start_offset, Error **errp) { + MachineState *machine =3D MACHINE(spapr); uint64_t addr; uint32_t node; =20 @@ -3460,7 +3473,8 @@ int spapr_lmb_dt_populate(SpaprDrc *drc, SpaprMachine= State *spapr, node =3D object_property_get_uint(OBJECT(drc->dev), PC_DIMM_NODE_PROP, &error_abort); *fdt_start_offset =3D spapr_dt_memory_node(fdt, node, addr, - SPAPR_MEMORY_BLOCK_SIZE); + SPAPR_MEMORY_BLOCK_SIZE, + machine); return 0; } =20 diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index c1d01228c6..6e94e513cf 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -1878,10 +1878,15 @@ static target_ulong h_home_node_associativity(Power= PCCPU *cpu, target_ulong opcode, target_ulong *args) { + MachineState *machine =3D MACHINE(spapr); + SpaprMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(machine); target_ulong flags =3D args[0]; target_ulong procno =3D args[1]; PowerPCCPU *tcpu; int idx; + uint8_t assoc_domain1; + uint8_t assoc_domain2; + uint8_t assoc_domain3; =20 /* only support procno from H_REGISTER_VPA */ if (flags !=3D 0x1) { @@ -1893,13 +1898,17 @@ static target_ulong h_home_node_associativity(Power= PCCPU *cpu, return H_P2; } =20 + assoc_domain1 =3D smc->numa_assoc_domains[tcpu->node_id][0]; + assoc_domain2 =3D smc->numa_assoc_domains[tcpu->node_id][1]; + assoc_domain3 =3D smc->numa_assoc_domains[tcpu->node_id][2]; + /* sequence is the same as in the "ibm,associativity" property */ =20 idx =3D 0; #define ASSOCIATIVITY(a, b) (((uint64_t)(a) << 32) | \ ((uint64_t)(b) & 0xffffffff)) - args[idx++] =3D ASSOCIATIVITY(0, 0); - args[idx++] =3D ASSOCIATIVITY(0, tcpu->node_id); + args[idx++] =3D ASSOCIATIVITY(assoc_domain1, assoc_domain2); + args[idx++] =3D ASSOCIATIVITY(assoc_domain3, tcpu->node_id); args[idx++] =3D ASSOCIATIVITY(procno, -1); for ( ; idx < 6; idx++) { args[idx] =3D -1; diff --git a/hw/ppc/spapr_nvdimm.c b/hw/ppc/spapr_nvdimm.c index bd109bfc00..7f1f088c39 100644 --- a/hw/ppc/spapr_nvdimm.c +++ b/hw/ppc/spapr_nvdimm.c @@ -87,8 +87,9 @@ int spapr_pmem_dt_populate(SpaprDrc *drc, SpaprMachineSta= te *spapr, void *fdt, int *fdt_start_offset, Error **errp) { NVDIMMDevice *nvdimm =3D NVDIMM(drc->dev); + MachineState *machine =3D MACHINE(spapr); =20 - *fdt_start_offset =3D spapr_dt_nvdimm(fdt, 0, nvdimm); + *fdt_start_offset =3D spapr_dt_nvdimm(fdt, 0, nvdimm, machine); =20 return 0; } @@ -104,8 +105,8 @@ void spapr_create_nvdimm_dr_connectors(SpaprMachineStat= e *spapr) } =20 =20 -int spapr_dt_nvdimm(void *fdt, int parent_offset, - NVDIMMDevice *nvdimm) +int spapr_dt_nvdimm(void *fdt, int parent_offset, NVDIMMDevice *nvdimm, + MachineState *machine) { int child_offset; char *buf; @@ -120,7 +121,7 @@ int spapr_dt_nvdimm(void *fdt, int parent_offset, uint64_t size =3D object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE= _PROP, NULL); =20 - spapr_set_associativity(associativity, node, -1); + spapr_set_associativity(associativity, node, -1, machine); =20 drc =3D spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot); g_assert(drc); @@ -159,7 +160,7 @@ int spapr_dt_nvdimm(void *fdt, int parent_offset, return child_offset; } =20 -void spapr_dt_persistent_memory(void *fdt) +void spapr_dt_persistent_memory(void *fdt, MachineState *machine) { int offset =3D fdt_subnode_offset(fdt, 0, "persistent-memory"); GSList *iter, *nvdimms =3D nvdimm_get_device_list(); @@ -177,7 +178,7 @@ void spapr_dt_persistent_memory(void *fdt) for (iter =3D nvdimms; iter; iter =3D iter->next) { NVDIMMDevice *nvdimm =3D iter->data; =20 - spapr_dt_nvdimm(fdt, offset, nvdimm); + spapr_dt_nvdimm(fdt, offset, nvdimm, machine); } g_slist_free(nvdimms); =20 diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index c02ace226c..4d9ef63f3e 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -2355,7 +2355,8 @@ int spapr_dt_phb(SpaprMachineState *spapr, SpaprPhbSt= ate *phb, =20 /* Advertise NUMA via ibm,associativity */ if (phb->numa_node !=3D -1) { - spapr_set_associativity(associativity, phb->numa_node, -1); + MachineState *machine =3D MACHINE(spapr); + spapr_set_associativity(associativity, phb->numa_node, -1, machine= ); _FDT(fdt_setprop(fdt, bus_off, "ibm,associativity", associativity, sizeof(associativity))); } diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index cd158bf95a..1f9700ac19 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -104,6 +104,9 @@ typedef enum { =20 #define FDT_MAX_SIZE 0x100000 =20 +/* Taken from Linux kernel arch/powerpc/mm/numa.h */ +#define MAX_DISTANCE_REF_POINTS 4 + typedef struct SpaprCapabilities SpaprCapabilities; struct SpaprCapabilities { uint8_t caps[SPAPR_CAP_NUM]; @@ -131,6 +134,7 @@ struct SpaprMachineClass { hwaddr rma_limit; /* clamp the RMA to this size */ bool pre_5_1_assoc_refpoints; bool pre_5_2_numa_associativity; + uint8_t numa_assoc_domains[MAX_NODES][MAX_DISTANCE_REF_POINTS-1]; =20 void (*phb_placement)(SpaprMachineState *spapr, uint32_t index, uint64_t *buid, hwaddr *pio,=20 @@ -863,7 +867,8 @@ int spapr_phb_dt_populate(SpaprDrc *drc, SpaprMachineSt= ate *spapr, =20 void spapr_rtc_read(SpaprRtcState *rtc, struct tm *tm, uint32_t *ns); int spapr_rtc_import_offset(SpaprRtcState *rtc, int64_t legacy_offset); -void spapr_set_associativity(uint32_t *assoc, int node_id, int cpu_index); +void spapr_set_associativity(uint32_t *assoc, int node_id, int cpu_index, + MachineState *machine); =20 #define TYPE_SPAPR_RNG "spapr-rng" =20 diff --git a/include/hw/ppc/spapr_nvdimm.h b/include/hw/ppc/spapr_nvdimm.h index b3330cc485..be30773c7d 100644 --- a/include/hw/ppc/spapr_nvdimm.h +++ b/include/hw/ppc/spapr_nvdimm.h @@ -27,8 +27,9 @@ QEMU_BUILD_BUG_ON(SPAPR_MINIMUM_SCM_BLOCK_SIZE % SPAPR_ME= MORY_BLOCK_SIZE); =20 int spapr_pmem_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr, void *fdt, int *fdt_start_offset, Error **errp); -int spapr_dt_nvdimm(void *fdt, int parent_offset, NVDIMMDevice *nvdimm); -void spapr_dt_persistent_memory(void *fdt); +int spapr_dt_nvdimm(void *fdt, int parent_offset, NVDIMMDevice *nvdimm, + MachineState *machine); +void spapr_dt_persistent_memory(void *fdt, MachineState *machine); void spapr_nvdimm_validate_opts(NVDIMMDevice *nvdimm, uint64_t size, Error **errp); void spapr_add_nvdimm(DeviceState *dev, uint64_t slot, Error **errp); --=20 2.26.2 From nobody Tue May 14 21:06:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1597504962; cv=none; d=zohomail.com; s=zohoarc; b=ce8qBMe+cd3mwXj4MkjuaW2LpW9C5cveh+GrhjKbq1X+NqbxMVG60rw57iL6ce0slY0ACEqwAn1Dc7cCwm9CKAok9t/ESbfbGnzhzREhD9zkBEtesqzC4eVdC9Nhesh6408+k6HBJ3ChkdR0kr+KeOjjtTSUO5hx8tO2RJmueGY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1597504962; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=d2aeaGkVtyhLHxRTnglxsmaRe1/zdnOa+obmvojxAqs=; b=ftEN2SZaU59w6r/RUMvS/KSzl+wX3bzmBe5Sh5LBxgedFWGJxA6pukSBgvzEjNZpxV5DewwwOT3YH3rf9oBQOCf7v3kGY6KojG9+e8nAk0Q9DVQNLzww0Z0VtzdJlvhGdYkuAadSTz0C8xRFJJmQUA7akiLnCHYU+zgU5CTcJ9I= ARC-Authentication-Results: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::731; envelope-from=danielhb413@gmail.com; helo=mail-qk1-x731.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" This patch puts all the pieces together to finally allow user input when defining the NUMA topology of the spapr guest. The logic is centered in the new spapr_init_numa_assoc_domains() function. This is called once at machine_init(), if we're not using legacy_numa mode, to initiate the numa_assoc_domain matrix introduced in the previous patch. We can divide the logic in two that are mashed together in the body of this function. First stage is to sanitize the user input from numa_state. Due to the nature of what ACPI allows the user to do (directly define the distances the guest will see in the DT) versus what PAPR allows (we can hint at associativity relations, the OS must decide what to do), we had to bake in kernel logic in here. The kernel allows 4 levels of NUMA, where the last one is always the node_id itself, with distance =3D 10. The other levels doubles the distances of previous levels, meaning that the pSeries kernel will only show distances of 20, 40, 80 and 160 (in case no match is found). This first stage is then to get the distances defined by the user and approximate them to those discrete values: - user distance 11 to 30 will be interpreted as 20 - user distance 31 to 60 will be interpreted as 40 - user distance 61 to 120 will be interpreted as 80 - user distance 121 and beyond will be interpreted as 160 - user distance 10 stays 10 The other stage is defining the associativity domains based on the NUMA level match. Again, more than one strategy exists for this same problem, with different results. The approach taken is to re-use any existing associativity values to the new matches, instead of overwriting them with a new associativity match. This decision is necessary because neither we, nor the pSeries kernel, supports multiple associativity domains for each resource, meaning that we have to decide what to preserve. With the current logic, the associativities established by the earlier nodes take precedence, i.e. associativities defined by the first node are retained along all other nodes. These decisions have direct impact on how the user will interact with the NUMA topology, and none of them are perfect. To keep this commit message no longer than it already is, let's update the existing documentation in ppc-spapr-numa.rst with more in depth details and design considerations/drawbacks in the next patch. Signed-off-by: Daniel Henrique Barboza --- hw/ppc/spapr.c | 109 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 109 insertions(+) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 4f50ab21ee..0d60d06cf4 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -222,6 +222,109 @@ void spapr_set_associativity(uint32_t *assoc, int nod= e_id, int cpu_index, assoc[4] =3D cpu_to_be32(node_id); } =20 +static void spapr_numa_assoc_assign_domain(SpaprMachineClass *smc, + uint8_t nodeA, uint8_t nodeB, + uint8_t numaLevel, + uint8_t curr_domain) +{ + uint8_t assoc_A, assoc_B; + + assoc_A =3D smc->numa_assoc_domains[nodeA][numaLevel]; + assoc_B =3D smc->numa_assoc_domains[nodeB][numaLevel]; + + /* No associativity domains on both. Assign and move on */ + if ((assoc_A | assoc_B) =3D=3D 0) { + smc->numa_assoc_domains[nodeA][numaLevel] =3D curr_domain; + smc->numa_assoc_domains[nodeB][numaLevel] =3D curr_domain; + return; + } + + /* Use the existing assoc domain of any of the nodes to not + * disrupt previous associations already defined */ + if (assoc_A !=3D 0) { + smc->numa_assoc_domains[nodeB][numaLevel] =3D assoc_A; + } else { + smc->numa_assoc_domains[nodeA][numaLevel] =3D assoc_B; + } +} + +static void spapr_init_numa_assoc_domains(MachineState *machine) +{ + SpaprMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(machine); + int nb_numa_nodes =3D machine->numa_state->num_nodes; + NodeInfo *numa_info =3D machine->numa_state->nodes; + uint8_t existing_nodes[nb_numa_nodes]; + int i, j, src_node, dst_node, index =3D 0; + + /* We don't have information about any extra NUMA nodes that + * the machine might create at this point (e.g. NVLink2 GPUs). + * Assigning associativity domains with low numbers might have + * unintended consequences in the presence of GPUs, which are + * supposed to always be at maximum distance of everything else, + * because we might end up using a GPU numa_id identifier by + * accident. + * + * Starting this counter at MAX_NODES avoids any possible + * collision since no NUMA id can reach this value. */ + uint8_t assoc_domain =3D MAX_NODES; + + /* We will assume that the NUMA nodes might be sparsed. This + * preliminary fetch step is required to avoid having to search + * for an existing NUMA node more than once. */ + for (i =3D 0; i < MAX_NODES; i++) { + if (numa_info[i].present) { + existing_nodes[index++] =3D i; + if (index =3D=3D nb_numa_nodes) { + break; + } + } + } + + /* Start iterating through the existing numa nodes to + * define associativity groups */ + for (i =3D 0; i < nb_numa_nodes; i++) { + uint8_t distance =3D 20; + uint8_t lower_end =3D 10; + uint8_t upper_end =3D 0; + + src_node =3D existing_nodes[i]; + + /* Calculate all associativity domains src_node belongs to. */ + for(index =3D 0; index < 3; index++) { + upper_end =3D distance/2 + distance; + + for(j =3D i + 1; j < nb_numa_nodes; j++) { + uint8_t node_dist; + + dst_node =3D existing_nodes[j]; + node_dist =3D numa_info[src_node].distance[dst_node]; + + if (node_dist > lower_end && node_dist <=3D upper_end) { + spapr_numa_assoc_assign_domain(smc, src_node, dst_node, + 2 - index, assoc_domain= ); + assoc_domain++; + } + } + + lower_end =3D upper_end; + distance *=3D 2; + } + } + + /* Zero (0) is considered a valid associativity domain identifier. + * To avoid NUMA nodes having matches where it wasn't intended, fill + * the zeros with unique identifiers. */ + for (i =3D 0; i < nb_numa_nodes; i++) { + src_node =3D existing_nodes[i]; + for (j =3D 0; j < 3; j++) { + if (smc->numa_assoc_domains[src_node][j] =3D=3D 0) { + smc->numa_assoc_domains[src_node][j] =3D assoc_domain; + assoc_domain++; + } + } + } + } + static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, PowerPCCPU *cpu, MachineState *machine) { @@ -2887,6 +2990,12 @@ static void spapr_machine_init(MachineState *machine) spapr->current_numa_id =3D 0; spapr->extra_numa_nodes =3D 0; =20 + /* We don't need to init the NUMA matrix if we're running in + * legacy NUMA mode. */ + if (!spapr_machine_using_legacy_numa(spapr)) { + spapr_init_numa_assoc_domains(machine); + } + if ((!kvm_enabled() || kvmppc_has_cap_mmu_radix()) && ppc_type_check_compat(machine->cpu_type, CPU_POWERPC_LOGICAL_3_00,= 0, spapr->max_compat_pvr)) { --=20 2.26.2 From nobody Tue May 14 21:06:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::72a; envelope-from=danielhb413@gmail.com; helo=mail-qk1-x72a.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Henrique Barboza , qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" This update provides more in depth information about the choices and drawbacks of the new NUMA support for the spapr machine. Signed-off-by: Daniel Henrique Barboza --- docs/specs/ppc-spapr-numa.rst | 213 ++++++++++++++++++++++++++++++++++ 1 file changed, 213 insertions(+) diff --git a/docs/specs/ppc-spapr-numa.rst b/docs/specs/ppc-spapr-numa.rst index e762038022..994bfb996f 100644 --- a/docs/specs/ppc-spapr-numa.rst +++ b/docs/specs/ppc-spapr-numa.rst @@ -189,3 +189,216 @@ QEMU up to 5.1, as follows: =20 This also means that user input in QEMU command line does not change the NUMA distancing inside the guest for the pseries machine. + +New NUMA mechanics for pseries in QEMU 5.2 +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +Starting in QEMU 5.2, the pseries machine now considers user input when +setting NUMA topology of the guest. The following changes were made: + +* ibm,associativity-reference-points was changed to {0x4, 0x3, 0x2, 0x1}, = allowing + for 4 distinct NUMA distance values based on the NUMA levels + +* ibm,max-associativity-domains was changed to support multiple associativ= ity + domains in all NUMA levels. This is needed to ensure user flexibility + +* ibm,associativity for all resources now varies with user input + +These changes are only effective for pseries-5.2 and newer machines that a= re +created with more than one NUMA node (disconsidering NUMA nodes created by +the machine itself, e.g. NVLink 2 GPUs). The now legacy support has been +around for such a long time, with users seeing NUMA distances 10 and 40 +(and 80 if using NVLink2 GPUs), and there is no need to disrupt the +existing experience of those guests. + +To bring the user experience x86 users have when tuning up NUMA, we had +to operate under the current pseries Linux kernel logic described in +`How the pseries Linux guest calculates NUMA distances`_. The result +is that we needed to translate NUMA distance user input to pseries +Linux kernel input. + +Translating user distance to kernel distance +-------------------------------------------- + +User input for NUMA distance can vary from 10 to 254. We need to translate +that to the values that the Linux kernel operates on (10, 20, 40, 80, 160). +This is how it is being done: + +* user distance 11 to 30 will be interpreted as 20 +* user distance 31 to 60 will be interpreted as 40 +* user distance 61 to 120 will be interpreted as 80 +* user distance 121 and beyond will be interpreted as 160 +* user distance 10 stays 10 + +The reasoning behind this aproximation is to avoid any round up to the loc= al +distance (10), keeping it exclusive to the 4th NUMA level (which is still +exclusive to the node_id). All other ranges were chosen under the developer +discretion of what would be (somewhat) sensible considering the user input. +Any other strategy can be used here, but in the end the reality is that we= 'll +have to accept that a large array of values will be translated to the same +NUMA topology in the guest, e.g. this user input: + +:: + + 0 1 2 + 0 10 31 120 + 1 31 10 30 + 2 120 30 10 + +And this other user input: + +:: + + 0 1 2 + 0 10 60 61 + 1 60 10 11 + 2 61 11 10 + +Will both be translated to the same values internally: + +:: + + 0 1 2 + 0 10 40 80 + 1 40 10 20 + 2 80 20 10 + +Users are encouraged to use only the kernel values in the NUMA definition = to +avoid being taken by surprise with that the guest is actually seeing in the +topology. There are enough potential surprises that are inherent to the +associativity domain assignment process, discussed below. + + +How associativity domains are assigned +-------------------------------------- + +LOPAPR allows more than one associativity array (or 'string') per allocated +resource. This would be used to represent that the resource has multiple +connections with the board, and then the operational system, when deciding +NUMA distancing, should consider the associativity information that provid= es +the shortest distance. + +The spapr implementation does not support multiple associativity arrays per +resource, neither does the pseries Linux kernel. We'll have to represent t= he +NUMA topology using one associativity per resource, which means that choic= es +and compromises are going to be made. + +Consider the following NUMA topology entered by user input: + +:: + + 0 1 2 3 + 0 10 20 20 40 + 1 20 10 80 40 + 2 20 80 10 20 + 3 40 40 20 10 + +Honoring just the relative distances of node 0 to every other node, one po= ssible +value for all associativity arrays would be: + +* node 0: 0 B A 0 +* node 1: 0 0 A 1 +* node 2: 0 0 A 2 +* node 3: 0 B 0 3 + +With the reference points {0x4, 0x3, 0x2, 0x1}, for node 0: + +* distance from 0 to 1 is 20 (no match at 0x4, will match at 0x3) +* distance from 0 to 2 is 20 (no match at 0x4, will match at 0x3) +* distance from 0 to 3 is 40 (no match at 0x4 and 0x3, will match + at 0x2) + +The distances related to node 0 are well represented. Doing for node 1, an= d keeping +in mind that we don't need to revisit node 0 again, the distance from node= 1 to +2 is 80, matching at 0x4: + +* node 1: C 0 A 1 +* node 2: C 0 A 2 + +Over here we already have the first conflict. Even if we assign a new asso= ciativity +domain at 0x4 for 1 and 2, and we do that in the code, the kernel will def= ine +the distance between 1 and 2 as 20, not 80, because both 1 and 2 have the = "A" +associativity domain from the previous step. If we decide to discard the +associativity with "A" then the node 0 distances are compromised. + +Following up with the distance from 1 to 3 being 40 (a match in 0x2) we ha= ve another +decision to make. These are the current associativity domains of each: + +* node 1: C 0 A 1 +* node 3: 0 B 0 3 + +There is already an associativity domain at 0x2 in node 3, "B", which was = assigned +by the node 0 distances. If we define a new associativity domain at this l= evel +for 1 and 3 we will overwrite the existing associativity between 0 and 3. = What +the code is doing in this case is to assign the existing domain to the +current associativity, in this case, "B" is now assigned to the 0x2 of nod= e 1, +resulting in the following associativity arrays: + +* node 0: 0 B A 0 +* node 1: C 0 A 1 +* node 2: C B A 2 +* node 3: 0 B 0 3 + +In the last step we will analyze just nodes 2 and 3. The desired distance = between +2 and 3 is 20, i.e. a match in 0x3. Node 2 already has a domain assigned i= n 0x3, +A, so we do the same as we did in the previous case and assign it to node 3 +at 0x3. This is the end result for the associativity arrays: + +* node 0: 0 B A 0 +* node 1: C 0 A 1 +* node 2: C B A 2 +* node 3: 0 B A 3 + +The kernel will read these arrays and will calculate the following NUMA to= pology for +the guest: + +:: + + 0 1 2 3 + 0 10 20 20 20 + 1 20 10 20 20 + 2 20 20 10 20 + 3 20 20 20 10 + +Which is not what the user wanted, but it is what the current logic and im= plementation +constraints of the kernel and QEMU will provide inside the LOPAPR specific= ation. + +Changing a single value, specially a low distance value, makes for drastic= changes +in the result. For example, with the same user input from above, but chang= ing the +node distance from 0 to 1 to 40: + +:: + + 0 1 2 3 + 0 10 40 20 40 + 1 40 10 80 40 + 2 20 80 10 20 + 3 40 40 20 10 + +This is the result inside the guest, applying the same heuristics: + +:: + + $ numactl -H + available: 4 nodes (0-3) + (...) + node distances: + node 0 1 2 3 + 0: 10 40 20 20 + 1: 40 10 80 40 + 2: 20 80 10 20 + 3: 20 40 20 10 + +This result is much closer to the user input and only a single distance wa= s changed +from the original. + +The kernel will always match with the shortest associativity domain possib= le, and we're +attempting to retain the previous established relations between the nodes.= This means +that a distance equal to 20 between nodes A and B and the same distance 20= between nodes +A and F will cause the distance between B and F to also be 20. The same wi= ll happen to +other distances, but shorter distances has precedent over it to the distan= ce calculation. + +Users are welcome to use this knowledge and experiment with the input to g= et the +NUMA topology they want, or as closer as they want. The important thing is= to keep +expectations up to par with what we are capable of provide at this moment:= an +approximation. --=20 2.26.2