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charset="utf-8" From: Prasad J Pandit Add pci-intack mmio write method to avoid NULL pointer dereference issue. Reported-by: Lei Sun Reviewed-by: Li Qiang Reviewed-by: Peter Maydell Signed-off-by: Prasad J Pandit --- hw/pci-host/prep.c | 8 ++++++++ 1 file changed, 8 insertions(+) Update v4: add Reviewed-by tag -> https://lists.nongnu.org/archive/html/qemu-devel/2020-07/msg05325.html diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 4b93fd2b01..64b33af6c0 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -26,6 +26,7 @@ #include "qemu/osdep.h" #include "qemu-common.h" #include "qemu/units.h" +#include "qemu/log.h" #include "qapi/error.h" #include "hw/pci/pci.h" #include "hw/pci/pci_bus.h" @@ -119,8 +120,15 @@ static uint64_t raven_intack_read(void *opaque, hwaddr= addr, return pic_read_irq(isa_pic); } =20 +static void raven_intack_write(void *opaque, hwaddr addr, + uint64_t data, unsigned size) +{ + qemu_log_mask(LOG_UNIMP, "%s not implemented\n", __func__); +} + static const MemoryRegionOps raven_intack_ops =3D { .read =3D raven_intack_read, + .write =3D raven_intack_write, .valid =3D { .max_access_size =3D 1, }, --=20 2.26.2 From nobody Sat May 18 08:35:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" From: Prasad J Pandit Add pcie-msi mmio read method to avoid NULL pointer dereference issue. Reported-by: Lei Sun Reviewed-by: Li Qiang Reviewed-by: Peter Maydell Signed-off-by: Prasad J Pandit --- hw/pci-host/designware.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) Update v4: add explanatory comment and Reviewed-by tag -> https://lists.nongnu.org/archive/html/qemu-devel/2020-07/msg05315.html diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index 8492c18991..db036aac71 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qemu/log.h" #include "hw/pci/msi.h" #include "hw/pci/pci_bridge.h" #include "hw/pci/pci_host.h" @@ -63,6 +64,23 @@ designware_pcie_root_to_host(DesignwarePCIERoot *root) return DESIGNWARE_PCIE_HOST(bus->parent); } =20 +static uint64_t designware_pcie_root_msi_read(void *opaque, hwaddr addr, + unsigned size) +{ + /* + * Attempts to read from the MSI address are undefined in + * the PCI specifications. For this hardware, the datasheet + * specifies that a read from the magic address is simply not + * intercepted by the MSI controller, and will go out to the + * AHB/AXI bus like any other PCI-device-initiated DMA read. + * This is not trivial to implement in QEMU, so since + * well-behaved guests won't ever ask a PCI device to DMA from + * this address we just log the missing functionality. + */ + qemu_log_mask(LOG_UNIMP, "%s not implemented\n", __func__); + return 0; +} + static void designware_pcie_root_msi_write(void *opaque, hwaddr addr, uint64_t val, unsigned len) { @@ -77,6 +95,7 @@ static void designware_pcie_root_msi_write(void *opaque, = hwaddr addr, } =20 static const MemoryRegionOps designware_pci_host_msi_ops =3D { + .read =3D designware_pcie_root_msi_read, .write =3D designware_pcie_root_msi_write, .endianness =3D DEVICE_LITTLE_ENDIAN, .valid =3D { --=20 2.26.2 From nobody Sat May 18 08:35:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" From: Prasad J Pandit Add vfio quirk device mmio write method to avoid NULL pointer dereference issue. Reported-by: Lei Sun Reviewed-by: Li Qiang Reviewed-by: Peter Maydell Acked-by: Alex Williamson Signed-off-by: Prasad J Pandit --- hw/vfio/pci-quirks.c | 8 ++++++++ 1 file changed, 8 insertions(+) Update v4: log guest_error and add Reviewed-by tag -> https://lists.nongnu.org/archive/html/qemu-devel/2020-07/msg05326.html diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c index 3a14b7c303..9b162cc3f9 100644 --- a/hw/vfio/pci-quirks.c +++ b/hw/vfio/pci-quirks.c @@ -14,6 +14,7 @@ #include "config-devices.h" #include "exec/memop.h" #include "qemu/units.h" +#include "qemu/log.h" #include "qemu/error-report.h" #include "qemu/main-loop.h" #include "qemu/module.h" @@ -264,8 +265,15 @@ static uint64_t vfio_ati_3c3_quirk_read(void *opaque, return data; } =20 +static void vfio_ati_3c3_quirk_write(void *opaque, hwaddr addr, + uint64_t data, unsigned size) +{ + qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid access\n", __func__); +} + static const MemoryRegionOps vfio_ati_3c3_quirk =3D { .read =3D vfio_ati_3c3_quirk_read, + .write =3D vfio_ati_3c3_quirk_write, .endianness =3D DEVICE_LITTLE_ENDIAN, }; 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charset="utf-8" From: Prasad J Pandit Add ppc-parity mmio write method to avoid NULL pointer dereference issue. Reported-by: Lei Sun Acked-by: David Gibson Signed-off-by: Prasad J Pandit Reviewed-by: Li Qiang --- hw/ppc/prep_systemio.c | 8 ++++++++ 1 file changed, 8 insertions(+) Update v4: No change, v3 was acked -> https://lists.gnu.org/archive/html/qemu-devel/2020-06/msg09965.html diff --git a/hw/ppc/prep_systemio.c b/hw/ppc/prep_systemio.c index bbc51b6e9a..e583222a1b 100644 --- a/hw/ppc/prep_systemio.c +++ b/hw/ppc/prep_systemio.c @@ -23,6 +23,7 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/log.h" #include "hw/irq.h" #include "hw/isa/isa.h" #include "hw/qdev-properties.h" @@ -235,8 +236,15 @@ static uint64_t ppc_parity_error_readl(void *opaque, h= waddr addr, return val; } =20 +static void ppc_parity_error_writel(void *opaque, hwaddr addr, + uint64_t data, unsigned size) +{ + qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid access\n", __func__); +} + static const MemoryRegionOps ppc_parity_error_ops =3D { .read =3D ppc_parity_error_readl, + .write =3D ppc_parity_error_writel, .valid =3D { .min_access_size =3D 4, .max_access_size =3D 4, --=20 2.26.2 From nobody Sat May 18 08:35:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" From: Prasad J Pandit Add nrf51_soc mmio read method to avoid NULL pointer dereference issue. Reported-by: Lei Sun Reviewed-by: Peter Maydell Signed-off-by: Prasad J Pandit Reviewed-by: Li Qiang --- hw/nvram/nrf51_nvm.c | 10 ++++++++++ 1 file changed, 10 insertions(+) Update v4: add explanatory comment and Reviewed-by tag -> https://lists.nongnu.org/archive/html/qemu-devel/2020-07/msg05309.html diff --git a/hw/nvram/nrf51_nvm.c b/hw/nvram/nrf51_nvm.c index f2283c1a8d..7b3460d52d 100644 --- a/hw/nvram/nrf51_nvm.c +++ b/hw/nvram/nrf51_nvm.c @@ -273,6 +273,15 @@ static const MemoryRegionOps io_ops =3D { .endianness =3D DEVICE_LITTLE_ENDIAN, }; =20 +static uint64_t flash_read(void *opaque, hwaddr offset, unsigned size) +{ + /* + * This is a rom_device MemoryRegion which is always in + * romd_mode (we never put it in MMIO mode), so reads always + * go directly to RAM and never come here. + */ + g_assert_not_reached(); +} =20 static void flash_write(void *opaque, hwaddr offset, uint64_t value, unsigned int size) @@ -300,6 +309,7 @@ static void flash_write(void *opaque, hwaddr offset, ui= nt64_t value, =20 =20 static const MemoryRegionOps flash_ops =3D { + .read =3D flash_read, .write =3D flash_write, .valid.min_access_size =3D 4, .valid.max_access_size =3D 4, --=20 2.26.2 From nobody Sat May 18 08:35:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" From: Prasad J Pandit Add spapr msi mmio read method to avoid NULL pointer dereference issue. Reported-by: Lei Sun Acked-by: David Gibson Reviewed-by: Li Qiang Signed-off-by: Prasad J Pandit --- hw/ppc/spapr_pci.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) Update v4: fix multi-line comment and log guest_error -> https://lists.nongnu.org/archive/html/qemu-devel/2020-07/msg05311.html diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 363cdb3f7b..53dfd3d8c6 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -52,6 +52,7 @@ #include "sysemu/kvm.h" #include "sysemu/hostmem.h" #include "sysemu/numa.h" +#include "qemu/log.h" =20 /* Copied from the kernel arch/powerpc/platforms/pseries/msi.c */ #define RTAS_QUERY_FN 0 @@ -738,6 +739,12 @@ static PCIINTxRoute spapr_route_intx_pin_to_irq(void *= opaque, int pin) return route; } =20 +static uint64_t spapr_msi_read(void *opaque, hwaddr addr, unsigned size) +{ + qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid access\n", __func__); + return 0; +} + /* * MSI/MSIX memory region implementation. * The handler handles both MSI and MSIX. @@ -755,8 +762,11 @@ static void spapr_msi_write(void *opaque, hwaddr addr, } =20 static const MemoryRegionOps spapr_msi_ops =3D { - /* There is no .read as the read result is undefined by PCI spec */ - .read =3D NULL, + /* + * .read result is undefined by PCI spec. + * define .read method to avoid assert failure in memory_region_init_io + */ + .read =3D spapr_msi_read, .write =3D spapr_msi_write, .endianness =3D DEVICE_LITTLE_ENDIAN }; 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charset="utf-8" From: Prasad J Pandit Add tz-ppc-dummy mmio read/write methods to avoid assert failure during initialisation. Reviewed-by: Peter Maydell Signed-off-by: Prasad J Pandit Reviewed-by: Li Qiang --- hw/misc/tz-ppc.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) Update v4: add Reviewed-by tag -> https://lists.nongnu.org/archive/html/qemu-devel/2020-07/msg05303.html diff --git a/hw/misc/tz-ppc.c b/hw/misc/tz-ppc.c index 6431257b52..36495c68e7 100644 --- a/hw/misc/tz-ppc.c +++ b/hw/misc/tz-ppc.c @@ -196,7 +196,21 @@ static bool tz_ppc_dummy_accepts(void *opaque, hwaddr = addr, g_assert_not_reached(); } =20 +static uint64_t tz_ppc_dummy_read(void *opaque, hwaddr addr, unsigned size) +{ + g_assert_not_reached(); +} + +static void tz_ppc_dummy_write(void *opaque, hwaddr addr, + uint64_t data, unsigned size) +{ + g_assert_not_reached(); +} + static const MemoryRegionOps tz_ppc_dummy_ops =3D { + /* define r/w methods to avoid assert failure in memory_region_init_io= */ + .read =3D tz_ppc_dummy_read, + .write =3D tz_ppc_dummy_write, .valid.accepts =3D tz_ppc_dummy_accepts, }; =20 --=20 2.26.2 From nobody Sat May 18 08:35:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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bh=3Q/BqAs8Ts/eEbXJp0DLogWA+BFVDGoTcxFQL7SmVrI=; b=D0jiYHrZlgpEciVGgS0JBqK9cbLZHzwB0yyCBHy78n81ZzeQ35nQQw5Q+IqgLch2rheP7j d+c8OOLuIPX+L77L5pm7s2/IdAvZB/2+366IgJi3GdeifBF1EHr0j4XR517JY+X9tvM4VE BnNYyWybPCkrSOcgRYvXTkKFRdLOTj0= X-MC-Unique: YsgpB3hHNGK5QTAxFHZybw-1 From: P J P To: Peter Maydell , Paolo Bonzini Subject: [PATCH v4 8/9] imx7-ccm: add digprog mmio write method Date: Tue, 11 Aug 2020 17:11:32 +0530 Message-Id: <20200811114133.672647-9-ppandit@redhat.com> In-Reply-To: <20200811114133.672647-1-ppandit@redhat.com> References: <20200811114133.672647-1-ppandit@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ppandit@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" From: Prasad J Pandit Add digprog mmio write method to avoid assert failure during initialisation. Reviewed-by: Li Qiang Signed-off-by: Prasad J Pandit --- hw/misc/imx7_ccm.c | 8 ++++++++ 1 file changed, 8 insertions(+) Update v4: revise log message to guest_error -> https://lists.nongnu.org/archive/html/qemu-devel/2020-07/msg05306.html diff --git a/hw/misc/imx7_ccm.c b/hw/misc/imx7_ccm.c index 02fc1ae8d0..075159e497 100644 --- a/hw/misc/imx7_ccm.c +++ b/hw/misc/imx7_ccm.c @@ -131,8 +131,16 @@ static const struct MemoryRegionOps imx7_set_clr_tog_o= ps =3D { }, }; =20 +static void imx7_digprog_write(void *opaque, hwaddr addr, + uint64_t data, unsigned size) +{ + qemu_log_mask(LOG_GUEST_ERROR, + "Guest write to read-only ANALOG_DIGPROG register\n"); +} + static const struct MemoryRegionOps imx7_digprog_ops =3D { .read =3D imx7_set_clr_tog_read, + .write =3D imx7_digprog_write, .endianness =3D DEVICE_NATIVE_ENDIAN, .impl =3D { .min_access_size =3D 4, --=20 2.26.2 From nobody Sat May 18 08:35:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; 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bh=URgG/GQpF3hxWKP3cotTkm5KWSX2MRj+zKuw0yApTls=; b=f9CoLIEtf+tQvtVGsF5ytGuLZOGhV1jGKjKizRsNBXjNxb4A6ze9g2XwWi7yHSJL1+tXIf epXKBTSlycw4cpMri1LY0+m7amgdgj7j+g0ktKMIpXPUNfjNHny1jsVzph/ghIIfZNzB9P JP7O2czD8/7Vsj5u3QDGYySpoc/MoNA= X-MC-Unique: IDx7D9ygN06mMvLOfUanVA-1 From: P J P To: Peter Maydell , Paolo Bonzini Subject: [PATCH v4 9/9] memory: assert MemoryRegionOps callbacks are defined Date: Tue, 11 Aug 2020 17:11:33 +0530 Message-Id: <20200811114133.672647-10-ppandit@redhat.com> In-Reply-To: <20200811114133.672647-1-ppandit@redhat.com> References: <20200811114133.672647-1-ppandit@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ppandit@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" From: Prasad J Pandit When registering a MemoryRegionOps object, assert that its read/write callback methods are defined. This avoids potential guest crash via a NULL pointer dereference. Suggested-by: Peter Maydell Reviewed-by: Li Qiang Reviewed-by: Peter Maydell Signed-off-by: Prasad J Pandit Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- softmmu/memory.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) Update v4: add Reviewed-by tag -> https://lists.nongnu.org/archive/html/qemu-devel/2020-07/msg05324.html diff --git a/softmmu/memory.c b/softmmu/memory.c index af25987518..1f4b37b3a6 100644 --- a/softmmu/memory.c +++ b/softmmu/memory.c @@ -1485,7 +1485,13 @@ void memory_region_init_io(MemoryRegion *mr, uint64_t size) { memory_region_init(mr, owner, name, size); - mr->ops =3D ops ? ops : &unassigned_mem_ops; + if (ops) { + assert(ops->read || ops->read_with_attrs); + assert(ops->write || ops->write_with_attrs); + mr->ops =3D ops; + } else { + mr->ops =3D &unassigned_mem_ops; + } mr->opaque =3D opaque; mr->terminates =3D true; } @@ -1663,6 +1669,8 @@ void memory_region_init_rom_device_nomigrate(MemoryRe= gion *mr, { Error *err =3D NULL; assert(ops); + assert(ops->read || ops->read_with_attrs); + assert(ops->write || ops->write_with_attrs); memory_region_init(mr, owner, name, size); mr->ops =3D ops; mr->opaque =3D opaque; --=20 2.26.2