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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, Mark Cave-Ayland , cota@braap.org, peter.puhov@linaro.org, pbonzini@redhat.com, alex.bennee@linaro.org, Artyom Tarasenko Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This is part of a series of changes to remove the implied BQL from the common code of cpu_handle_interrupt and cpu_handle_exception. As part of removing the implied BQL from the common code, we are pushing the BQL holding down into the per-arch implementation functions of do_interrupt and cpu_exec_interrupt. The purpose of this set of changes is to set the groundwork so that an arch could move towards removing the BQL from the cpu_handle_interrupt/exception paths. This approach was suggested by Paolo Bonzini. For reference, here are two key posts in the discussion, explaining the reasoning/benefits of this approach. https://lists.gnu.org/archive/html/qemu-devel/2020-07/msg08731.html https://lists.gnu.org/archive/html/qemu-devel/2020-08/msg00044.html Signed-off-by: Robert Foley --- target/sparc/cpu.c | 3 +++ target/sparc/int32_helper.c | 13 ++++++++++++- 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 20c7c0c434..13b5a038e8 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -79,6 +79,7 @@ static void sparc_cpu_reset(DeviceState *dev) =20 static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { + qemu_mutex_lock_iothread(); if (interrupt_request & CPU_INTERRUPT_HARD) { SPARCCPU *cpu =3D SPARC_CPU(cs); CPUSPARCState *env =3D &cpu->env; @@ -90,10 +91,12 @@ static bool sparc_cpu_exec_interrupt(CPUState *cs, int = interrupt_request) if (type !=3D TT_EXTINT || cpu_pil_allowed(env, pil)) { cs->exception_index =3D env->interrupt_index; sparc_cpu_do_interrupt(cs); + qemu_mutex_unlock_iothread(); return true; } } } + qemu_mutex_unlock_iothread(); return false; } =20 diff --git a/target/sparc/int32_helper.c b/target/sparc/int32_helper.c index 9a71e1abd8..3940e945ed 100644 --- a/target/sparc/int32_helper.c +++ b/target/sparc/int32_helper.c @@ -69,7 +69,12 @@ void sparc_cpu_do_interrupt(CPUState *cs) { SPARCCPU *cpu =3D SPARC_CPU(cs); CPUSPARCState *env =3D &cpu->env; - int cwp, intno =3D cs->exception_index; + int cwp, intno; + bool bql =3D !qemu_mutex_iothread_locked(); + if (bql) { + qemu_mutex_lock_iothread(); + } + intno =3D cs->exception_index; =20 /* Compute PSR before exposing state. */ if (env->cc_op !=3D CC_OP_FLAGS) { @@ -115,6 +120,9 @@ void sparc_cpu_do_interrupt(CPUState *cs) "Error state", cs->exception_index, excp_name_str(cs->exception_ind= ex)); } + if (bql) { + qemu_mutex_unlock_iothread(); + } return; } #endif @@ -136,6 +144,9 @@ void sparc_cpu_do_interrupt(CPUState *cs) env->qemu_irq_ack(env, env->irq_manager, intno); } #endif + if (bql) { + qemu_mutex_unlock_iothread(); + } } =20 #if !defined(CONFIG_USER_ONLY) --=20 2.17.1