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bh=l9MiLHEL0ZusiqXXJdZN9mvCOzvDNMq7vWBxDe63SLg=; b=Zuk+qMARTeKFSVBUTVNStKu/65Cir1jvSLWUmUK6BqHZBzp1qUUwRG6wtbTARhcKJN9p42 WDDD2Ryv+iP8UaQuLOYJXXYterUksy5ctDe562+uTfu3IEL2vloX4Q0NrePlXIf0Zi0zkE TFv2WQ3AbGjXiGaxJnvDdisrpHEe4Fo= X-MC-Unique: hHurUTLGNS2Ix1xfwAtT6Q-1 From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [PATCH v2 1/5] hw: add compat machines for 5.2 Date: Wed, 5 Aug 2020 11:16:36 +0200 Message-Id: <20200805091640.11134-2-drjones@redhat.com> In-Reply-To: <20200805091640.11134-1-drjones@redhat.com> References: <20200805091640.11134-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.81; envelope-from=drjones@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/05 03:37:07 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" From: Cornelia Huck Add 5.2 machine types for arm/i440fx/q35/s390x/spapr. Signed-off-by: Cornelia Huck --- hw/arm/virt.c | 9 ++++++++- hw/core/machine.c | 3 +++ hw/i386/pc.c | 6 ++++-- hw/i386/pc_piix.c | 14 +++++++++++++- hw/i386/pc_q35.c | 13 ++++++++++++- hw/ppc/spapr.c | 15 +++++++++++++-- hw/s390x/s390-virtio-ccw.c | 14 +++++++++++++- include/hw/boards.h | 3 +++ include/hw/i386/pc.h | 3 +++ 9 files changed, 72 insertions(+), 8 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ecfee362a182..acf9bfbeceaf 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2546,10 +2546,17 @@ static void machvirt_machine_init(void) } type_init(machvirt_machine_init); =20 +static void virt_machine_5_2_options(MachineClass *mc) +{ +} +DEFINE_VIRT_MACHINE_AS_LATEST(5, 2) + static void virt_machine_5_1_options(MachineClass *mc) { + virt_machine_5_2_options(mc); + compat_props_add(mc->compat_props, hw_compat_5_1, hw_compat_5_1_len); } -DEFINE_VIRT_MACHINE_AS_LATEST(5, 1) +DEFINE_VIRT_MACHINE(5, 1) =20 static void virt_machine_5_0_options(MachineClass *mc) { diff --git a/hw/core/machine.c b/hw/core/machine.c index 8d1a90c6cf45..cf5f2dfaeb34 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -28,6 +28,9 @@ #include "hw/mem/nvdimm.h" #include "migration/vmstate.h" =20 +GlobalProperty hw_compat_5_1[] =3D {}; +const size_t hw_compat_5_1_len =3D G_N_ELEMENTS(hw_compat_5_1); + GlobalProperty hw_compat_5_0[] =3D { { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, { "virtio-balloon-device", "page-poison", "false" }, diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 47c5ca3e342b..1733b5341a62 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -97,8 +97,10 @@ #include "fw_cfg.h" #include "trace.h" =20 -GlobalProperty pc_compat_5_0[] =3D { -}; +GlobalProperty pc_compat_5_1[] =3D {}; +const size_t pc_compat_5_1_len =3D G_N_ELEMENTS(pc_compat_5_1); + +GlobalProperty pc_compat_5_0[] =3D {}; const size_t pc_compat_5_0_len =3D G_N_ELEMENTS(pc_compat_5_0); =20 GlobalProperty pc_compat_4_2[] =3D { diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index b789e83f9acb..c5ba70ca17cb 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -426,7 +426,7 @@ static void pc_i440fx_machine_options(MachineClass *m) machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE); } =20 -static void pc_i440fx_5_1_machine_options(MachineClass *m) +static void pc_i440fx_5_2_machine_options(MachineClass *m) { PCMachineClass *pcmc =3D PC_MACHINE_CLASS(m); pc_i440fx_machine_options(m); @@ -435,6 +435,18 @@ static void pc_i440fx_5_1_machine_options(MachineClass= *m) pcmc->default_cpu_version =3D 1; } =20 +DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL, + pc_i440fx_5_2_machine_options); + +static void pc_i440fx_5_1_machine_options(MachineClass *m) +{ + pc_i440fx_5_2_machine_options(m); + m->alias =3D NULL; + m->is_default =3D false; + compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len); + compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len); +} + DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL, pc_i440fx_5_1_machine_options); =20 diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index a3e607a544a5..0cb9c18cd44d 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -353,7 +353,7 @@ static void pc_q35_machine_options(MachineClass *m) m->max_cpus =3D 288; } =20 -static void pc_q35_5_1_machine_options(MachineClass *m) +static void pc_q35_5_2_machine_options(MachineClass *m) { PCMachineClass *pcmc =3D PC_MACHINE_CLASS(m); pc_q35_machine_options(m); @@ -361,6 +361,17 @@ static void pc_q35_5_1_machine_options(MachineClass *m) pcmc->default_cpu_version =3D 1; } =20 +DEFINE_Q35_MACHINE(v5_2, "pc-q35-5.2", NULL, + pc_q35_5_2_machine_options); + +static void pc_q35_5_1_machine_options(MachineClass *m) +{ + pc_q35_5_2_machine_options(m); + m->alias =3D NULL; + compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len); + compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len); +} + DEFINE_Q35_MACHINE(v5_1, "pc-q35-5.1", NULL, pc_q35_5_1_machine_options); =20 diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 0ae293ec9431..1c8d0981b382 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -4579,15 +4579,26 @@ static void spapr_machine_latest_class_options(Mach= ineClass *mc) } \ type_init(spapr_machine_register_##suffix) =20 +/* + * pseries-5.2 + */ +static void spapr_machine_5_2_class_options(MachineClass *mc) +{ + /* Defaults for the latest behaviour inherited from the base class */ +} + +DEFINE_SPAPR_MACHINE(5_2, "5.2", true); + /* * pseries-5.1 */ static void spapr_machine_5_1_class_options(MachineClass *mc) { - /* Defaults for the latest behaviour inherited from the base class */ + spapr_machine_5_2_class_options(mc); + compat_props_add(mc->compat_props, hw_compat_5_1, hw_compat_5_1_len); } =20 -DEFINE_SPAPR_MACHINE(5_1, "5.1", true); +DEFINE_SPAPR_MACHINE(5_1, "5.1", false); =20 /* * pseries-5.0 diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index e72c61d2eae0..f4ea6a954597 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -801,14 +801,26 @@ bool css_migration_enabled(void) } = \ type_init(ccw_machine_register_##suffix) =20 +static void ccw_machine_5_2_instance_options(MachineState *machine) +{ +} + +static void ccw_machine_5_2_class_options(MachineClass *mc) +{ +} +DEFINE_CCW_MACHINE(5_2, "5.2", true); + static void ccw_machine_5_1_instance_options(MachineState *machine) { + ccw_machine_5_2_instance_options(machine); } =20 static void ccw_machine_5_1_class_options(MachineClass *mc) { + ccw_machine_5_2_class_options(mc); + compat_props_add(mc->compat_props, hw_compat_5_1, hw_compat_5_1_len); } -DEFINE_CCW_MACHINE(5_1, "5.1", true); +DEFINE_CCW_MACHINE(5_1, "5.1", false); =20 static void ccw_machine_5_0_instance_options(MachineState *machine) { diff --git a/include/hw/boards.h b/include/hw/boards.h index 426ce5f625a4..bc5b82ad209e 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -319,6 +319,9 @@ struct MachineState { } \ type_init(machine_initfn##_register_types) =20 +extern GlobalProperty hw_compat_5_1[]; +extern const size_t hw_compat_5_1_len; + extern GlobalProperty hw_compat_5_0[]; extern const size_t hw_compat_5_0_len; =20 diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 3d7ed3a55e30..fe52e165b27c 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -193,6 +193,9 @@ void pc_system_firmware_init(PCMachineState *pcms, Memo= ryRegion *rom_memory); void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, const CPUArchIdList *apic_ids, GArray *entry); =20 +extern GlobalProperty pc_compat_5_1[]; +extern const size_t pc_compat_5_1_len; + extern GlobalProperty pc_compat_5_0[]; extern const size_t pc_compat_5_0_len; =20 --=20 2.25.4 From nobody Mon Apr 29 08:46:29 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1596619285; cv=none; d=zohomail.com; s=zohoarc; b=BYk7RW4EFoWQwsnt9mKlezJ9htajdc2eAiKYMmdnWWweXWvuggCgzezz5b+nUnFuDaJJ+lCemps/9hVwUJ2QbXbROTg5I3syjHdkBb/2cHzc5DWgknAzjMuqtXeqYMVp5Z8StinCv2KttIKXYRm4O4COQMEtCGUklrLAeiFBN3Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1596619285; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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d=redhat.com; s=mimecast20190719; t=1596619081; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RaBgmbtPTVZPc9Dfy2dHqvHe+ifm4ZctTlglyls1p9k=; b=QlD3L0cFtWKYYobgeIWh+fANQb0ool5LVO8XeZ3tdyy5u4VGTLWjKz0E4p9M5a6Phay30c DYXkEtscCoHwi7CFo22Fx6tIH7rgjD/pCnzOCw+WDoxtkYdrPwyLWiGtopsD1ngZKl+w6S mQb9aB1wuDrMRyPRw/GzENqW3QfoZdI= X-MC-Unique: HPfPi3m4OBK3opOw05WMGg-1 From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [PATCH v2 2/5] target/arm/kvm: Make uncalled stubs explicitly unreachable Date: Wed, 5 Aug 2020 11:16:37 +0200 Message-Id: <20200805091640.11134-3-drjones@redhat.com> In-Reply-To: <20200805091640.11134-1-drjones@redhat.com> References: <20200805091640.11134-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" When we compile without KVM support !defined(CONFIG_KVM) we generate stubs for functions that the linker will still encounter. Sometimes these stubs can be executed safely and are placed in paths where they get executed with or without KVM. Other functions should never be called without KVM. Those functions should be guarded by kvm_enabled(), but should also be robust to refactoring mistakes. Putting a g_assert_not_reached() in the function should help. Additionally, the g_assert_not_reached() calls may actually help the linker remove some code. We remove the stubs for kvm_arm_get/put_virtual_time(), as they aren't necessary at all - the only caller is in kvm.c Signed-off-by: Andrew Jones Reviewed-by: Eric Auger --- target/arm/kvm_arm.h | 44 +++++++++++++++++++++++++++----------------- 1 file changed, 27 insertions(+), 17 deletions(-) diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index adb38514bf20..0da00eb6b20c 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -344,16 +344,10 @@ int kvm_arm_set_irq(int cpu, int irqtype, int irq, in= t level); =20 #else =20 -static inline void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) -{ - /* - * This should never actually be called in the "not KVM" case, - * but set up the fields to indicate an error anyway. - */ - cpu->kvm_target =3D QEMU_KVM_ARM_TARGET_NONE; - cpu->host_cpu_probe_failed =3D true; -} - +/* + * It's safe to call these functions without KVM support. + * They should either do nothing or return "not supported". + */ static inline void kvm_arm_add_vcpu_properties(Object *obj) {} =20 static inline bool kvm_arm_aarch32_supported(void) @@ -371,23 +365,39 @@ static inline bool kvm_arm_sve_supported(void) return false; } =20 +/* + * These functions should never actually be called without KVM support. + */ +static inline void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) +{ + g_assert_not_reached(); +} + static inline int kvm_arm_get_max_vm_ipa_size(MachineState *ms) { - return -ENOENT; + g_assert_not_reached(); } =20 static inline int kvm_arm_vgic_probe(void) { - return 0; + g_assert_not_reached(); } =20 -static inline void kvm_arm_pmu_set_irq(CPUState *cs, int irq) {} -static inline void kvm_arm_pmu_init(CPUState *cs) {} +static inline void kvm_arm_pmu_set_irq(CPUState *cs, int irq) +{ + g_assert_not_reached(); +} =20 -static inline void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map) {} +static inline void kvm_arm_pmu_init(CPUState *cs) +{ + g_assert_not_reached(); +} + +static inline void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map) +{ + g_assert_not_reached(); +} =20 -static inline void kvm_arm_get_virtual_time(CPUState *cs) {} -static inline void kvm_arm_put_virtual_time(CPUState *cs) {} #endif =20 static inline const char *gic_class_name(void) --=20 2.25.4 From nobody Mon Apr 29 08:46:29 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Wed, 05 Aug 2020 05:16:53 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-280-Xh10qcC0P56QBse70mn95A-1; Wed, 05 Aug 2020 05:16:48 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id D08E6100AA28; Wed, 5 Aug 2020 09:16:47 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.40.192.31]) by smtp.corp.redhat.com (Postfix) with ESMTP id 909BC2DE66; Wed, 5 Aug 2020 09:16:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1596619010; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=J99HLmEIThaLCCZCR99/ESk/rkShlj/GIdpjJrYfWy0=; b=BCypG/DcBX+47+MTTo2I6Kt8SUSSC/1BHeQxowNjZwKXEKj07N1mPPsAL7rLI8ttK0uoiT q+RPQFNwssWga57P2d6b+y3l5iRjsvaOyEl9wMmSfjFEIG+aBEPI6iXwcA4kKC9990U1Mq 1KQjXG7Eq3sQ/ANLyHV31MDOdd+xL0w= X-MC-Unique: Xh10qcC0P56QBse70mn95A-1 From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [PATCH v2 3/5] hw/arm/virt: Move post cpu realize check into its own function Date: Wed, 5 Aug 2020 11:16:38 +0200 Message-Id: <20200805091640.11134-4-drjones@redhat.com> In-Reply-To: <20200805091640.11134-1-drjones@redhat.com> References: <20200805091640.11134-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.139.110.120; envelope-from=drjones@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/05 00:45:55 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" We'll add more to this new function in coming patches so we also state the gic must be created and call it below create_gic(). No functional change intended. Signed-off-by: Andrew Jones Reviewed-by: Peter Maydell Reviewed-by: Eric Auger --- hw/arm/virt.c | 43 +++++++++++++++++++++++++++---------------- 1 file changed, 27 insertions(+), 16 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index acf9bfbeceaf..2cba21fe3ad9 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1672,6 +1672,31 @@ static void finalize_gic_version(VirtMachineState *v= ms) } } =20 +/* + * virt_cpu_post_init() must be called after the CPUs have + * been realized and the GIC has been created. + */ +static void virt_cpu_post_init(VirtMachineState *vms) +{ + bool aarch64; + + aarch64 =3D object_property_get_bool(OBJECT(first_cpu), "aarch64", NUL= L); + + if (!kvm_enabled()) { + if (aarch64 && vms->highmem) { + int requested_pa_size =3D 64 - clz64(vms->highest_gpa); + int pamax =3D arm_pamax(ARM_CPU(first_cpu)); + + if (pamax < requested_pa_size) { + error_report("VCPU supports less PA bits (%d) than " + "requested by the memory map (%d)", + pamax, requested_pa_size); + exit(1); + } + } + } +} + static void machvirt_init(MachineState *machine) { VirtMachineState *vms =3D VIRT_MACHINE(machine); @@ -1886,22 +1911,6 @@ static void machvirt_init(MachineState *machine) fdt_add_timer_nodes(vms); fdt_add_cpu_nodes(vms); =20 - if (!kvm_enabled()) { - ARMCPU *cpu =3D ARM_CPU(first_cpu); - bool aarch64 =3D object_property_get_bool(OBJECT(cpu), "aarch64", = NULL); - - if (aarch64 && vms->highmem) { - int requested_pa_size, pamax =3D arm_pamax(cpu); - - requested_pa_size =3D 64 - clz64(vms->highest_gpa); - if (pamax < requested_pa_size) { - error_report("VCPU supports less PA bits (%d) than request= ed " - "by the memory map (%d)", pamax, requested_pa_= size); - exit(1); - } - } - } - memory_region_add_subregion(sysmem, vms->memmap[VIRT_MEM].base, machine->ram); if (machine->device_memory) { @@ -1913,6 +1922,8 @@ static void machvirt_init(MachineState *machine) =20 create_gic(vms); =20 + virt_cpu_post_init(vms); + fdt_add_pmu_nodes(vms); =20 create_uart(vms, VIRT_UART, sysmem, serial_hd(0)); --=20 2.25.4 From nobody Mon Apr 29 08:46:29 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1596619098; cv=none; d=zohomail.com; s=zohoarc; b=WufiowC1h6jzBJ8rhar1Wg01isJp46+c42MuTArWbuiga5ZGPr/Ewbas8emro640Miohtwnu4dwLPL0flUOqTFwQMnUHz/MjNpLZhljyBmsZZ26KVT/IPXt8FJkZKZ6ig0HDO4wO+Xe0zZdpD8ucWXsubQGrQ4q67f6WTbiF7SM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1596619098; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=yQ7NqwnS9x8fYymYrzndDH70wQZ0/7b3C7tTozwMShA=; b=Bdgt5Ljcx307Wq4N/LD1pRzufmr1e10lamrtqfGO7jqnZwzlknlu7o4w3Ez9IgM5xGMJeDdPs+E9dMz+zFOuwfQ2k8iHHHE1KxCltBD2KdcaEQ21dfKVi0oUEPmdI3Cevx4xoKGbTHugIbLafsYeO6M5aHWRqnVAD/G++D5bOMg= ARC-Authentication-Results: i=1; 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Wed, 05 Aug 2020 05:16:54 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-350-EjGZ8AWaOB20orOLtguKOw-1; Wed, 05 Aug 2020 05:16:50 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 7529E80183C; Wed, 5 Aug 2020 09:16:49 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.40.192.31]) by smtp.corp.redhat.com (Postfix) with ESMTP id 380C12DE71; Wed, 5 Aug 2020 09:16:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1596619012; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yQ7NqwnS9x8fYymYrzndDH70wQZ0/7b3C7tTozwMShA=; b=byyx5BGbVbpPACFLnsFk+3Y6Q3fAUOmCyj+Hz+QW/dC1c60tlXZMqenyVbJJHLVAXsM54C NJFLTIkj3qyFtDynSd2zUoGvGB56cW0DJP1znPTscigA3oPYDU1Y3+ulCER4WAJ6xEqv0r PeoqZIekuTbfMswvtwW5pD6XUkcX9l8= X-MC-Unique: EjGZ8AWaOB20orOLtguKOw-1 From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [PATCH v2 4/5] hw/arm/virt: Move kvm pmu setup to virt_cpu_post_init Date: Wed, 5 Aug 2020 11:16:39 +0200 Message-Id: <20200805091640.11134-5-drjones@redhat.com> In-Reply-To: <20200805091640.11134-1-drjones@redhat.com> References: <20200805091640.11134-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.139.110.120; envelope-from=drjones@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/05 00:45:55 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" Move the KVM PMU setup part of fdt_add_pmu_nodes() to virt_cpu_post_init(), which is a more appropriate location. Now fdt_add_pmu_nodes() is also named more appropriately, because it no longer does anything but fdt node creation. No functional change intended. Signed-off-by: Andrew Jones Reviewed-by: Peter Maydell --- hw/arm/virt.c | 34 ++++++++++++++++++---------------- 1 file changed, 18 insertions(+), 16 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 2cba21fe3ad9..6797eb397a7a 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -521,21 +521,12 @@ static void fdt_add_gic_node(VirtMachineState *vms) =20 static void fdt_add_pmu_nodes(const VirtMachineState *vms) { - CPUState *cpu; - ARMCPU *armcpu; + ARMCPU *armcpu =3D ARM_CPU(first_cpu); uint32_t irqflags =3D GIC_FDT_IRQ_FLAGS_LEVEL_HI; =20 - CPU_FOREACH(cpu) { - armcpu =3D ARM_CPU(cpu); - if (!arm_feature(&armcpu->env, ARM_FEATURE_PMU)) { - return; - } - if (kvm_enabled()) { - if (kvm_irqchip_in_kernel()) { - kvm_arm_pmu_set_irq(cpu, PPI(VIRTUAL_PMU_IRQ)); - } - kvm_arm_pmu_init(cpu); - } + if (!arm_feature(&armcpu->env, ARM_FEATURE_PMU)) { + assert(!object_property_get_bool(OBJECT(armcpu), "pmu", NULL)); + return; } =20 if (vms->gic_version =3D=3D VIRT_GIC_VERSION_2) { @@ -544,7 +535,6 @@ static void fdt_add_pmu_nodes(const VirtMachineState *v= ms) (1 << vms->smp_cpus) - 1); } =20 - armcpu =3D ARM_CPU(qemu_get_cpu(0)); qemu_fdt_add_subnode(vms->fdt, "/pmu"); if (arm_feature(&armcpu->env, ARM_FEATURE_V8)) { const char compat[] =3D "arm,armv8-pmuv3"; @@ -1678,11 +1668,23 @@ static void finalize_gic_version(VirtMachineState *= vms) */ static void virt_cpu_post_init(VirtMachineState *vms) { - bool aarch64; + bool aarch64, pmu; + CPUState *cpu; =20 aarch64 =3D object_property_get_bool(OBJECT(first_cpu), "aarch64", NUL= L); + pmu =3D object_property_get_bool(OBJECT(first_cpu), "pmu", NULL); =20 - if (!kvm_enabled()) { + if (kvm_enabled()) { + CPU_FOREACH(cpu) { + if (pmu) { + assert(arm_feature(&ARM_CPU(cpu)->env, ARM_FEATURE_PMU)); + if (kvm_irqchip_in_kernel()) { + kvm_arm_pmu_set_irq(cpu, PPI(VIRTUAL_PMU_IRQ)); + } + kvm_arm_pmu_init(cpu); + } + } + } else { if (aarch64 && vms->highmem) { int requested_pa_size =3D 64 - clz64(vms->highest_gpa); int pamax =3D arm_pamax(ARM_CPU(first_cpu)); --=20 2.25.4 From nobody Mon Apr 29 08:46:29 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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bh=+MSNTGvGJm/uPgvZBhz52mJo2UtiPQ4DAKq0KVkbeWs=; b=OVXhBJn1OYMqy0pLy9s6dMIj+QcjbOAYlnW641PkdLACdngq5x/C3w8RLbmtTQNKCVf419 c4J1q2NC8tIXQ/fSWmYkta6Z2G+VmUfyzefWlRIdBcgwqCE7N09n4BYaiIptSSOn5ndMdw URfusnB7Al3G7xSSNM28sDVhj66SVZE= X-MC-Unique: -_f7XA7mO3KtZ_PW2vx8Rg-1 From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [PATCH v2 5/5] hw/arm/virt: Implement kvm-steal-time Date: Wed, 5 Aug 2020 11:16:40 +0200 Message-Id: <20200805091640.11134-6-drjones@redhat.com> In-Reply-To: <20200805091640.11134-1-drjones@redhat.com> References: <20200805091640.11134-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.81; envelope-from=drjones@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/05 03:37:07 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" We add the kvm-steal-time CPU property and implement it for machvirt. A tiny bit of refactoring was also done to allow pmu and pvtime to use the same vcpu device helper functions. Signed-off-by: Andrew Jones Reviewed-by: Eric Auger --- docs/system/arm/cpu-features.rst | 11 +++++ hw/arm/virt.c | 43 ++++++++++++++++-- include/hw/arm/virt.h | 5 +++ target/arm/cpu.c | 10 +++++ target/arm/cpu.h | 4 ++ target/arm/kvm.c | 20 +++++++++ target/arm/kvm32.c | 5 +++ target/arm/kvm64.c | 77 +++++++++++++++++++++++++++++--- target/arm/kvm_arm.h | 30 +++++++++++++ target/arm/monitor.c | 2 +- tests/qtest/arm-cpu-features.c | 25 +++++++++-- 11 files changed, 219 insertions(+), 13 deletions(-) diff --git a/docs/system/arm/cpu-features.rst b/docs/system/arm/cpu-feature= s.rst index 2d5c06cd016b..35196a6b759d 100644 --- a/docs/system/arm/cpu-features.rst +++ b/docs/system/arm/cpu-features.rst @@ -200,6 +200,17 @@ the list of KVM VCPU features and their descriptions. adjustment, also restoring the legacy (pre-5.0) behavior. =20 + kvm-steal-time Since v5.2, kvm-steal-time is enabled by + default when KVM is enabled, the feature is + supported, and the guest is 64-bit. + + When kvm-steal-time is enabled a 64-bit guest + can account for time its CPUs were not running + due to the host not scheduling the corresponding + VCPU threads. The accounting statistics may + influence the guest scheduler behavior and/or be + exposed to the guest userspace. + SVE CPU Properties =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 6797eb397a7a..12efc2f095cb 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -151,6 +151,7 @@ static const MemMapEntry base_memmap[] =3D { [VIRT_PCDIMM_ACPI] =3D { 0x09070000, MEMORY_HOTPLUG_IO_LEN }, [VIRT_ACPI_GED] =3D { 0x09080000, ACPI_GED_EVT_SEL_LEN }, [VIRT_NVDIMM_ACPI] =3D { 0x09090000, NVDIMM_ACPI_IO_LEN}, + [VIRT_PVTIME] =3D { 0x090a0000, 0x00010000 }, [VIRT_MMIO] =3D { 0x0a000000, 0x00000200 }, /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that siz= e */ [VIRT_PLATFORM_BUS] =3D { 0x0c000000, 0x02000000 }, @@ -1666,15 +1667,39 @@ static void finalize_gic_version(VirtMachineState *= vms) * virt_cpu_post_init() must be called after the CPUs have * been realized and the GIC has been created. */ -static void virt_cpu_post_init(VirtMachineState *vms) +static void virt_cpu_post_init(VirtMachineState *vms, int max_cpus, + MemoryRegion *sysmem) { - bool aarch64, pmu; + bool aarch64, pmu, steal_time; CPUState *cpu; =20 aarch64 =3D object_property_get_bool(OBJECT(first_cpu), "aarch64", NUL= L); pmu =3D object_property_get_bool(OBJECT(first_cpu), "pmu", NULL); + steal_time =3D object_property_get_bool(OBJECT(first_cpu), + "kvm-steal-time", NULL); =20 if (kvm_enabled()) { + hwaddr pvtime_reg_base =3D vms->memmap[VIRT_PVTIME].base; + hwaddr pvtime_reg_size =3D vms->memmap[VIRT_PVTIME].size; + + if (steal_time) { + MemoryRegion *pvtime =3D g_new(MemoryRegion, 1); + hwaddr pvtime_size =3D max_cpus * PVTIME_SIZE_PER_CPU; + + /* The memory region size must be a multiple of host page size= . */ + pvtime_size =3D REAL_HOST_PAGE_ALIGN(pvtime_size); + + if (pvtime_size > pvtime_reg_size) { + error_report("pvtime requires a %ld byte memory region for= " + "%d CPUs, but only %ld has been reserved", + pvtime_size, max_cpus, pvtime_reg_size); + exit(1); + } + + memory_region_init_ram(pvtime, NULL, "pvtime", pvtime_size, NU= LL); + memory_region_add_subregion(sysmem, pvtime_reg_base, pvtime); + } + CPU_FOREACH(cpu) { if (pmu) { assert(arm_feature(&ARM_CPU(cpu)->env, ARM_FEATURE_PMU)); @@ -1683,6 +1708,10 @@ static void virt_cpu_post_init(VirtMachineState *vms) } kvm_arm_pmu_init(cpu); } + if (steal_time) { + kvm_arm_pvtime_init(cpu, pvtime_reg_base + + cpu->cpu_index * PVTIME_SIZE_PER_= CPU); + } } } else { if (aarch64 && vms->highmem) { @@ -1853,6 +1882,11 @@ static void machvirt_init(MachineState *machine) object_property_set_bool(cpuobj, "kvm-no-adjvtime", true, NULL= ); } =20 + if (vmc->no_kvm_steal_time && + object_property_find(cpuobj, "kvm-steal-time", NULL)) { + object_property_set_bool(cpuobj, "kvm-steal-time", false, NULL= ); + } + if (vmc->no_pmu && object_property_find(cpuobj, "pmu", NULL)) { object_property_set_bool(cpuobj, "pmu", false, NULL); } @@ -1924,7 +1958,7 @@ static void machvirt_init(MachineState *machine) =20 create_gic(vms); =20 - virt_cpu_post_init(vms); + virt_cpu_post_init(vms, possible_cpus->len, sysmem); =20 fdt_add_pmu_nodes(vms); =20 @@ -2566,8 +2600,11 @@ DEFINE_VIRT_MACHINE_AS_LATEST(5, 2) =20 static void virt_machine_5_1_options(MachineClass *mc) { + VirtMachineClass *vmc =3D VIRT_MACHINE_CLASS(OBJECT_CLASS(mc)); + virt_machine_5_2_options(mc); compat_props_add(mc->compat_props, hw_compat_5_1, hw_compat_5_1_len); + vmc->no_kvm_steal_time =3D true; } DEFINE_VIRT_MACHINE(5, 1) =20 diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index dff67e1bef03..5fb43a009f7a 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -53,6 +53,9 @@ =20 #define PPI(irq) ((irq) + 16) =20 +/* See Linux kernel arch/arm64/include/asm/pvclock-abi.h */ +#define PVTIME_SIZE_PER_CPU 64 + enum { VIRT_FLASH, VIRT_MEM, @@ -80,6 +83,7 @@ enum { VIRT_PCDIMM_ACPI, VIRT_ACPI_GED, VIRT_NVDIMM_ACPI, + VIRT_PVTIME, VIRT_LOWMEMMAP_LAST, }; =20 @@ -126,6 +130,7 @@ typedef struct { bool no_ged; /* Machines < 4.2 has no support for ACPI GED device */ bool kvm_no_adjvtime; bool acpi_expose_flash; + bool no_kvm_steal_time; } VirtMachineClass; =20 typedef struct { diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 111579554fb9..866d0a9fb146 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1308,6 +1308,16 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **= errp) return; } } + + if (kvm_enabled()) { +#ifdef TARGET_AARCH64 + kvm_arm_steal_time_finalize(cpu, &local_err); + if (local_err !=3D NULL) { + error_propagate(errp, local_err); + return; + } +#endif + } } =20 static void arm_cpu_realizefn(DeviceState *dev, Error **errp) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 9e8ed423ea1d..a4d4cb640c77 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -24,6 +24,7 @@ #include "hw/registerfields.h" #include "cpu-qom.h" #include "exec/cpu-defs.h" +#include "qapi/qapi-types-common.h" =20 /* ARM processors have a weak memory model */ #define TCG_GUEST_DEFAULT_MO (0) @@ -859,6 +860,9 @@ struct ARMCPU { bool kvm_vtime_dirty; uint64_t kvm_vtime; =20 + /* KVM steal time */ + OnOffAuto kvm_steal_time; + /* Uniprocessor system with MP extensions */ bool mp_is_up; =20 diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 8bb7318378b5..093a290453f6 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -192,6 +192,18 @@ static void kvm_no_adjvtime_set(Object *obj, bool valu= e, Error **errp) ARM_CPU(obj)->kvm_adjvtime =3D !value; } =20 +#ifdef TARGET_AARCH64 +static bool kvm_steal_time_get(Object *obj, Error **errp) +{ + return ARM_CPU(obj)->kvm_steal_time !=3D ON_OFF_AUTO_OFF; +} + +static void kvm_steal_time_set(Object *obj, bool value, Error **errp) +{ + ARM_CPU(obj)->kvm_steal_time =3D value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_= OFF; +} +#endif + /* KVM VCPU properties should be prefixed with "kvm-". */ void kvm_arm_add_vcpu_properties(Object *obj) { @@ -207,6 +219,14 @@ void kvm_arm_add_vcpu_properties(Object *obj) "the virtual counter. VM stopped t= ime " "will be counted."); } + +#ifdef TARGET_AARCH64 + cpu->kvm_steal_time =3D ON_OFF_AUTO_AUTO; + object_property_add_bool(obj, "kvm-steal-time", kvm_steal_time_get, + kvm_steal_time_set); + object_property_set_description(obj, "kvm-steal-time", + "Set off to disable KVM steal time."); +#endif } =20 bool kvm_arm_pmu_supported(void) diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c index 0af46b41c847..d3f3195077fa 100644 --- a/target/arm/kvm32.c +++ b/target/arm/kvm32.c @@ -560,6 +560,11 @@ void kvm_arm_pmu_init(CPUState *cs) qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__); } =20 +void kvm_arm_pvtime_init(CPUState *cs, uint64_t ipa) +{ + qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__); +} + #define ARM_REG_DFSR ARM_CP15_REG32(0, 5, 0, 0) #define ARM_REG_TTBCR ARM_CP15_REG32(0, 2, 0, 2) /* diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 116923790550..4de1eeb723ac 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -17,6 +17,7 @@ #include =20 #include "qemu-common.h" +#include "qapi/error.h" #include "cpu.h" #include "qemu/timer.h" #include "qemu/error-report.h" @@ -398,19 +399,20 @@ static CPUWatchpoint *find_hw_watchpoint(CPUState *cp= u, target_ulong addr) return NULL; } =20 -static bool kvm_arm_pmu_set_attr(CPUState *cs, struct kvm_device_attr *att= r) +static bool kvm_arm_set_device_attr(CPUState *cs, struct kvm_device_attr *= attr, + const char *name) { int err; =20 err =3D kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr); if (err !=3D 0) { - error_report("PMU: KVM_HAS_DEVICE_ATTR: %s", strerror(-err)); + error_report("%s: KVM_HAS_DEVICE_ATTR: %s", name, strerror(-err)); return false; } =20 err =3D kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, attr); if (err !=3D 0) { - error_report("PMU: KVM_SET_DEVICE_ATTR: %s", strerror(-err)); + error_report("%s: KVM_SET_DEVICE_ATTR: %s", name, strerror(-err)); return false; } =20 @@ -427,7 +429,7 @@ void kvm_arm_pmu_init(CPUState *cs) if (!ARM_CPU(cs)->has_pmu) { return; } - if (!kvm_arm_pmu_set_attr(cs, &attr)) { + if (!kvm_arm_set_device_attr(cs, &attr, "PMU")) { error_report("failed to init PMU"); abort(); } @@ -444,12 +446,29 @@ void kvm_arm_pmu_set_irq(CPUState *cs, int irq) if (!ARM_CPU(cs)->has_pmu) { return; } - if (!kvm_arm_pmu_set_attr(cs, &attr)) { + if (!kvm_arm_set_device_attr(cs, &attr, "PMU")) { error_report("failed to set irq for PMU"); abort(); } } =20 +void kvm_arm_pvtime_init(CPUState *cs, uint64_t ipa) +{ + struct kvm_device_attr attr =3D { + .group =3D KVM_ARM_VCPU_PVTIME_CTRL, + .attr =3D KVM_ARM_VCPU_PVTIME_IPA, + .addr =3D (uint64_t)&ipa, + }; + + if (ARM_CPU(cs)->kvm_steal_time =3D=3D ON_OFF_AUTO_OFF) { + return; + } + if (!kvm_arm_set_device_attr(cs, &attr, "PVTIME IPA")) { + error_report("failed to init PVTIME IPA"); + abort(); + } +} + static int read_sys_reg32(int fd, uint32_t *pret, uint64_t id) { uint64_t ret; @@ -652,6 +671,54 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures = *ahcf) return true; } =20 +void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp) +{ + static bool has_steal_time; + static bool probed; + int fdarray[3]; + + if (!probed) { + probed =3D true; + if (kvm_check_extension(kvm_state, KVM_CAP_VCPU_ATTRIBUTES)) { + if (!kvm_arm_create_scratch_host_vcpu(NULL, fdarray, NULL)) { + error_report("Failed to create scratch VCPU"); + abort(); + } + + has_steal_time =3D kvm_device_check_attr(fdarray[2], + KVM_ARM_VCPU_PVTIME_CTR= L, + KVM_ARM_VCPU_PVTIME_IPA= ); + + kvm_arm_destroy_scratch_host_vcpu(fdarray); + } + } + + if (cpu->kvm_steal_time =3D=3D ON_OFF_AUTO_AUTO) { + if (!has_steal_time || !arm_feature(&cpu->env, ARM_FEATURE_AARCH64= )) { + cpu->kvm_steal_time =3D ON_OFF_AUTO_OFF; + } else { + cpu->kvm_steal_time =3D ON_OFF_AUTO_ON; + } + } else if (cpu->kvm_steal_time =3D=3D ON_OFF_AUTO_ON) { + if (!has_steal_time) { + error_setg(errp, "'kvm-steal-time' cannot be enabled " + "on this host"); + return; + } else if (!arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { + /* + * DEN0057A chapter 2 says "This specification only covers + * systems in which the Execution state of the hypervisor + * as well as EL1 of virtual machines is AArch64.". And, + * to ensure that, the smc/hvc calls are only specified as + * smc64/hvc64. + */ + error_setg(errp, "'kvm-steal-time' cannot be enabled " + "for AArch32 guests"); + return; + } + } +} + bool kvm_arm_aarch32_supported(void) { return kvm_check_extension(kvm_state, KVM_CAP_ARM_EL1_32BIT); diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index 0da00eb6b20c..4a8969505967 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -267,6 +267,16 @@ void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu); */ void kvm_arm_add_vcpu_properties(Object *obj); =20 +/** + * kvm_arm_steal_time_finalize: + * @cpu: ARMCPU for which to finalize kvm-steal-time + * @errp: Pointer to Error* for error propagation + * + * Validate the kvm-steal-time property selection and set its default + * based on KVM support and guest configuration. + */ +void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp); + /** * kvm_arm_aarch32_supported: * @@ -340,6 +350,16 @@ int kvm_arm_vgic_probe(void); =20 void kvm_arm_pmu_set_irq(CPUState *cs, int irq); void kvm_arm_pmu_init(CPUState *cs); + +/** + * kvm_arm_pvtime_init: + * @cs: CPUState + * @ipa: Per-vcpu guest physical base address of the pvtime structures + * + * Initializes PVTIME for the VCPU, setting the PVTIME IPA to @ipa. + */ +void kvm_arm_pvtime_init(CPUState *cs, uint64_t ipa); + int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level); =20 #else @@ -393,6 +413,16 @@ static inline void kvm_arm_pmu_init(CPUState *cs) g_assert_not_reached(); } =20 +static inline void kvm_arm_pvtime_init(CPUState *cs, uint64_t ipa) +{ + g_assert_not_reached(); +} + +static inline void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp) +{ + g_assert_not_reached(); +} + static inline void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map) { g_assert_not_reached(); diff --git a/target/arm/monitor.c b/target/arm/monitor.c index ba6e01abd037..bd3590604a71 100644 --- a/target/arm/monitor.c +++ b/target/arm/monitor.c @@ -103,7 +103,7 @@ static const char *cpu_model_advertised_features[] =3D { "sve128", "sve256", "sve384", "sve512", "sve640", "sve768", "sve896", "sve1024", "sve1152", "sve1280", "sve1408", "sve1536", "sve1664", "sve1792", "sve1920", "sve2048", - "kvm-no-adjvtime", + "kvm-no-adjvtime", "kvm-steal-time", NULL }; =20 diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c index f7e062c1891e..91b181f38268 100644 --- a/tests/qtest/arm-cpu-features.c +++ b/tests/qtest/arm-cpu-features.c @@ -452,6 +452,7 @@ static void test_query_cpu_model_expansion(const void *= data) assert_set_feature(qts, "max", "pmu", true); =20 assert_has_not_feature(qts, "max", "kvm-no-adjvtime"); + assert_has_not_feature(qts, "max", "kvm-steal-time"); =20 if (g_str_equal(qtest_get_arch(), "aarch64")) { assert_has_feature_enabled(qts, "max", "aarch64"); @@ -493,6 +494,7 @@ static void test_query_cpu_model_expansion_kvm(const vo= id *data) assert_set_feature(qts, "host", "kvm-no-adjvtime", false); =20 if (g_str_equal(qtest_get_arch(), "aarch64")) { + bool kvm_supports_steal_time; bool kvm_supports_sve; char max_name[8], name[8]; uint32_t max_vq, vq; @@ -500,6 +502,10 @@ static void test_query_cpu_model_expansion_kvm(const v= oid *data) QDict *resp; char *error; =20 + assert_error(qts, "cortex-a15", + "We cannot guarantee the CPU type 'cortex-a15' works " + "with KVM on this host", NULL); + assert_has_feature_enabled(qts, "host", "aarch64"); =20 /* Enabling and disabling pmu should always work. */ @@ -507,16 +513,26 @@ static void test_query_cpu_model_expansion_kvm(const = void *data) assert_set_feature(qts, "host", "pmu", false); assert_set_feature(qts, "host", "pmu", true); =20 - assert_error(qts, "cortex-a15", - "We cannot guarantee the CPU type 'cortex-a15' works " - "with KVM on this host", NULL); - + /* + * Some features would be enabled by default, but they're disabled + * because this instance of KVM doesn't support them. Test that the + * features are present, and, when enabled, issue further tests. + */ + assert_has_feature(qts, "host", "kvm-steal-time"); assert_has_feature(qts, "host", "sve"); + resp =3D do_query_no_props(qts, "host"); + kvm_supports_steal_time =3D resp_get_feature(resp, "kvm-steal-time= "); kvm_supports_sve =3D resp_get_feature(resp, "sve"); vls =3D resp_get_sve_vls(resp); qobject_unref(resp); =20 + if (kvm_supports_steal_time) { + /* If we have steal-time then we should be able to toggle it. = */ + assert_set_feature(qts, "host", "kvm-steal-time", false); + assert_set_feature(qts, "host", "kvm-steal-time", true); + } + if (kvm_supports_sve) { g_assert(vls !=3D 0); max_vq =3D 64 - __builtin_clzll(vls); @@ -577,6 +593,7 @@ static void test_query_cpu_model_expansion_kvm(const vo= id *data) assert_has_not_feature(qts, "host", "aarch64"); assert_has_not_feature(qts, "host", "pmu"); assert_has_not_feature(qts, "host", "sve"); + assert_has_not_feature(qts, "host", "kvm-steal-time"); } =20 qtest_quit(qts); --=20 2.25.4