From nobody Sun May 5 21:10:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1596453594; cv=none; d=zohomail.com; s=zohoarc; b=SRJEGdeZ//QiBQoH9vWlaW5RXtA/yP/7grVDeIZDXat4wIz2+h49j59RPIWkh6Lw2Sru15Ajv3qYKEj1fQyha2VgDvpoieUrFsJCEmg6vBG++jLe22ocUE1O6uOUfakE7lwQuhm5D70JcIak/MV+t5Wi1JONA7vusUVMX5FUSGA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1596453594; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=/neSeNxwoki6I3Nz+WJ6z9QBWGfcGKIdgejdhynD3JY=; b=MhxDai+aEwPUP/YTE19ekLH1AFJ+8cw3GpgvwRaagDFn/TsRm50X4aJ0Gzh3SC+U52u7Oi6GNZyKxYi6dt6ugiM28ywK0qe2TXujApY+1KQlEDkPSJOkjEfMDUodcHknQi1pOFBldKPM3sTJelIsIpiao4qTujoE+qsHQa8JqJc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1596453594215480.75287268762963; Mon, 3 Aug 2020 04:19:54 -0700 (PDT) Received: from localhost ([::1]:45664 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k2YVS-0004qn-Sc for importer@patchew.org; Mon, 03 Aug 2020 07:19:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45862) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k2YUa-0003h1-Vf for qemu-devel@nongnu.org; Mon, 03 Aug 2020 07:18:56 -0400 Received: from mail-wm1-x344.google.com ([2a00:1450:4864:20::344]:50799) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1k2YUZ-0004s2-4p for qemu-devel@nongnu.org; Mon, 03 Aug 2020 07:18:56 -0400 Received: by mail-wm1-x344.google.com with SMTP id c80so13985255wme.0 for ; Mon, 03 Aug 2020 04:18:54 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm28013170wrb.59.2020.08.03.04.18.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2020 04:18:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=/neSeNxwoki6I3Nz+WJ6z9QBWGfcGKIdgejdhynD3JY=; b=nnNtqdEvagU3M94UKB7O0AlcjUn6f382ygY/Gg4IVF4k6TqQkCLqVGp3ssTzrGgbtp l4OMMKRYEj1wxbrDL8Yl18i1HBlbBKavpGmvVloUpGsHJB08eoBlSQctu6zRdKwgZ0hU 8c4kEdDhRS3hnwMj43r8+OQU5l8+gclQExE2mfJ5JxapnuKUwQWZ53rsoX1+zLSJr/X3 jCN5QxtgbKgTojBQlJ8MQGXS3c7hFXJ4vuqWfjIIZ6y0dJkoO1ECI8kKJQudCNBSV2Er Zr0yNoJJV6S/36QWpEKHJ/fqnZ8dekQ7lAY0wtzPR5hIAG43NQdsYMxsMdoXDmxxT+1I f+wQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/neSeNxwoki6I3Nz+WJ6z9QBWGfcGKIdgejdhynD3JY=; b=mq54AnXnk0lZDProULItsdw/yVTXUjo+sQrGGnf5nkSIIMlOCKVKTXiONCFy/xJ3FW mm3jQLs9oR4ojAFZVJqkBcYnbP9KeqE1AHEf0VoVP4DE/hCjNa7ri9hrqcpxN3Xbtw7c QOjntymWDTS1kgDRy+E66qbbkGb/QusW85JHXwn0XTZRn6pIDHPBGkyJhHawp7g01Pgp ckmj5s4RQmSSaVmOFXG/ALnY//FHNXOTM4379vpoCQ6nIH95Eqk/H0qiNNY9CZQQBadU kE1wIzml9s0ZUS0qYS8HBd3NfZ7FRjWLu/AMUPtJXeYmSw6qEs7nGtyL/kMoeLvR2XWf tBTQ== X-Gm-Message-State: AOAM531iOl7PVovBK2VN/KO5FeJoskUZ6Hm+oYYd7bMZLn+Ax3z/u82t +k3XHcaj5G4FBPj7ZxE8TJoRzg== X-Google-Smtp-Source: ABdhPJzy6t2SylL51B8XyWY/J2f4HGEtgMowe0iMvxm5hsdEjn+bWFe5Nqr+8tPAIrlh8mQ7umq+5w== X-Received: by 2002:a7b:c2aa:: with SMTP id c10mr14860688wmk.86.1596453533557; Mon, 03 Aug 2020 04:18:53 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 1/7] target/arm: Pull handling of XScale insns out of disas_coproc_insn() Date: Mon, 3 Aug 2020 12:18:43 +0100 Message-Id: <20200803111849.13368-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200803111849.13368-1-peter.maydell@linaro.org> References: <20200803111849.13368-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::344; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x344.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" At the moment we check for XScale/iwMMXt insns inside disas_coproc_insn(): for CPUs with ARM_FEATURE_XSCALE all copro insns with cp 0 or 1 are handled specially. This works, but is an odd place for this check, because disas_coproc_insn() is called from both the Arm and Thumb decoders but the XScale case never applies for Thumb (all the XScale CPUs were ARMv5, which has only Thumb1, not Thumb2 with the 32-bit coprocessor insn encodings). It also makes it awkward to convert the real copro access insns to decodetree. Move the identification of XScale out to its own function which is only called from disas_arm_insn(). Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/translate.c | 44 ++++++++++++++++++++++++++++-------------- 1 file changed, 29 insertions(+), 15 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index c39a929b938..a2765fc60b2 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4551,20 +4551,6 @@ static int disas_coproc_insn(DisasContext *s, uint32= _t insn) =20 cpnum =3D (insn >> 8) & 0xf; =20 - /* First check for coprocessor space used for XScale/iwMMXt insns */ - if (arm_dc_feature(s, ARM_FEATURE_XSCALE) && (cpnum < 2)) { - if (extract32(s->c15_cpar, cpnum, 1) =3D=3D 0) { - return 1; - } - if (arm_dc_feature(s, ARM_FEATURE_IWMMXT)) { - return disas_iwmmxt_insn(s, insn); - } else if (arm_dc_feature(s, ARM_FEATURE_XSCALE)) { - return disas_dsp_insn(s, insn); - } - return 1; - } - - /* Otherwise treat as a generic register access */ is64 =3D (insn & (1 << 25)) =3D=3D 0; if (!is64 && ((insn & (1 << 4)) =3D=3D 0)) { /* cdp */ @@ -4823,6 +4809,23 @@ static int disas_coproc_insn(DisasContext *s, uint32= _t insn) return 1; } =20 +/* Decode XScale DSP or iWMMXt insn (in the copro space, cp=3D0 or 1) */ +static void disas_xscale_insn(DisasContext *s, uint32_t insn) +{ + int cpnum =3D (insn >> 8) & 0xf; + + if (extract32(s->c15_cpar, cpnum, 1) =3D=3D 0) { + unallocated_encoding(s); + } else if (arm_dc_feature(s, ARM_FEATURE_IWMMXT)) { + if (disas_iwmmxt_insn(s, insn)) { + unallocated_encoding(s); + } + } else if (arm_dc_feature(s, ARM_FEATURE_XSCALE)) { + if (disas_dsp_insn(s, insn)) { + unallocated_encoding(s); + } + } +} =20 /* Store a 64-bit value to a register pair. Clobbers val. */ static void gen_storeq_reg(DisasContext *s, int rlow, int rhigh, TCGv_i64 = val) @@ -8270,15 +8273,26 @@ static void disas_arm_insn(DisasContext *s, unsigne= d int insn) case 0xc: case 0xd: case 0xe: - if (((insn >> 8) & 0xe) =3D=3D 10) { + { + /* First check for coprocessor space used for XScale/iwMMXt insns = */ + int cpnum =3D (insn >> 8) & 0xf; + + if (arm_dc_feature(s, ARM_FEATURE_XSCALE) && (cpnum < 2)) { + disas_xscale_insn(s, insn); + break; + } + + if ((cpnum & 0xe) =3D=3D 10) { /* VFP, but failed disas_vfp. */ goto illegal_op; } + if (disas_coproc_insn(s, insn)) { /* Coprocessor. */ goto illegal_op; } break; + } default: illegal_op: unallocated_encoding(s); --=20 2.20.1 From nobody Sun May 5 21:10:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1596453853; cv=none; d=zohomail.com; s=zohoarc; b=U2LRGQzu4Mj/V+wgF0ZWar+DIj+nqW1wDi+FwwXzLgwrX89G2YKT27tRo5cF4NNDeHZbvauJQ7uOnCcido8U6SZUz6InfMcHZl3jBinvgUZqDyRzxoJ8XLa7Cd7sm1Nkq0nZ+xhzoP74Qa45X9q4RdztIJVNhd6nhSGD4tG/dZk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1596453853; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=GdK1Bc8JNmdYj342FXS0zCz0nM9XuyCr0eFVY1VBs2Q=; b=OLdvfd35cMTOV7fnAi5QtP3MkQQRz727t5arK3OPJzdLEIE6lkADsTKAz8NdFbNMPYVGs9uyh9mDZvAVgje0zCiNET9ATn+8P0fGXr4ZWBp+twzeCvr0NyDxVDHnM9+oz48u4DULGJA3fhzpArYbqgA+/sN1r4sixd9CkUsDs2A= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 159645385351768.13767877508451; Mon, 3 Aug 2020 04:24:13 -0700 (PDT) Received: from localhost ([::1]:59518 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k2YZg-000235-73 for importer@patchew.org; Mon, 03 Aug 2020 07:24:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45902) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k2YUc-0003hI-Ig for qemu-devel@nongnu.org; Mon, 03 Aug 2020 07:18:58 -0400 Received: from mail-wm1-x342.google.com ([2a00:1450:4864:20::342]:40341) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1k2YUa-0004sE-JA for qemu-devel@nongnu.org; Mon, 03 Aug 2020 07:18:58 -0400 Received: by mail-wm1-x342.google.com with SMTP id k20so15047229wmi.5 for ; Mon, 03 Aug 2020 04:18:56 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm28013170wrb.59.2020.08.03.04.18.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2020 04:18:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=GdK1Bc8JNmdYj342FXS0zCz0nM9XuyCr0eFVY1VBs2Q=; b=xLByYNFXUy8ENf1HBwA0fIR6SHk/p6AI3SIUWqykqtbWlwS+siTiTE4GHVATZjatOw ViLTRlu332AUKOc8AmacvfA5XA6HCxwRleEDDn+mHRg8FqaXb51976/139U3jodnvdDb iC41aVLb26dkC2nqJpAVAFMOvKtGba0MDADOMw23ClGu/R/5pb7I/MtWtAG0+21Icw3d Uqu+lYNli1lP5flBM2SIY4Po3TjrJzuqAT2Efh5UKuG2VvrO+WCnf9bqMqNr9nDMS55a YqJPsG4EHeoCLY+mUN93Tti4FoLT1uC2ksumJKkd8eh5Ev1CnWC7eaLwZqcgwQHHp8yb g0Pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GdK1Bc8JNmdYj342FXS0zCz0nM9XuyCr0eFVY1VBs2Q=; b=N+WJjK5y2ZeKhV6MAVsc4o4l1MpG3rpVfyDySfO8taEFMvDNx4f8nHlUmd0vo1fO6c hSxxZS1rvf6p1+8d5y3bWsxlfjSHKdsoryGX8vQERfxNaKKWJBg4ANrVtDOl37/RcqRK weUFmrOAUMuAbSPLI8DofzAK5cP9+TCsB/AmaKFwkRwLkHbLrnOt1cu0sKY3JYyFktnY ZndGgHZr2CxknqnWafvYEHAd0ulMne6pODf/44u9cniY6ypMt8jai4LzzCMq2MtJgsRu cpo19sDP5DDmktfGgGaz8Cdku6AkiddWI29yns5wVazXAddNUI2eCg4lpfTczyhZ4aIA EGnw== X-Gm-Message-State: AOAM5327cUbTazD8qwbtqbs6lz45vX3Zymb4MK+ajtHABhHkxS1IPicX arQ8UMEKdB/RXv18CZHGlBeXOefvkcx1kw== X-Google-Smtp-Source: ABdhPJyUU1CezH1iYPBmMHSsVlXE6SaFt+VsWaExyLoKybBZf89z891THvJ+VlR8pjK6pM3fITDtSA== X-Received: by 2002:a1c:3b89:: with SMTP id i131mr15368269wma.30.1596453534856; Mon, 03 Aug 2020 04:18:54 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 2/7] target/arm: Separate decode from handling of coproc insns Date: Mon, 3 Aug 2020 12:18:44 +0100 Message-Id: <20200803111849.13368-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200803111849.13368-1-peter.maydell@linaro.org> References: <20200803111849.13368-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" As a prelude to making coproc insns use decodetree, split out the part of disas_coproc_insn() which does instruction decoding from the part which does the actual work, and make do_coproc_insn() handle the UNDEF-on-bad-permissions and similar cases itself rather than returning 1 to eventually percolate up to a callsite that calls unallocated_encoding() for it. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/translate.c | 76 ++++++++++++++++++++++++------------------ 1 file changed, 44 insertions(+), 32 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index a2765fc60b2..cfdcf5281d3 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4544,34 +4544,12 @@ void gen_gvec_uaba(unsigned vece, uint32_t rd_ofs, = uint32_t rn_ofs, tcg_gen_gvec_3(rd_ofs, rn_ofs, rm_ofs, opr_sz, max_sz, &ops[vece]); } =20 -static int disas_coproc_insn(DisasContext *s, uint32_t insn) +static void do_coproc_insn(DisasContext *s, int cpnum, int is64, + int opc1, int crn, int crm, int opc2, + bool isread, int rt, int rt2) { - int cpnum, is64, crn, crm, opc1, opc2, isread, rt, rt2; const ARMCPRegInfo *ri; =20 - cpnum =3D (insn >> 8) & 0xf; - - is64 =3D (insn & (1 << 25)) =3D=3D 0; - if (!is64 && ((insn & (1 << 4)) =3D=3D 0)) { - /* cdp */ - return 1; - } - - crm =3D insn & 0xf; - if (is64) { - crn =3D 0; - opc1 =3D (insn >> 4) & 0xf; - opc2 =3D 0; - rt2 =3D (insn >> 16) & 0xf; - } else { - crn =3D (insn >> 16) & 0xf; - opc1 =3D (insn >> 21) & 7; - opc2 =3D (insn >> 5) & 7; - rt2 =3D 0; - } - isread =3D (insn >> 20) & 1; - rt =3D (insn >> 12) & 0xf; - ri =3D get_arm_cp_reginfo(s->cp_regs, ENCODE_CP_REG(cpnum, is64, s->ns, crn, crm, opc1, opc2)); if (ri) { @@ -4579,7 +4557,8 @@ static int disas_coproc_insn(DisasContext *s, uint32_= t insn) =20 /* Check access permissions */ if (!cp_access_ok(s->current_el, ri, isread)) { - return 1; + unallocated_encoding(s); + return; } =20 if (s->hstr_active || ri->accessfn || @@ -4653,14 +4632,15 @@ static int disas_coproc_insn(DisasContext *s, uint3= 2_t insn) /* Handle special cases first */ switch (ri->type & ~(ARM_CP_FLAG_MASK & ~ARM_CP_SPECIAL)) { case ARM_CP_NOP: - return 0; + return; case ARM_CP_WFI: if (isread) { - return 1; + unallocated_encoding(s); + return; } gen_set_pc_im(s, s->base.pc_next); s->base.is_jmp =3D DISAS_WFI; - return 0; + return; default: break; } @@ -4720,7 +4700,7 @@ static int disas_coproc_insn(DisasContext *s, uint32_= t insn) /* Write */ if (ri->type & ARM_CP_CONST) { /* If not forbidden by access permissions, treat as WI */ - return 0; + return; } =20 if (is64) { @@ -4786,7 +4766,7 @@ static int disas_coproc_insn(DisasContext *s, uint32_= t insn) gen_lookup_tb(s); } =20 - return 0; + return; } =20 /* Unknown register; this might be a guest error or a QEMU @@ -4806,7 +4786,39 @@ static int disas_coproc_insn(DisasContext *s, uint32= _t insn) s->ns ? "non-secure" : "secure"); } =20 - return 1; + unallocated_encoding(s); + return; +} + +static int disas_coproc_insn(DisasContext *s, uint32_t insn) +{ + int cpnum, is64, crn, crm, opc1, opc2, isread, rt, rt2; + + cpnum =3D (insn >> 8) & 0xf; + + is64 =3D (insn & (1 << 25)) =3D=3D 0; + if (!is64 && ((insn & (1 << 4)) =3D=3D 0)) { + /* cdp */ + return 1; + } + + crm =3D insn & 0xf; + if (is64) { + crn =3D 0; + opc1 =3D (insn >> 4) & 0xf; + opc2 =3D 0; + rt2 =3D (insn >> 16) & 0xf; + } else { + crn =3D (insn >> 16) & 0xf; + opc1 =3D (insn >> 21) & 7; + opc2 =3D (insn >> 5) & 7; + rt2 =3D 0; + } + isread =3D (insn >> 20) & 1; + rt =3D (insn >> 12) & 0xf; + + do_coproc_insn(s, cpnum, is64, opc1, crn, crm, opc2, isread, rt, rt2); + return 0; } =20 /* Decode XScale DSP or iWMMXt insn (in the copro space, cp=3D0 or 1) */ --=20 2.20.1 From nobody Sun May 5 21:10:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1596453660; cv=none; d=zohomail.com; s=zohoarc; b=QPa+UKeun04M07kj8lEABMwn9iXQp8eTRYkVJXOnDldhYPh1EXVQkZXYwcAMQCXFoiw3rXNH/+Cu7tXbLAtgs+fuInXRtb7HJHJ1dqI4OUWnuuHV3wYgL8MmcwpK/IrioLWZmn4mmo99MPC8TCqJsEzn+kX4mvFpHzHAY9cY6c0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1596453660; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=WVrz2TM2NyRna3FiFYVkgyDOwt7IGSm5Yz6r2adar/U=; b=WmaNuAxcxVGKQGu2MaDW4IrPWI3B6ON07RNTSeLlSVLXgt1uwTkI+sx3jk7A5e1PkBzE1MWK+fuD+UZ3qpgAXx3B5F3vyU/4MHQRV0zB2O6JVUNuWACYWAxJw1GjQw4XAxR+YE4muH3oeGJ33wTyVA3Dh0xS3FzeHHJUpM2wFTI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1596453660099737.0179561995998; Mon, 3 Aug 2020 04:21:00 -0700 (PDT) Received: from localhost ([::1]:50194 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k2YWY-0006j3-U1 for importer@patchew.org; Mon, 03 Aug 2020 07:20:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45950) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k2YUe-0003le-S3 for qemu-devel@nongnu.org; Mon, 03 Aug 2020 07:19:00 -0400 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:37440) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1k2YUc-0004sa-OY for qemu-devel@nongnu.org; Mon, 03 Aug 2020 07:19:00 -0400 Received: by mail-wr1-x441.google.com with SMTP id y3so33834971wrl.4 for ; Mon, 03 Aug 2020 04:18:58 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm28013170wrb.59.2020.08.03.04.18.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2020 04:18:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=WVrz2TM2NyRna3FiFYVkgyDOwt7IGSm5Yz6r2adar/U=; b=NvSGWSoBLJetqXNdwYo96/W38omvRb+umlpFKea4Mp6gwqduZxaTAxgQvXk7ZhXK9U bbNYVcuiPD3XCz0ZJ7DGXWet3IYrMJnsnSW6Srxu7kSgL/zC90cve0SAVW4Z7vTRQZqJ JEknAhLVKjf2l+vOATB8toQOVRaZzyxprj5QwNMaE1OYFxCiHtBwKQTJssRAzqF/XbFZ MfX0FNESJUTgv9suf2P8vkR/SJImfVDW4ZLvBa1xHirRQlQFWvP+Rkwr58JwXSs2IPNW KZlDJQcryEr/5dKwjSro75pvLRzwZzIITAHw3oxsC/3ysX3slVcZlqjObo+EhpRNbV4M ZvvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WVrz2TM2NyRna3FiFYVkgyDOwt7IGSm5Yz6r2adar/U=; b=SrTD4cylv53K2gb3V/jaGeyC50yJu4lHhoKFxtCPHjlM7mfYAOnZOrg0K0AZXqJUhu kMPCoNr7oibJ1ecIraYW3QPxRZEpMmcWIuq5l1dYHNBt8K0Goa9ZqOm6ATXknvj64bYa qeVfm7rOtMzX+RT+3bpzBKMPq+Y7KuC2sYxL1nZJOsfBbRHrikeeQboHbhhJsw0cUd/u kLjn3FtoG1X7izB5QWdvjAN9Y2WS5wFqSjtPrFZT+0Ggb4qD5bsIw1L/SyI+JyfaJD1t tDBN7CFcKVNP3Ej8sa5Fd3xPABJB6jxu7jvjvjddU9Pjesfpp0Q0TpxTLCHi3ZIJVzOA vQKA== X-Gm-Message-State: AOAM531UTs/ohvZPDCUCg38p0lPgBIfZPRxlukpFZv/nHJrLSkreeu2n TVHE+/5QMX3mYvsdxXplaJfolw== X-Google-Smtp-Source: ABdhPJwy9ahWnfcRK20qOxI9Hy8UeCsMdrRSKe9Sd0klGsR4ZCJOt3VkY/r9+6TsMDIGIkRcqSvhcQ== X-Received: by 2002:a5d:60c5:: with SMTP id x5mr15026360wrt.67.1596453536941; Mon, 03 Aug 2020 04:18:56 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 3/7] target/arm: Convert A32 coprocessor insns to decodetree Date: Mon, 3 Aug 2020 12:18:45 +0100 Message-Id: <20200803111849.13368-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200803111849.13368-1-peter.maydell@linaro.org> References: <20200803111849.13368-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the A32 coprocessor instructions to decodetree. Note that this corrects an underdecoding: for the 64-bit access case (MRRC/MCRR) we did not check that bits [24:21] were 0b0010, so we would incorrectly treat LDC/STC as MRRC/MCRR rather than UNDEFing them. The decodetree versions of these insns assume the coprocessor is in the range 0..7 or 14..15. This is architecturally sensible (as per the comments) and OK in practice for QEMU because the only uses of the ARMCPRegInfo infrastructure we have that aren't for coprocessors 14 or 15 are the pxa2xx use of coprocessor 6. We add an assertion to the define_one_arm_cp_reg_with_opaque() function to catch any accidental future attempts to use it to define coprocessor registers for invalid coprocessors. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/a32.decode | 19 +++++++++++ target/arm/helper.c | 29 +++++++++++++++++ target/arm/translate.c | 74 +++++++++++++++++++++++++++++++++++------- 3 files changed, 111 insertions(+), 11 deletions(-) diff --git a/target/arm/a32.decode b/target/arm/a32.decode index 0bd952c0692..4dfd9139bf3 100644 --- a/target/arm/a32.decode +++ b/target/arm/a32.decode @@ -47,6 +47,8 @@ &bfi rd rn lsb msb &sat rd rn satimm imm sh &pkh rd rn rm imm tb +&mcr cp opc1 crn crm opc2 rt +&mcrr cp opc1 crm rt rt2 =20 # Data-processing (register) =20 @@ -529,6 +531,23 @@ LDM_a32 ---- 100 b:1 i:1 u:1 w:1 1 rn:4 list:= 16 &ldst_block B .... 1010 ........................ @branch BL .... 1011 ........................ @branch =20 +# Coprocessor instructions + +# We decode MCR, MCR, MRRC and MCRR only, because for QEMU the +# other coprocessor instructions always UNDEF. +# The trans_ functions for these will ignore cp values 8..13 for v7 or +# earlier, and 0..13 for v8 and later, because those areas of the +# encoding space may be used for other things, such as VFP or Neon. + +@mcr ---- .... opc1:3 . crn:4 rt:4 cp:4 opc2:3 . crm:4 &mcr +@mcrr ---- .... .... rt2:4 rt:4 cp:4 opc1:4 crm:4 &mcrr + +MCRR .... 1100 0100 .... .... .... .... .... @mcrr +MRRC .... 1100 0101 .... .... .... .... .... @mcrr + +MCR .... 1110 ... 0 .... .... .... ... 1 .... @mcr +MRC .... 1110 ... 1 .... .... .... ... 1 .... @mcr + # Supervisor call =20 SVC ---- 1111 imm:24 &i diff --git a/target/arm/helper.c b/target/arm/helper.c index 8ef0fb478f4..b0acc90e075 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8462,6 +8462,35 @@ void define_one_arm_cp_reg_with_opaque(ARMCPU *cpu, assert((r->state !=3D ARM_CP_STATE_AA32) || (r->opc0 =3D=3D 0)); /* AArch64 regs are all 64 bit so ARM_CP_64BIT is meaningless */ assert((r->state !=3D ARM_CP_STATE_AA64) || !(r->type & ARM_CP_64BIT)); + /* + * This API is only for Arm's system coprocessors (14 and 15) or + * (M-profile or v7A-and-earlier only) for implementation defined + * coprocessors in the range 0..7. Our decode assumes this, since + * 8..13 can be used for other insns including VFP and Neon. See + * valid_cp() in translate.c. Assert here that we haven't tried + * to use an invalid coprocessor number. + */ + switch (r->state) { + case ARM_CP_STATE_BOTH: + /* 0 has a special meaning, but otherwise the same rules as AA32. = */ + if (r->cp =3D=3D 0) { + break; + } + /* fall through */ + case ARM_CP_STATE_AA32: + if (arm_feature(&cpu->env, ARM_FEATURE_V8) && + !arm_feature(&cpu->env, ARM_FEATURE_M)) { + assert(r->cp >=3D 14 && r->cp <=3D 15); + } else { + assert(r->cp < 8 || (r->cp >=3D 14 && r->cp <=3D 15)); + } + break; + case ARM_CP_STATE_AA64: + assert(r->cp =3D=3D 0 || r->cp =3D=3D CP_REG_ARM64_SYSREG_CP); + break; + default: + g_assert_not_reached(); + } /* The AArch64 pseudocode CheckSystemAccess() specifies that op1 * encodes a minimum access level for the register. We roll this * runtime check into our general permission check code, so check diff --git a/target/arm/translate.c b/target/arm/translate.c index cfdcf5281d3..b1be4cb9d60 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5237,6 +5237,68 @@ static int t16_pop_list(DisasContext *s, int x) #include "decode-t32.inc.c" #include "decode-t16.inc.c" =20 +static bool valid_cp(DisasContext *s, int cp) +{ + /* + * Return true if this coprocessor field indicates something + * that's really a possible coprocessor. + * For v7 and earlier, coprocessors 8..15 were reserved for Arm use, + * and of those only cp14 and cp15 were used for registers. + * cp10 and cp11 were used for VFP and Neon, whose decode is + * dealt with elsewhere. With the advent of fp16, cp9 is also + * now part of VFP. + * For v8A and later, the encoding has been tightened so that + * only cp14 and cp15 are valid, and other values aren't considered + * to be in the coprocessor-instruction space at all. v8M still + * permits coprocessors 0..7. + */ + if (arm_dc_feature(s, ARM_FEATURE_V8) && + !arm_dc_feature(s, ARM_FEATURE_M)) { + return cp >=3D 14; + } + return cp < 8 || cp >=3D 14; +} + +static bool trans_MCR(DisasContext *s, arg_MCR *a) +{ + if (!valid_cp(s, a->cp)) { + return false; + } + do_coproc_insn(s, a->cp, false, a->opc1, a->crn, a->crm, a->opc2, + false, a->rt, 0); + return true; +} + +static bool trans_MRC(DisasContext *s, arg_MRC *a) +{ + if (!valid_cp(s, a->cp)) { + return false; + } + do_coproc_insn(s, a->cp, false, a->opc1, a->crn, a->crm, a->opc2, + true, a->rt, 0); + return true; +} + +static bool trans_MCRR(DisasContext *s, arg_MCRR *a) +{ + if (!valid_cp(s, a->cp)) { + return false; + } + do_coproc_insn(s, a->cp, true, a->opc1, 0, a->crm, 0, + false, a->rt, a->rt2); + return true; +} + +static bool trans_MRRC(DisasContext *s, arg_MRRC *a) +{ + if (!valid_cp(s, a->cp)) { + return false; + } + do_coproc_insn(s, a->cp, true, a->opc1, 0, a->crm, 0, + true, a->rt, a->rt2); + return true; +} + /* Helpers to swap operands for reverse-subtract. */ static void gen_rsb(TCGv_i32 dst, TCGv_i32 a, TCGv_i32 b) { @@ -8293,17 +8355,7 @@ static void disas_arm_insn(DisasContext *s, unsigned= int insn) disas_xscale_insn(s, insn); break; } - - if ((cpnum & 0xe) =3D=3D 10) { - /* VFP, but failed disas_vfp. */ - goto illegal_op; - } - - if (disas_coproc_insn(s, insn)) { - /* Coprocessor. */ - goto illegal_op; - } - break; + /* fall through */ } default: illegal_op: --=20 2.20.1 From nobody Sun May 5 21:10:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1596453599; cv=none; d=zohomail.com; s=zohoarc; b=JmvZvK00Ajzu6b5NvzHmvxllxdGfYI2X/ndWxAN6823M1YC2o5BkrxxSD0LxFTCTCl3sQwYtUJsZTm9s81ViTchzyxqmGjUvIbnv97PDLrRw9AMA0re/f/Sv4feujA0evF77xcPq/vc6BAG3MbIbagVvfssne1Ji62B0ncO6ZUQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1596453599; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=BExTigTa/EjWPG8Q5yXKlYgwozNoOz78Qwl9+pJrCfg=; b=UNtN4CKXQpcIqBE6ybmlo57aGVF+JnYshU7M0GW9at1+tcOuPZX69nKtmo5eaCis8UdREayt0AtM6RUew41p8i1GsKR4uVizXTaj/2MTYno5BUQH6+Dy7X6sxsKvr8H6NeM5cjXafunW0DOklXr4IEJY0byo7irjuHFDp8pd97w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 159645359978128.845866714399108; Mon, 3 Aug 2020 04:19:59 -0700 (PDT) Received: from localhost ([::1]:46212 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k2YVa-00053v-C1 for importer@patchew.org; Mon, 03 Aug 2020 07:19:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45962) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k2YUf-0003nx-LE for qemu-devel@nongnu.org; Mon, 03 Aug 2020 07:19:01 -0400 Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]:51451) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1k2YUe-0004sy-2B for qemu-devel@nongnu.org; Mon, 03 Aug 2020 07:19:01 -0400 Received: by mail-wm1-x341.google.com with SMTP id p14so14003603wmg.1 for ; Mon, 03 Aug 2020 04:18:59 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm28013170wrb.59.2020.08.03.04.18.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2020 04:18:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=BExTigTa/EjWPG8Q5yXKlYgwozNoOz78Qwl9+pJrCfg=; b=WBoyAtyOTh/OT8aDzwHkqSda7j0uFDgeCKhjxgTtlEpeZbxvLUsbLS4ctTHI5gwWTo NGuaQuFy5gowm1C0EtkhExKsGL2Hi0eAzkuJSMmr9coYxFZVxi5Kuk3HS3YUCUZtslBu zQZG/3G3myQeIsQygzVq/ShQNIIwBLBwF65Qwqk60lGGOEYkxXS8TTn0LJChDvdD/vSE /rr7N9a6L+maAxcG0qhvy49eVoGcKpS2pbNAI/mBpCOmQ1LzZ3q2uu5bdbdSB3v8icgl i2VnmzgUOtLK6Slh8beJSr7JRgIlHnnt6MKJNvwmXen1ujv6c29hdL/Z0/JRDCBSfz6d nRrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BExTigTa/EjWPG8Q5yXKlYgwozNoOz78Qwl9+pJrCfg=; b=Kjb9TUgOJV69AH8UtjX9qNi4UFEmm8jtxjenWe8j0gkVAmRmLzUpat2MhEZyRaQhuM tWmhzS2fgDvhHKXBc2P1yP6lDZwotIMWdik+x/0hgGugf/AUeZAy35pVPFN2yAJzCKa+ YLNRnwyuYQTFOFSXo7TPVfWwJrrtba/Qn/E5HXdoVKsa5v/ULJnF6LrDCVkAINjfPuVF j4YMI/SrYSGZAYqb9UI+YGSuoKdKAZ2X/5gmVfWo5IxdcwjUuJnU9WGZYOrL7vhxf8Wt wa/Mk4DeiZgi1AjAuNqFjz3j92AHmGZi5e7uWwuYFX47NwfliSnLaa7AFFktZyfFjAOv p5JQ== X-Gm-Message-State: AOAM530Ncl1RRBXYfuNKMi07zGoW2CM09E3beDdqWBRcLmE9kyxcsoJ1 C5f8kL9xN1y47hnBPq9pnRMrZg== X-Google-Smtp-Source: ABdhPJwdzKRJrT6EXHah4M3p7pqZcuPOohzaHAlMoNEJmmbypDU7/OXg4O9NorJw/HU5WYnEwMaz5g== X-Received: by 2002:a1c:720e:: with SMTP id n14mr4470024wmc.152.1596453538475; Mon, 03 Aug 2020 04:18:58 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 4/7] target/arm: Tidy up disas_arm_insn() Date: Mon, 3 Aug 2020 12:18:46 +0100 Message-Id: <20200803111849.13368-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200803111849.13368-1-peter.maydell@linaro.org> References: <20200803111849.13368-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::341; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x341.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" The only thing left in the "legacy decoder" is the handling of disas_xscale_insn(), and we can simplify the code. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/translate.c | 26 +++++++++----------------- 1 file changed, 9 insertions(+), 17 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index b1be4cb9d60..639fe121a2e 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -8342,26 +8342,18 @@ static void disas_arm_insn(DisasContext *s, unsigne= d int insn) return; } /* fall back to legacy decoder */ - - switch ((insn >> 24) & 0xf) { - case 0xc: - case 0xd: - case 0xe: - { - /* First check for coprocessor space used for XScale/iwMMXt insns = */ - int cpnum =3D (insn >> 8) & 0xf; - - if (arm_dc_feature(s, ARM_FEATURE_XSCALE) && (cpnum < 2)) { + /* TODO: convert xscale/iwmmxt decoder to decodetree ?? */ + if (arm_dc_feature(s, ARM_FEATURE_XSCALE)) { + if (((insn & 0x0c000e00) =3D=3D 0x0c000000) + && ((insn & 0x03000000) !=3D 0x03000000)) { + /* Coprocessor insn, coprocessor 0 or 1 */ disas_xscale_insn(s, insn); - break; + return; } - /* fall through */ - } - default: - illegal_op: - unallocated_encoding(s); - break; } + +illegal_op: + unallocated_encoding(s); } =20 static bool thumb_insn_is_16bit(DisasContext *s, uint32_t pc, uint32_t ins= n) --=20 2.20.1 From nobody Sun May 5 21:10:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1596453677; cv=none; d=zohomail.com; s=zohoarc; b=PMNoMk9i1YOUXaNbNsJba3sL2C2RCyD17fYFBJXbvS2NtOj9p2UBnLoU/bG6gAzblBCcXWCkTVJU72wjkA3wx4uhqPzFsDwmxZPTWnXkw45udB7UQItJ0ZMn523Xp6NQEwQQBXE4nQ8YY4oXlV4gsaJp2mdKw3JeGJUYNL6Fsnc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1596453677; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Jk9fS55Yi0cM18IUj1sLUkIZI7PH5doTh14I0Z0+qSY=; b=iV8hvg8DAVbrjyv/GwZA87Lt/e+QpXoP4q4cYhBGbXaE/axdHJY0GYIHZkgBgy56aIQVokhDpisHY+tNTEZJNeNXI42zXCi02i/6h6VkRXqJMz3QxzvzBx3Li/XryzlD4eNpr8yud2odxHiG6UwRS5VengggogANZPTZ4w7L38k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 159645367729553.616749283249646; Mon, 3 Aug 2020 04:21:17 -0700 (PDT) Received: from localhost ([::1]:51236 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k2YWp-00078I-PR for importer@patchew.org; Mon, 03 Aug 2020 07:21:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46012) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k2YUi-0003uU-4s for qemu-devel@nongnu.org; Mon, 03 Aug 2020 07:19:04 -0400 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]:39676) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1k2YUf-0004tG-NG for qemu-devel@nongnu.org; Mon, 03 Aug 2020 07:19:03 -0400 Received: by mail-wr1-x435.google.com with SMTP id a5so23863808wrm.6 for ; Mon, 03 Aug 2020 04:19:01 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm28013170wrb.59.2020.08.03.04.18.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2020 04:18:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=Jk9fS55Yi0cM18IUj1sLUkIZI7PH5doTh14I0Z0+qSY=; b=FdReBHCRxRGw8EVp65mXUCYrSLHaqPIjGXqhfmj7y5tGe35uSPz7fTJME8CnkypRkp YXPBizA9JJ5u3U1h6h6xU4IViNAkv0GcpeMjWMUomNAV5946azN3tTws9VnudXTP23zK lkpJIpI+ANmei935KcOjjy2GknuxCNM2PmI29ApbANm8mm85ktqaiub98yGljHm8XuX+ 4i39H5MQlUvC8SWI95eohXafQ8xmsD0CCZ1GtwTg/eubhWSkU1ntGVSz8jQwbYRb2Mhc go8nzNOwuR5Z45VO8hDv7kFOSO/vsNzztlCRvPh0UY6IWgNWffbDgItAPKcCpdUW6JmG /2UQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Jk9fS55Yi0cM18IUj1sLUkIZI7PH5doTh14I0Z0+qSY=; b=Gp/pcnNatBtdRHfSGGtPiOor6qa0gqaRXJ6D+xQFOgejy2xPqbpx5YAU3SvbzY4M9T DVf1o2Utd74vZLCc5oOUoLrmZvtJ5hFMYiimoywBlo6pgMndNo8AiijCwLpt/qlrqfWt enE6p1qiXbV9TlU91n7nC3u68vKSfeRCUq2tKi5OCIcHcLjJNnMU8IM0sSxjRxnfBO6H 33mrlfkei6nJJJZAR6BQk4GG4AEh8WhrB/0h9XW1MIJD6MI9QV/hDf5io65CgnkQsVbi Pq5JEQRqKmeS7b++w2H1vck65hwqOM6sfgZtFuV6B+mNPojHez8kN50qJGDiWGYYuHA8 8BNA== X-Gm-Message-State: AOAM5301O/ganUT8jeAUWv27hdUE0Kx+ELMoiDUGdNDUWmVg7FYYSR8I JBc2vDoNJMI9yUNayEs+YOgtvFgvLwWosQ== X-Google-Smtp-Source: ABdhPJwztkgMf9tWnhYV+nV8DvEgL6YeYPO5SRwx5q8z0Q0t+4OByU8d/6v3Q7wvGEIn5rORn7fY4Q== X-Received: by 2002:adf:dd01:: with SMTP id a1mr15902499wrm.301.1596453539893; Mon, 03 Aug 2020 04:18:59 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 5/7] target/arm: Do M-profile NOCP checks early and via decodetree Date: Mon, 3 Aug 2020 12:18:47 +0100 Message-Id: <20200803111849.13368-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200803111849.13368-1-peter.maydell@linaro.org> References: <20200803111849.13368-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" For M-profile CPUs, the architecture specifies that the NOCP exception when a coprocessor is not present or disabled should cover the entire wide range of coprocessor-space encodings, and should take precedence over UNDEF exceptions. (This is the opposite of A-profile, where checking for a disabled FPU has to happen last.) Implement this with decodetree patterns that cover the specified ranges of the encoding space. There are a few instructions (VLLDM, VLSTM, and in v8.1 also VSCCLRM) which are in copro-space but must not be NOCP'd: these must be handled also in the new m-nocp.decode so they take precedence. This is a minor behaviour change: for unallocated insn patterns in the VFP area (cp=3D10,11) we will now NOCP rather than UNDEF when the FPU is disabled. As well as giving us the correct architectural behaviour for v8.1M and the recommended behaviour for v8.0M, this refactoring also removes the old NOCP handling from the remains of the 'legacy decoder' in disas_thumb2_insn(), paving the way for cleaning that up. Since we don't currently have a v8.1M feature bit or any v8.1M CPUs, the minor changes to this logic that we'll need for v8.1M are marked up with TODO comments. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/m-nocp.decode | 42 +++++++++++++++++++++++++++ target/arm/vfp.decode | 2 -- target/arm/translate-vfp.inc.c | 52 +++++++++++++++++++++++++++------- target/arm/translate.c | 30 ++++++++++---------- target/arm/Makefile.objs | 6 ++++ 5 files changed, 105 insertions(+), 27 deletions(-) create mode 100644 target/arm/m-nocp.decode diff --git a/target/arm/m-nocp.decode b/target/arm/m-nocp.decode new file mode 100644 index 00000000000..7182d7d1217 --- /dev/null +++ b/target/arm/m-nocp.decode @@ -0,0 +1,42 @@ +# M-profile UserFault.NOCP exception handling +# +# Copyright (c) 2020 Linaro, Ltd +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, see . + +# +# This file is processed by scripts/decodetree.py +# +# For M-profile, the architecture specifies that NOCP UsageFaults +# should take precedence over UNDEF faults over the whole wide +# range of coprocessor-space encodings, with the exception of +# VLLDM and VLSTM. (Compare v8.1M IsCPInstruction() pseudocode and +# v8M Arm ARM rule R_QLGM.) This isn't mandatory for v8.0M but we choose +# to behave the same as v8.1M. +# This decode is handled before any others (and in particular before +# decoding FP instructions which are in the coprocessor space). +# If the coprocessor is not present or disabled then we will generate +# the NOCP exception; otherwise we let the insn through to the main decode. + +{ + # Special cases which do not take an early NOCP: VLLDM and VLSTM + VLLDM_VLSTM 1110 1100 001 l:1 rn:4 0000 1010 0000 0000 + # TODO: VSCCLRM (new in v8.1M) is similar: + #VSCCLRM 1110 1100 1-01 1111 ---- 1011 ---- ---0 + + NOCP 111- 1110 ---- ---- ---- cp:4 ---- ---- + NOCP 111- 110- ---- ---- ---- cp:4 ---- ---- + # TODO: From v8.1M onwards we will also want this range to NOCP + #NOCP_8_1 111- 1111 ---- ---- ---- ---- ---- ---- cp=3D10 +} diff --git a/target/arm/vfp.decode b/target/arm/vfp.decode index 5fd70f975ae..2c793e3e87f 100644 --- a/target/arm/vfp.decode +++ b/target/arm/vfp.decode @@ -213,5 +213,3 @@ VCVT_sp_int ---- 1110 1.11 110 s:1 .... 1010 rz:1 1.0 = .... \ vd=3D%vd_sp vm=3D%vm_sp VCVT_dp_int ---- 1110 1.11 110 s:1 .... 1011 rz:1 1.0 .... \ vd=3D%vd_sp vm=3D%vm_dp - -VLLDM_VLSTM 1110 1100 001 l:1 rn:4 0000 1010 0000 0000 diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c index afa8a5f8885..463253de90b 100644 --- a/target/arm/translate-vfp.inc.c +++ b/target/arm/translate-vfp.inc.c @@ -95,14 +95,11 @@ static inline long vfp_f16_offset(unsigned reg, bool to= p) static bool full_vfp_access_check(DisasContext *s, bool ignore_vfp_enabled) { if (s->fp_excp_el) { - if (arm_dc_feature(s, ARM_FEATURE_M)) { - gen_exception_insn(s, s->pc_curr, EXCP_NOCP, syn_uncategorized= (), - s->fp_excp_el); - } else { - gen_exception_insn(s, s->pc_curr, EXCP_UDEF, - syn_fp_access_trap(1, 0xe, false), - s->fp_excp_el); - } + /* M-profile handled this earlier, in disas_m_profile_nocp() */ + assert (!arm_dc_feature(s, ARM_FEATURE_M)); + gen_exception_insn(s, s->pc_curr, EXCP_UDEF, + syn_fp_access_trap(1, 0xe, false), + s->fp_excp_el); return false; } =20 @@ -2842,9 +2839,14 @@ static bool trans_VLLDM_VLSTM(DisasContext *s, arg_V= LLDM_VLSTM *a) !arm_dc_feature(s, ARM_FEATURE_V8)) { return false; } - /* If not secure, UNDEF. */ + /* + * If not secure, UNDEF. We must emit code for this + * rather than returning false so that this takes + * precedence over the m-nocp.decode NOCP fallback. + */ if (!s->v8m_secure) { - return false; + unallocated_encoding(s); + return true; } /* If no fpu, NOP. */ if (!dc_isar_feature(aa32_vfp, s)) { @@ -2863,3 +2865,33 @@ static bool trans_VLLDM_VLSTM(DisasContext *s, arg_V= LLDM_VLSTM *a) s->base.is_jmp =3D DISAS_UPDATE_EXIT; return true; } + +static bool trans_NOCP(DisasContext *s, arg_NOCP *a) +{ + /* + * Handle M-profile early check for disabled coprocessor: + * all we need to do here is emit the NOCP exception if + * the coprocessor is disabled. Otherwise we return false + * and the real VFP/etc decode will handle the insn. + */ + assert(arm_dc_feature(s, ARM_FEATURE_M)); + + if (a->cp =3D=3D 11) { + a->cp =3D 10; + } + /* TODO: in v8.1M cp 8, 9, 14, 15 also are governed by the cp10 enable= */ + + if (a->cp !=3D 10) { + gen_exception_insn(s, s->pc_curr, EXCP_NOCP, + syn_uncategorized(), default_exception_el(s)); + return true; + } + + if (s->fp_excp_el !=3D 0) { + gen_exception_insn(s, s->pc_curr, EXCP_NOCP, + syn_uncategorized(), s->fp_excp_el); + return true; + } + + return false; +} diff --git a/target/arm/translate.c b/target/arm/translate.c index 639fe121a2e..adcd2127290 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -1176,6 +1176,7 @@ static TCGv_ptr vfp_reg_ptr(bool dp, int reg) #define ARM_CP_RW_BIT (1 << 20) =20 /* Include the VFP and Neon decoders */ +#include "decode-m-nocp.inc.c" #include "translate-vfp.inc.c" #include "translate-neon.inc.c" =20 @@ -8433,6 +8434,19 @@ static void disas_thumb2_insn(DisasContext *s, uint3= 2_t insn) ARCH(6T2); } =20 + if (arm_dc_feature(s, ARM_FEATURE_M)) { + /* + * NOCP takes precedence over any UNDEF for (almost) the + * entire wide range of coprocessor-space encodings, so check + * for it first before proceeding to actually decode eg VFP + * insns. This decode also handles the few insns which are + * in copro space but do not have NOCP checks (eg VLLDM, VLSTM). + */ + if (disas_m_nocp(s, insn)) { + return; + } + } + if ((insn & 0xef000000) =3D=3D 0xef000000) { /* * T32 encodings 0b111p_1111_qqqq_qqqq_qqqq_qqqq_qqqq_qqqq @@ -8481,21 +8495,7 @@ static void disas_thumb2_insn(DisasContext *s, uint3= 2_t insn) /* Coprocessor. */ if (arm_dc_feature(s, ARM_FEATURE_M)) { /* 0b111x_11xx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx */ - if (extract32(insn, 24, 2) =3D=3D 3) { - goto illegal_op; /* op0 =3D 0b11 : unallocated */ - } - - if (((insn >> 8) & 0xe) =3D=3D 10 && - dc_isar_feature(aa32_fpsp_v2, s)) { - /* FP, and the CPU supports it */ - goto illegal_op; - } else { - /* All other insns: NOCP */ - gen_exception_insn(s, s->pc_curr, EXCP_NOCP, - syn_uncategorized(), - default_exception_el(s)); - } - break; + goto illegal_op; } if (((insn >> 24) & 3) =3D=3D 3) { /* Neon DP, but failed disas_neon_dp() */ diff --git a/target/arm/Makefile.objs b/target/arm/Makefile.objs index fa39fd7c831..7abb12868ae 100644 --- a/target/arm/Makefile.objs +++ b/target/arm/Makefile.objs @@ -43,6 +43,11 @@ target/arm/decode-vfp-uncond.inc.c: $(SRC_PATH)/target/a= rm/vfp-uncond.decode $(D $(PYTHON) $(DECODETREE) --static-decode disas_vfp_uncond -o $@ $<,\ "GEN", $(TARGET_DIR)$@) =20 +target/arm/decode-m-nocp.inc.c: $(SRC_PATH)/target/arm/m-nocp.decode $(DEC= ODETREE) + $(call quiet-command,\ + $(PYTHON) $(DECODETREE) --static-decode disas_m_nocp -o $@ $<,\ + "GEN", $(TARGET_DIR)$@) + target/arm/decode-a32.inc.c: $(SRC_PATH)/target/arm/a32.decode $(DECODETRE= E) $(call quiet-command,\ $(PYTHON) $(DECODETREE) --static-decode disas_a32 -o $@ $<,\ @@ -69,6 +74,7 @@ target/arm/translate.o: target/arm/decode-neon-dp.inc.c target/arm/translate.o: target/arm/decode-neon-ls.inc.c target/arm/translate.o: target/arm/decode-vfp.inc.c target/arm/translate.o: target/arm/decode-vfp-uncond.inc.c +target/arm/translate.o: target/arm/decode-m-nocp.inc.c target/arm/translate.o: target/arm/decode-a32.inc.c target/arm/translate.o: target/arm/decode-a32-uncond.inc.c target/arm/translate.o: target/arm/decode-t32.inc.c --=20 2.20.1 From nobody Sun May 5 21:10:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1596454006; cv=none; d=zohomail.com; s=zohoarc; b=iAkb0RjXtKXH7qpL1A+2GFYV46lhRVvUGLuExm2WnwrrGaFo8xpTyRfAQR/U3G9udDZpGtD44C69euELPJERbtCXDBlhq+QXZbKF5TqEmCl5ce4MNkl33bc1UdEsJSR5tAfxBz9pLUhxarq2qHBXhsCZg5KiT5QAC4irUhNukeE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1596454006; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=uE/zSzU3YCUj+8keAlvLyFX2oijQycTIyZcK1gVRSqY=; b=WZF6/yP/O+CIfWe4h74tGNj0tj710MsSuVUilrZT9RnWsIGtGzDqw9EGo4ToM6k2I7tuzspRLNAEnlQLc0pdKzy0VFIBFcFckQLBhepPfbMoWweU68OzSqEZd+/axVzkCefCqUqJewWbd9zKB/TngotvJl5Zw5OC9dGPYYqnDFM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1596454006179888.6030552279741; Mon, 3 Aug 2020 04:26:46 -0700 (PDT) Received: from localhost ([::1]:38460 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k2Yc8-00059y-UA for importer@patchew.org; Mon, 03 Aug 2020 07:26:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46032) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k2YUi-0003vd-LN for qemu-devel@nongnu.org; Mon, 03 Aug 2020 07:19:04 -0400 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:51453) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1k2YUg-0004tZ-QE for qemu-devel@nongnu.org; Mon, 03 Aug 2020 07:19:04 -0400 Received: by mail-wm1-x343.google.com with SMTP id p14so14003709wmg.1 for ; Mon, 03 Aug 2020 04:19:02 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm28013170wrb.59.2020.08.03.04.19.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2020 04:19:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=uE/zSzU3YCUj+8keAlvLyFX2oijQycTIyZcK1gVRSqY=; b=yHOeXGR2+tLrevmmLAQBc1pTlblM93sXH20O1UjYNdxnWNyqGEP01d+ghis5QepkBJ nnsaAljk5M7pebS127QbwK0ye2ORk6Y0D5JwiRaf4IZ6KdaA6gAU2+Qm3E9HKh9nlw/i wuetfjcJzJhZlo2DDK0RixvsaxMayGV6+1uemSdZOE08frskmF73uIjGzBttcmtHSQDw t67uCqqtvWejovQsEEgxLeASwbPCIPJIOnQ7/7CsaS/PAdlx3Ih3Uz+HOmnDgkBrDn5K Okv9Ttn7R+eWS2tttQhAYUIezFzJ8Yv6wWT40sldWq13FRzu5zHPbZkVygAoz5VtUyFt FIVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uE/zSzU3YCUj+8keAlvLyFX2oijQycTIyZcK1gVRSqY=; b=V5Vqs5WAsSrJ9eYMpRQUplPCy0bwE8WczPHGf50V9EYZPH+Awe3pLBOMJo3XF+LqE/ 8CndRZOAX1evBY1VkNaqcWqGsPJViuGy43Gr4oVeEVjQe/WHHTgmQUR3tt5yFIo7AHNd CtBva+w766F2dlh/g/RpCUtEG1pJbRqYfcJSKz3g1vf3lKURIqTWYxaPtReULjnok1l+ QruVsROU5rqt0iWGVVwPwjIHvteBXA5z0uiAduKmr/EMSoqIX485DSmYM6Qkp1bP/tko 0Q2fRNrRYe7NdPCxZjh4UZtcO0xo6D55d/s/tF7ng6X6pkdlcVRE5WkGr/ucURi6Rzqj kEQQ== X-Gm-Message-State: AOAM530pZrrtbbrqMydtuDUs0qYMse/eAsbnG8rDOabKCav++b6db2im VLvVIWa+w26rtgND0huPjqyFSD3MbeMeMA== X-Google-Smtp-Source: ABdhPJwawNq9iOhdFOEY/zisDxsCZTbjPQ7zJOIeG8TGavX85l8wh0rGA3wcvo6NMUpskNGGIxexGg== X-Received: by 2002:a7b:c765:: with SMTP id x5mr14994384wmk.14.1596453541230; Mon, 03 Aug 2020 04:19:01 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 6/7] target/arm: Convert T32 coprocessor insns to decodetree Date: Mon, 3 Aug 2020 12:18:48 +0100 Message-Id: <20200803111849.13368-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200803111849.13368-1-peter.maydell@linaro.org> References: <20200803111849.13368-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::343; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x343.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Convert the T32 coprocessor instructions to decodetree. As with the A32 conversion, this corrects an underdecoding where we did not check that MRRC/MCRR [24:21] were 0b0010 and so treated some kinds of LDC/STC and MRRC/MCRR rather than UNDEFing them. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/t32.decode | 19 +++++++++++++ target/arm/translate.c | 64 ++---------------------------------------- 2 files changed, 21 insertions(+), 62 deletions(-) diff --git a/target/arm/t32.decode b/target/arm/t32.decode index c21a988f971..7069d821fde 100644 --- a/target/arm/t32.decode +++ b/target/arm/t32.decode @@ -45,6 +45,8 @@ &sat !extern rd rn satimm imm sh &pkh !extern rd rn rm imm tb &cps !extern mode imod M A I F +&mcr !extern cp opc1 crn crm opc2 rt +&mcrr !extern cp opc1 crm rt rt2 =20 # Data-processing (register) =20 @@ -621,6 +623,23 @@ RFE 1110 1001 10.1 .... 1100000000000000 = @rfe pu=3D1 SRS 1110 1000 00.0 1101 1100 0000 000. .... @srs pu=3D2 SRS 1110 1001 10.0 1101 1100 0000 000. .... @srs pu=3D1 =20 +# Coprocessor instructions + +# We decode MCR, MCR, MRRC and MCRR only, because for QEMU the +# other coprocessor instructions always UNDEF. +# The trans_ functions for these will ignore cp values 8..13 for v7 or +# earlier, and 0..13 for v8 and later, because those areas of the +# encoding space may be used for other things, such as VFP or Neon. + +@mcr .... .... opc1:3 . crn:4 rt:4 cp:4 opc2:3 . crm:4 +@mcrr .... .... .... rt2:4 rt:4 cp:4 opc1:4 crm:4 + +MCRR 1110 1100 0100 .... .... .... .... .... @mcrr +MRRC 1110 1100 0101 .... .... .... .... .... @mcrr + +MCR 1110 1110 ... 0 .... .... .... ... 1 .... @mcr +MRC 1110 1110 ... 1 .... .... .... ... 1 .... @mcr + # Branches =20 %imm24 26:s1 13:1 11:1 16:10 0:11 !function=3Dt32_branch24 diff --git a/target/arm/translate.c b/target/arm/translate.c index adcd2127290..59d6e43611a 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4791,37 +4791,6 @@ static void do_coproc_insn(DisasContext *s, int cpnu= m, int is64, return; } =20 -static int disas_coproc_insn(DisasContext *s, uint32_t insn) -{ - int cpnum, is64, crn, crm, opc1, opc2, isread, rt, rt2; - - cpnum =3D (insn >> 8) & 0xf; - - is64 =3D (insn & (1 << 25)) =3D=3D 0; - if (!is64 && ((insn & (1 << 4)) =3D=3D 0)) { - /* cdp */ - return 1; - } - - crm =3D insn & 0xf; - if (is64) { - crn =3D 0; - opc1 =3D (insn >> 4) & 0xf; - opc2 =3D 0; - rt2 =3D (insn >> 16) & 0xf; - } else { - crn =3D (insn >> 16) & 0xf; - opc1 =3D (insn >> 21) & 7; - opc2 =3D (insn >> 5) & 7; - rt2 =3D 0; - } - isread =3D (insn >> 20) & 1; - rt =3D (insn >> 12) & 0xf; - - do_coproc_insn(s, cpnum, is64, opc1, crn, crm, opc2, isread, rt, rt2); - return 0; -} - /* Decode XScale DSP or iWMMXt insn (in the copro space, cp=3D0 or 1) */ static void disas_xscale_insn(DisasContext *s, uint32_t insn) { @@ -8485,38 +8454,9 @@ static void disas_thumb2_insn(DisasContext *s, uint3= 2_t insn) ((insn >> 28) =3D=3D 0xe && disas_vfp(s, insn))) { return; } - /* fall back to legacy decoder */ =20 - switch ((insn >> 25) & 0xf) { - case 0: case 1: case 2: case 3: - /* 16-bit instructions. Should never happen. */ - abort(); - case 6: case 7: case 14: case 15: - /* Coprocessor. */ - if (arm_dc_feature(s, ARM_FEATURE_M)) { - /* 0b111x_11xx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx */ - goto illegal_op; - } - if (((insn >> 24) & 3) =3D=3D 3) { - /* Neon DP, but failed disas_neon_dp() */ - goto illegal_op; - } else if (((insn >> 8) & 0xe) =3D=3D 10) { - /* VFP, but failed disas_vfp. */ - goto illegal_op; - } else { - if (insn & (1 << 28)) - goto illegal_op; - if (disas_coproc_insn(s, insn)) { - goto illegal_op; - } - } - break; - case 12: - goto illegal_op; - default: - illegal_op: - unallocated_encoding(s); - } +illegal_op: + unallocated_encoding(s); } =20 static void disas_thumb_insn(DisasContext *s, uint32_t insn) --=20 2.20.1 From nobody Sun May 5 21:10:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1596453753; cv=none; d=zohomail.com; s=zohoarc; b=gkFyLv4s42hAQ2PLNspEoLynj4YGIrTJLpal+G9AhgP3aJZB6lw+QSBq4phk1393nHmXzI+nZKY2I8teWotylEmHSOTg26JQiYO0Qm/SQDff4FC6fREMNRV8mG8F6c44BBvC+VE6Qx7hl+i+wLYfv+Xfi/Vp9ssI1XXbkLVxIBM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1596453753; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=rAgcA7IrGXsmYiY0CiUqcWe2vzUpbrPD30xAx0l2H2U=; b=kiTgUroo1TgzrEb7NF52EcFTBlesB40fwRllMvkbAwwypLGIfAK0kCDSMeiqNpuOQOszFKrb2kEwwXcc1TqA3Oblp3sa2AV5g664WBacull+KZXAVUv9EHj4XdguoygEe4BEkObI72teMiobKt+YcfvW0q/HcFCtzi4NYnsuElg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1596453753299940.8044935556906; Mon, 3 Aug 2020 04:22:33 -0700 (PDT) Received: from localhost ([::1]:55558 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k2YY4-0000Rb-27 for importer@patchew.org; Mon, 03 Aug 2020 07:22:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46052) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k2YUj-0003yT-Rp for qemu-devel@nongnu.org; Mon, 03 Aug 2020 07:19:05 -0400 Received: from mail-wm1-x342.google.com ([2a00:1450:4864:20::342]:36063) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1k2YUi-0004tv-36 for qemu-devel@nongnu.org; Mon, 03 Aug 2020 07:19:05 -0400 Received: by mail-wm1-x342.google.com with SMTP id 3so15074186wmi.1 for ; Mon, 03 Aug 2020 04:19:03 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id g3sm28013170wrb.59.2020.08.03.04.19.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2020 04:19:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=rAgcA7IrGXsmYiY0CiUqcWe2vzUpbrPD30xAx0l2H2U=; b=JSIulD2qljKdNgpllREzYB2k/aKvmVbgV/Kpo50YetrD/MYDr9Q9dR/KLb99Zkotzq wvcTxnvypxdtXNP/M0mlJG2jeXwyhXg78f5+exeRaDxYMD9TfESVYRB10pkOrDzm4O+x y0VgVfkfpCXf8jAha0pr6oWkuPeHopGUObKoHPhj6gjUa0nN0EcfYrw+g7hV0EWr3p0W PL4wxsS/J7G6g9wS9OBDwlhJvCTy193FZk1vRVmMP+orCgRPxDSUIcEtJAG29AMKPixE pLJc087zuYnk1/X/qeeH3w16kyog6mCm0ZlTVhcHX2/b9tVwp0kLsIkXPadU9gSt5tCb y5Jw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rAgcA7IrGXsmYiY0CiUqcWe2vzUpbrPD30xAx0l2H2U=; b=BTBo4Xu0GffBBUYgpKsW9mo5ciJ3/AgXaG8C5L6hnH4NcPrvWe4f1VzXs1+pQwr7xD z+XBDnudu++SD3ntLTKrNe7s/uM9uVrbuRFpHOwYUERL5+Jj6LZkjj6MNeoj6LzhcmL6 3MFdgw/murjeoEo9mIKHZAHzd16uTxLwClVC6EgP653kw0mdvgsoAWY+Pms2cInTt0sp xQ+UcIi8YvKVsM5nKs3TpFZfX2ZZTm4c2FDwHGnIWqTxBuepUgSy1H/WXoW0m9EkTWWY kBPcPv1lT19tkWPa88khArGCLai8WMQWc04xFU/DmYFjxwC3KnDMjj0QtekI3lCWpsiX Iw7g== X-Gm-Message-State: AOAM530V6gndu06OuEWA7Km95Broi6cGbldFe5FjWkfmOQuLVTHhhUbz tw+Ip4SvMW/NIAcx0VL9H/n9Npnl9e90Cw== X-Google-Smtp-Source: ABdhPJziDo9auco+ziWBzXxAMhgs2Q1+3c9aSgFWWWqM3klSENNMdYjq3XJTtjT9SCZRxp/3zTI4vQ== X-Received: by 2002:a1c:bcd6:: with SMTP id m205mr14913867wmf.47.1596453542606; Mon, 03 Aug 2020 04:19:02 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 7/7] target/arm: Remove ARCH macro Date: Mon, 3 Aug 2020 12:18:49 +0100 Message-Id: <20200803111849.13368-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200803111849.13368-1-peter.maydell@linaro.org> References: <20200803111849.13368-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" The ARCH() macro was used a lot in the legacy decoder, but there are now just two uses of it left. Since a macro which expands out to a goto is liable to be confusing when reading code, replace the last two uses with a simple open-coded qeuivalent. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/translate.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index 59d6e43611a..37d4985d7e1 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -49,8 +49,6 @@ #define ENABLE_ARCH_7 arm_dc_feature(s, ARM_FEATURE_V7) #define ENABLE_ARCH_8 arm_dc_feature(s, ARM_FEATURE_V8) =20 -#define ARCH(x) do { if (!ENABLE_ARCH_##x) goto illegal_op; } while(0) - #include "translate.h" =20 #if defined(CONFIG_USER_ONLY) @@ -7909,7 +7907,7 @@ static bool trans_BLX_i(DisasContext *s, arg_BLX_i *a) { TCGv_i32 tmp; =20 - /* For A32, ARCH(5) is checked near the start of the uncond block. */ + /* For A32, ARM_FEATURE_V5 is checked near the start of the uncond blo= ck. */ if (s->thumb && (a->imm & 2)) { return false; } @@ -8275,7 +8273,10 @@ static void disas_arm_insn(DisasContext *s, unsigned= int insn) * choose to UNDEF. In ARMv5 and above the space is used * for miscellaneous unconditional instructions. */ - ARCH(5); + if (!arm_dc_feature(s, ARM_FEATURE_V5)) { + unallocated_encoding(s); + return; + } =20 /* Unconditional instructions. */ /* TODO: Perhaps merge these into one decodetree output file. */ @@ -8400,7 +8401,10 @@ static void disas_thumb2_insn(DisasContext *s, uint3= 2_t insn) goto illegal_op; } } else if ((insn & 0xf800e800) !=3D 0xf000e800) { - ARCH(6T2); + if (!arm_dc_feature(s, ARM_FEATURE_THUMB2)) { + unallocated_encoding(s); + return; + } } =20 if (arm_dc_feature(s, ARM_FEATURE_M)) { --=20 2.20.1