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[111.243.189.249]) by smtp.gmail.com with ESMTPSA id c27sm7578483pfj.163.2020.07.30.19.47.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Jul 2020 19:47:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ljC0k9nyCux4/IOLjqVvH/F3twmU2EHIoC2bl6uN10c=; b=K30rKbgiOW4mRczP6unsUGoMcDSnBWmH4vLHuG/mjARGNNCFTQdjWDKavyZYOuhZuJ POUEKwi/kNr7nktvYRSespgBbv+ylZZLG5zEiw8Bn7y0d3b0QT79Mz3S2dn3VKPAr+qr zWNscDE8qdAdJL9UhnHyKgaWymCHZlidAGgKgQgyt0zYA/YrxD536xvwWZX+2aUSVbSK pp8nSHjTT2L+T0MxqAOYVmKhNU2kwa30i2CZhkOjxG0zTU7UPrlhtzv0SOoQBDpH+xZp VIHOvP1S+DHkfGQ2Zm/Y34h6auGPornjwCgnXqKqr+1N7Ubbj5n7I0iOWcl7kWPohIz9 Bq/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ljC0k9nyCux4/IOLjqVvH/F3twmU2EHIoC2bl6uN10c=; b=VQS0T6NEKQqiLj/lz1dNiZj2zdzv6nBxJJbQrm9FfhylfZ3GHHDvVRK+wGiCkJ4A7m jtNALtoli52I2PvFHJqFwFWBUaMDbQWFhxti6blxIznpcmRsgrHvuOyGeNGV1wmTdusz boQZDRCkCxA3UfxinZ0OyF+JEVFDBBlL+A/HorAFfkBN0ci0Pz0vXI+l8awTJ9U6t+T1 hovnTli7J5+xqhJgg7nrLn5rCMr3DQp9iSxYokjyCoZq0CMnJOC0SO3ZNm1jgMMz+2Iv pr1rgKm28jeiOiAf2+8VJirJ10arnkaJRsz0YHN9F2Rpy/dZVKledvaxkQOsh6K/tlZ9 /2CA== X-Gm-Message-State: AOAM5326zO0pzt5TDzBlXC5LmWTQuP6v0a1+R+jsKG7FTPgMo7Qpm9Sx ecbp1EfJCTR6NFihzWsutMb+ew== X-Google-Smtp-Source: ABdhPJy+HMAzlqgOzJnITveWYAzyRFUwB8EdEGxJNoIDm+jnlJNVRJnb9S7PWKH8CvjBM4uFlPDoKQ== X-Received: by 2002:a17:90a:a68:: with SMTP id o95mr2003471pjo.148.1596163672131; Thu, 30 Jul 2020 19:47:52 -0700 (PDT) From: Green Wan To: Subject: [RFC PATCH v2 1/2] hw/riscv: sifive_u: Add file-backed OTP. Date: Fri, 31 Jul 2020 10:47:07 +0800 Message-Id: <20200731024708.32725-2-green.wan@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200731024708.32725-1-green.wan@sifive.com> References: <20200731024708.32725-1-green.wan@sifive.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=green.wan@sifive.com; helo=mail-pl1-x633.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Sagar Karandikar , Bastian Koppelmann , qemu-devel@nongnu.org, Green Wan , Alistair Francis , Palmer Dabbelt , bmeng.cn@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add a file-backed implementation for OTP of sifive_u machine. The machine property for file-backed is disabled in default. Do file open, mmap and close for every OTP read/write in case keep the update-to-date snapshot of OTP. Signed-off-by: Green Wan --- hw/riscv/sifive_u.c | 26 +++++++++++ hw/riscv/sifive_u_otp.c | 83 +++++++++++++++++++++++++++++++++ include/hw/riscv/sifive_u.h | 2 + include/hw/riscv/sifive_u_otp.h | 1 + 4 files changed, 112 insertions(+) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index e5682c38a9..c818496918 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -87,6 +87,7 @@ static const struct MemmapEntry { }; =20 #define OTP_SERIAL 1 +#define OTP_FILE "NULL" #define GEM_REVISION 0x10070109 =20 static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap, @@ -387,6 +388,8 @@ static void sifive_u_machine_init(MachineState *machine) object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_U_= SOC); object_property_set_uint(OBJECT(&s->soc), "serial", s->serial, &error_abort); + object_property_set_str(OBJECT(&s->soc), "otp-file", s->otp_file, + &error_abort); qdev_realize(DEVICE(&s->soc), NULL, &error_abort); =20 /* register RAM */ @@ -526,6 +529,21 @@ static void sifive_u_machine_set_uint32_prop(Object *o= bj, Visitor *v, visit_type_uint32(v, name, (uint32_t *)opaque, errp); } =20 +static void sifive_u_machine_get_str_prop(Object *obj, Visitor *v, + const char *name, void *opaqu= e, + Error **errp) +{ + visit_type_str(v, name, (char **)opaque, errp); +} + +static void sifive_u_machine_set_str_prop(Object *obj, Visitor *v, + const char *name, void *opaqu= e, + Error **errp) +{ + visit_type_str(v, name, (char **)opaque, errp); +} + + static void sifive_u_machine_instance_init(Object *obj) { SiFiveUState *s =3D RISCV_U_MACHINE(obj); @@ -551,6 +569,12 @@ static void sifive_u_machine_instance_init(Object *obj) sifive_u_machine_get_uint32_prop, sifive_u_machine_set_uint32_prop, NULL, &s->serial= ); object_property_set_description(obj, "serial", "Board serial number"); + + s->otp_file =3D (char *)OTP_FILE; + object_property_add(obj, "otp-file", "string", + sifive_u_machine_get_str_prop, + sifive_u_machine_set_str_prop, NULL, &s->otp_file); + object_property_set_description(obj, "otp-file", "file-backed otp file= "); } =20 static void sifive_u_machine_class_init(ObjectClass *oc, void *data) @@ -709,6 +733,7 @@ static void sifive_u_soc_realize(DeviceState *dev, Erro= r **errp) } =20 qdev_prop_set_uint32(DEVICE(&s->otp), "serial", s->serial); + qdev_prop_set_string(DEVICE(&s->otp), "otp-file", s->otp_file); if (!sysbus_realize(SYS_BUS_DEVICE(&s->otp), errp)) { return; } @@ -737,6 +762,7 @@ static void sifive_u_soc_realize(DeviceState *dev, Erro= r **errp) =20 static Property sifive_u_soc_props[] =3D { DEFINE_PROP_UINT32("serial", SiFiveUSoCState, serial, OTP_SERIAL), + DEFINE_PROP_STRING("otp-file", SiFiveUSoCState, otp_file), DEFINE_PROP_END_OF_LIST() }; =20 diff --git a/hw/riscv/sifive_u_otp.c b/hw/riscv/sifive_u_otp.c index f6ecbaa2ca..e359f30fdb 100644 --- a/hw/riscv/sifive_u_otp.c +++ b/hw/riscv/sifive_u_otp.c @@ -24,6 +24,62 @@ #include "qemu/log.h" #include "qemu/module.h" #include "hw/riscv/sifive_u_otp.h" +#include +#include +#include +#include +#include +#include +#include +#include + +#define TRACE_PREFIX "FU540_OTP: " +#define SIFIVE_FU540_OTP_SIZE (SIFIVE_U_OTP_NUM_FUSES * 4) + +static int32_t sifive_u_otp_backed_open(const char *filename, int32_t *fd, + uint32_t **map) +{ + /* open and mmap OTP image file */ + if (filename && strcmp(filename, "NULL") !=3D 0) { + *fd =3D open(filename, O_RDWR); + + if (*fd < 0) { + qemu_log_mask(LOG_TRACE, + TRACE_PREFIX "Warning: can't open otp file<%s>\n= ", + filename); + return -1; + } else { + + *map =3D (unsigned int *)mmap(0, + SIFIVE_FU540_OTP_SIZE, + PROT_READ | PROT_WRITE | PROT_EXE= C, + MAP_FILE | MAP_SHARED, + *fd, + 0); + + if (*map =3D=3D MAP_FAILED) { + qemu_log_mask(LOG_TRACE, + TRACE_PREFIX "Warning: can't mmap otp file<%= s>\n", + filename); + close(*fd); + return -2; + } + } + } else { + /* filename is 'NULL' */ + return -3; + } + + return 0; +} + +static int32_t sifive_u_otp_backed_close(int fd, unsigned int *map) +{ + munmap(map, SIFIVE_FU540_OTP_SIZE); + close(fd); + + return 0; +} =20 static uint64_t sifive_u_otp_read(void *opaque, hwaddr addr, unsigned int = size) { @@ -46,6 +102,20 @@ static uint64_t sifive_u_otp_read(void *opaque, hwaddr = addr, unsigned int size) if ((s->pce & SIFIVE_U_OTP_PCE_EN) && (s->pdstb & SIFIVE_U_OTP_PDSTB_EN) && (s->ptrim & SIFIVE_U_OTP_PTRIM_EN)) { + + int32_t fd; + uint32_t *map; + uint64_t val; + + /* open and mmap OTP image file */ + if (0 =3D=3D sifive_u_otp_backed_open(s->otp_file, &fd, &map))= { + val =3D (uint64_t)(map[s->pa]); + + /* close and unmmap */ + sifive_u_otp_backed_close(fd, map); + return val; + } + return s->fuse[s->pa & SIFIVE_U_OTP_PA_MASK]; } else { return 0xff; @@ -78,6 +148,8 @@ static void sifive_u_otp_write(void *opaque, hwaddr addr, { SiFiveUOTPState *s =3D opaque; uint32_t val32 =3D (uint32_t)val64; + int32_t fd; + uint32_t *map; =20 switch (addr) { case SIFIVE_U_OTP_PA: @@ -123,6 +195,16 @@ static void sifive_u_otp_write(void *opaque, hwaddr ad= dr, s->ptrim =3D val32; break; case SIFIVE_U_OTP_PWE: + /* open and mmap OTP image file */ + if (0 =3D=3D sifive_u_otp_backed_open(s->otp_file, &fd, &map)) { + /* store value */ + map[s->pa] &=3D ~(s->pdin << s->paio); + map[s->pa] |=3D (s->pdin << s->paio); + + /* close and unmmap */ + sifive_u_otp_backed_close(fd, map); + } + s->pwe =3D val32; break; default: @@ -143,6 +225,7 @@ static const MemoryRegionOps sifive_u_otp_ops =3D { =20 static Property sifive_u_otp_properties[] =3D { DEFINE_PROP_UINT32("serial", SiFiveUOTPState, serial, 0), + DEFINE_PROP_STRING("otp-file", SiFiveUOTPState, otp_file), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h index aba4d0181f..966723da1d 100644 --- a/include/hw/riscv/sifive_u.h +++ b/include/hw/riscv/sifive_u.h @@ -46,6 +46,7 @@ typedef struct SiFiveUSoCState { CadenceGEMState gem; =20 uint32_t serial; + char *otp_file; } SiFiveUSoCState; =20 #define TYPE_RISCV_U_MACHINE MACHINE_TYPE_NAME("sifive_u") @@ -65,6 +66,7 @@ typedef struct SiFiveUState { bool start_in_flash; uint32_t msel; uint32_t serial; + char *otp_file; } SiFiveUState; =20 enum { diff --git a/include/hw/riscv/sifive_u_otp.h b/include/hw/riscv/sifive_u_ot= p.h index 639297564a..f3d71ce82d 100644 --- a/include/hw/riscv/sifive_u_otp.h +++ b/include/hw/riscv/sifive_u_otp.h @@ -75,6 +75,7 @@ typedef struct SiFiveUOTPState { uint32_t fuse[SIFIVE_U_OTP_NUM_FUSES]; /* config */ uint32_t serial; + char *otp_file; } SiFiveUOTPState; =20 #endif /* HW_SIFIVE_U_OTP_H */ --=20 2.17.1 From nobody Fri Apr 26 23:50:27 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[111.243.189.249]) by smtp.gmail.com with ESMTPSA id c27sm7578483pfj.163.2020.07.30.19.47.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Jul 2020 19:47:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1JnB4YudV1m077cp66xzMnx1Junj30UO75iLbZUf12Y=; b=O3VtvxF2kxDrdqYV/12D8cnKeQ1yEDEwKTFLium7I6T2GURjMtrhihwq9xjepTDQwj Frgvsp+XMw6EANBKjCR6X5M5unY9Jti39+mRmo+UtKG/Wb0dc5uSapzBnRh5QjQXTT6T yKwghLzb6c0m4eaj6EfUuRQaRt3VOSYUcUmChUiY/HkPCEkqX92lGfq9CiXnFKEt++bd LdcHHGNmdx35TzpUt13NcGZI3s3FYLRl3S0NCLhnUyM9n06Mq7FN/+lN5ptB5vMNKace rY9OGYMYJjy6MhPLwCoGcOk6UUWwSxRHAioOHkBhgby8lx9rEl/XkEmleOvvz4mkn8Hh cKbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1JnB4YudV1m077cp66xzMnx1Junj30UO75iLbZUf12Y=; b=s1l/whvTiTGRBcr3XyOYe5tdEYJYnrjpcauSweVE4brJVUK+kETM5hVZZy+oaUUNzW W8WmXebU4a2BJKZMaUAPKhjn1XnUh99ot8CqmsvUMWLEO4IhRk62fPwd4amnk3ac5/83 OvIOhlBhEF9vrPju0aJF4/GEiLnMLNN+fJQrE955xKIqLXEQbmZkhBlFGIXINQY4AQo7 xDylMX0yy3H818XEz3RT9b63/bpkpbSjoBglUBZ+YBG3cdRKKGu45AqIx6OnkTezVXRA MX4g62oImmPwZ39/2yNHCzMx3C8VbMqUt5wMKlN7s3MYJefZqttaKF6c89wV9wYrNW42 agmg== X-Gm-Message-State: AOAM531HWWD6nfSF8TrCNWcU3TwIfwDyoV3vQ9k7Ot0gbfncgHX8qDK3 gEMcFMhNxGEjz06P1gd/MRkcYA== X-Google-Smtp-Source: ABdhPJzxLVssuc0Cm1KqNN+d3BB94LMk9TxwvkPxAGuUUSdXO6Bnk1ft08yLVGq90bruwIqNuV+uog== X-Received: by 2002:a17:90a:22a3:: with SMTP id s32mr2027720pjc.49.1596163678573; Thu, 30 Jul 2020 19:47:58 -0700 (PDT) From: Green Wan To: Subject: [RFC PATCH v2 2/2] hw/riscv: sifive_u: Add write-once protection. Date: Fri, 31 Jul 2020 10:47:08 +0800 Message-Id: <20200731024708.32725-3-green.wan@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200731024708.32725-1-green.wan@sifive.com> References: <20200731024708.32725-1-green.wan@sifive.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::642; envelope-from=green.wan@sifive.com; helo=mail-pl1-x642.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Sagar Karandikar , Bastian Koppelmann , qemu-devel@nongnu.org, Green Wan , Alistair Francis , Palmer Dabbelt , bmeng.cn@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add array to store the 'written' status for all bit of OTP to block the write operation to the same bit. Ignore the control register offset from 0x0 to 0x38 of OTP memory mapping. Signed-off-by: Green Wan --- hw/riscv/sifive_u_otp.c | 20 ++++++++++++++++++++ include/hw/riscv/sifive_u_otp.h | 1 + 2 files changed, 21 insertions(+) diff --git a/hw/riscv/sifive_u_otp.c b/hw/riscv/sifive_u_otp.c index e359f30fdb..a793093d47 100644 --- a/hw/riscv/sifive_u_otp.c +++ b/hw/riscv/sifive_u_otp.c @@ -35,6 +35,11 @@ =20 #define TRACE_PREFIX "FU540_OTP: " #define SIFIVE_FU540_OTP_SIZE (SIFIVE_U_OTP_NUM_FUSES * 4) +#define SET_WRITTEN_BIT(map, idx, bit) \ + (map[idx] |=3D (0x1 << bit)) + +#define GET_WRITTEN_BIT(map, idx, bit) \ + ((map[idx] >> bit) & 0x1) =20 static int32_t sifive_u_otp_backed_open(const char *filename, int32_t *fd, uint32_t **map) @@ -195,6 +200,18 @@ static void sifive_u_otp_write(void *opaque, hwaddr ad= dr, s->ptrim =3D val32; break; case SIFIVE_U_OTP_PWE: + /* Keep written state for data only and PWE is enabled. Ignore PAS= =3D1 */ + if ((s->pa > SIFIVE_U_OTP_PWE) && (val32 & 0x1) && !s->pas) { + if (GET_WRITTEN_BIT(s->fuse_wo, s->pa, s->paio)) { + qemu_log_mask(LOG_GUEST_ERROR, + TRACE_PREFIX "Error: write idx<%u>, bit<%u>\= n", + s->pa, s->paio); + break; + } else { + SET_WRITTEN_BIT(s->fuse_wo, s->pa, s->paio); + } + } + /* open and mmap OTP image file */ if (0 =3D=3D sifive_u_otp_backed_open(s->otp_file, &fd, &map)) { /* store value */ @@ -248,6 +265,9 @@ static void sifive_u_otp_reset(DeviceState *dev) /* Make a valid content of serial number */ s->fuse[SIFIVE_U_OTP_SERIAL_ADDR] =3D s->serial; s->fuse[SIFIVE_U_OTP_SERIAL_ADDR + 1] =3D ~(s->serial); + + /* Initialize write-once map */ + memset(s->fuse_wo, 0x00, sizeof(s->fuse_wo)); } =20 static void sifive_u_otp_class_init(ObjectClass *klass, void *data) diff --git a/include/hw/riscv/sifive_u_otp.h b/include/hw/riscv/sifive_u_ot= p.h index f3d71ce82d..4c6ac2e75e 100644 --- a/include/hw/riscv/sifive_u_otp.h +++ b/include/hw/riscv/sifive_u_otp.h @@ -73,6 +73,7 @@ typedef struct SiFiveUOTPState { uint32_t ptrim; uint32_t pwe; uint32_t fuse[SIFIVE_U_OTP_NUM_FUSES]; + uint32_t fuse_wo[SIFIVE_U_OTP_NUM_FUSES]; /* config */ uint32_t serial; char *otp_file; --=20 2.17.1