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bh=kzkZbHiaAXlpXHNAvFChVDMnSS9mfiTet/N90izk+PI=; b=fPIliceejnf4wZUj6reSPf6yG+XJX5WLA23pxAPVjMQmbwNbvvfwJpIAlEvdxBq1xHN8+x aGc5Pam1GspmD9uzoOl0pAy8TgnTzTZUY408jk03C75n+psPyZwUq/ZPjFYoxyK435YNob PX7SG8U32cVXa5A2uKVY/UyHDQcG8D8= X-MC-Unique: iF5EPUm7MAKv6CUSHc9UVw-1 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, peterx@redhat.com Subject: [PATCH for-5.2 v4 08/11] hw/arm/smmuv3: Fix IIDR offset Date: Tue, 28 Jul 2020 17:08:12 +0200 Message-Id: <20200728150815.11446-9-eric.auger@redhat.com> In-Reply-To: <20200728150815.11446-1-eric.auger@redhat.com> References: <20200728150815.11446-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" The SMMU IIDR register is at 0x018 offset. Fixes: 10a83cb9887 ("hw/arm/smmuv3: Skeleton") Signed-off-by: Eric Auger Reviewed-by: Peter Maydell --- hw/arm/smmuv3-internal.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h index 5babf72f7d..ef093eaff5 100644 --- a/hw/arm/smmuv3-internal.h +++ b/hw/arm/smmuv3-internal.h @@ -63,7 +63,7 @@ REG32(IDR5, 0x14) =20 #define SMMU_IDR5_OAS 4 =20 -REG32(IIDR, 0x1c) +REG32(IIDR, 0x18) REG32(CR0, 0x20) FIELD(CR0, SMMU_ENABLE, 0, 1) FIELD(CR0, EVENTQEN, 2, 1) --=20 2.21.3