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bh=/PDNEqPVzlrLEJCTVvsWJYXrf1MkJxyj/Y4y8B8JvaI=; b=Xbt2p5yGn3OIeLft5cCNcq9YY5iOv/5DipwbRIBwcOIWBVA9UVL7hpCym0W0JZWMbo+TX3 P0UWnzNSGAMbqTxw5N04yQsWq/n5kCWdM9kFsah0be0ynkZLxpxgPL4a5afuINJw7I3RSN HbKMVbrSHcp6OPcyliqFAV0WV53lxqY= X-MC-Unique: L9mRbsX0McOjfYD66i-bNg-1 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, peterx@redhat.com Subject: [PATCH for-5.2 v4 09/11] hw/arm/smmuv3: Let AIDR advertise SMMUv3.0 support Date: Tue, 28 Jul 2020 17:08:13 +0200 Message-Id: <20200728150815.11446-10-eric.auger@redhat.com> In-Reply-To: <20200728150815.11446-1-eric.auger@redhat.com> References: <20200728150815.11446-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Add the support for AIDR register. It currently advertises SMMU V3.0 spec. Signed-off-by: Eric Auger Reviewed-by: Peter Maydell --- v3 -> v4: - upper -> lower case - added Peter's R-b --- hw/arm/smmuv3-internal.h | 1 + include/hw/arm/smmuv3.h | 1 + hw/arm/smmuv3.c | 3 +++ 3 files changed, 5 insertions(+) diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h index ef093eaff5..bd34a4f330 100644 --- a/hw/arm/smmuv3-internal.h +++ b/hw/arm/smmuv3-internal.h @@ -64,6 +64,7 @@ REG32(IDR5, 0x14) #define SMMU_IDR5_OAS 4 =20 REG32(IIDR, 0x18) +REG32(AIDR, 0x1c) REG32(CR0, 0x20) FIELD(CR0, SMMU_ENABLE, 0, 1) FIELD(CR0, EVENTQEN, 2, 1) diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h index 36b2f45253..68d7a963e0 100644 --- a/include/hw/arm/smmuv3.h +++ b/include/hw/arm/smmuv3.h @@ -41,6 +41,7 @@ typedef struct SMMUv3State { =20 uint32_t idr[6]; uint32_t iidr; + uint32_t aidr; uint32_t cr[3]; uint32_t cr0ack; uint32_t statusr; diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 89ab11fc36..718f28462e 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -1251,6 +1251,9 @@ static MemTxResult smmu_readl(SMMUv3State *s, hwaddr = offset, case A_IIDR: *data =3D s->iidr; return MEMTX_OK; + case A_AIDR: + *data =3D s->aidr; + return MEMTX_OK; case A_CR0: *data =3D s->cr[0]; return MEMTX_OK; --=20 2.21.3