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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: frank.chang@sifive.com, alistair23@gmail.com, qemu-riscv@nongnu.org, zhiwei_liu@c-sky.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" If a 32-bit input is not properly nanboxed, then the input is replaced with the default qnan. Signed-off-by: Richard Henderson Reviewed-by: Chih-Min Chao Reviewed-by: LIU Zhiwei --- target/riscv/internals.h | 11 +++++++ target/riscv/fpu_helper.c | 64 ++++++++++++++++++++++++++++----------- 2 files changed, 57 insertions(+), 18 deletions(-) diff --git a/target/riscv/internals.h b/target/riscv/internals.h index 9f4ba7d617..f1a546dba6 100644 --- a/target/riscv/internals.h +++ b/target/riscv/internals.h @@ -43,4 +43,15 @@ static inline uint64_t nanbox_s(float32 f) return f | MAKE_64BIT_MASK(32, 32); } =20 +static inline float32 check_nanbox_s(uint64_t f) +{ + uint64_t mask =3D MAKE_64BIT_MASK(32, 32); + + if (likely((f & mask) =3D=3D mask)) { + return (uint32_t)f; + } else { + return 0x7fc00000u; /* default qnan */ + } +} + #endif diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c index 72541958a7..bb346a8249 100644 --- a/target/riscv/fpu_helper.c +++ b/target/riscv/fpu_helper.c @@ -81,9 +81,12 @@ void helper_set_rounding_mode(CPURISCVState *env, uint32= _t rm) set_float_rounding_mode(softrm, &env->fp_status); } =20 -static uint64_t do_fmadd_s(CPURISCVState *env, uint64_t frs1, uint64_t frs= 2, - uint64_t frs3, int flags) +static uint64_t do_fmadd_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2, + uint64_t rs3, int flags) { + float32 frs1 =3D check_nanbox_s(rs1); + float32 frs2 =3D check_nanbox_s(rs2); + float32 frs3 =3D check_nanbox_s(rs3); return nanbox_s(float32_muladd(frs1, frs2, frs3, flags, &env->fp_statu= s)); } =20 @@ -139,74 +142,97 @@ uint64_t helper_fnmadd_d(CPURISCVState *env, uint64_t= frs1, uint64_t frs2, float_muladd_negate_product, &env->fp_status); } =20 -uint64_t helper_fadd_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2) +uint64_t helper_fadd_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { + float32 frs1 =3D check_nanbox_s(rs1); + float32 frs2 =3D check_nanbox_s(rs2); return nanbox_s(float32_add(frs1, frs2, &env->fp_status)); } =20 -uint64_t helper_fsub_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2) +uint64_t helper_fsub_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { + float32 frs1 =3D check_nanbox_s(rs1); + float32 frs2 =3D check_nanbox_s(rs2); return nanbox_s(float32_sub(frs1, frs2, &env->fp_status)); } =20 -uint64_t helper_fmul_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2) +uint64_t helper_fmul_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { + float32 frs1 =3D check_nanbox_s(rs1); + float32 frs2 =3D check_nanbox_s(rs2); return nanbox_s(float32_mul(frs1, frs2, &env->fp_status)); } =20 -uint64_t helper_fdiv_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2) +uint64_t helper_fdiv_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { + float32 frs1 =3D check_nanbox_s(rs1); + float32 frs2 =3D check_nanbox_s(rs2); return nanbox_s(float32_div(frs1, frs2, &env->fp_status)); } =20 -uint64_t helper_fmin_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2) +uint64_t helper_fmin_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { + float32 frs1 =3D check_nanbox_s(rs1); + float32 frs2 =3D check_nanbox_s(rs2); return nanbox_s(float32_minnum(frs1, frs2, &env->fp_status)); } =20 -uint64_t helper_fmax_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2) +uint64_t helper_fmax_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { + float32 frs1 =3D check_nanbox_s(rs1); + float32 frs2 =3D check_nanbox_s(rs2); return nanbox_s(float32_maxnum(frs1, frs2, &env->fp_status)); } =20 -uint64_t helper_fsqrt_s(CPURISCVState *env, uint64_t frs1) +uint64_t helper_fsqrt_s(CPURISCVState *env, uint64_t rs1) { + float32 frs1 =3D check_nanbox_s(rs1); return nanbox_s(float32_sqrt(frs1, &env->fp_status)); } =20 -target_ulong helper_fle_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2) +target_ulong helper_fle_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { + float32 frs1 =3D check_nanbox_s(rs1); + float32 frs2 =3D check_nanbox_s(rs2); return float32_le(frs1, frs2, &env->fp_status); } =20 -target_ulong helper_flt_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2) +target_ulong helper_flt_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { + float32 frs1 =3D check_nanbox_s(rs1); + float32 frs2 =3D check_nanbox_s(rs2); return float32_lt(frs1, frs2, &env->fp_status); } =20 -target_ulong helper_feq_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2) +target_ulong helper_feq_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2) { + float32 frs1 =3D check_nanbox_s(rs1); + float32 frs2 =3D check_nanbox_s(rs2); return float32_eq_quiet(frs1, frs2, &env->fp_status); } =20 -target_ulong helper_fcvt_w_s(CPURISCVState *env, uint64_t frs1) +target_ulong helper_fcvt_w_s(CPURISCVState *env, uint64_t rs1) { + float32 frs1 =3D check_nanbox_s(rs1); return float32_to_int32(frs1, &env->fp_status); } =20 -target_ulong helper_fcvt_wu_s(CPURISCVState *env, uint64_t frs1) +target_ulong helper_fcvt_wu_s(CPURISCVState *env, uint64_t rs1) { + float32 frs1 =3D check_nanbox_s(rs1); return (int32_t)float32_to_uint32(frs1, &env->fp_status); } =20 #if defined(TARGET_RISCV64) -uint64_t helper_fcvt_l_s(CPURISCVState *env, uint64_t frs1) +uint64_t helper_fcvt_l_s(CPURISCVState *env, uint64_t rs1) { + float32 frs1 =3D check_nanbox_s(rs1); return float32_to_int64(frs1, &env->fp_status); } =20 -uint64_t helper_fcvt_lu_s(CPURISCVState *env, uint64_t frs1) +uint64_t helper_fcvt_lu_s(CPURISCVState *env, uint64_t rs1) { + float32 frs1 =3D check_nanbox_s(rs1); return float32_to_uint64(frs1, &env->fp_status); } #endif @@ -233,8 +259,9 @@ uint64_t helper_fcvt_s_lu(CPURISCVState *env, uint64_t = rs1) } #endif =20 -target_ulong helper_fclass_s(uint64_t frs1) +target_ulong helper_fclass_s(uint64_t rs1) { + float32 frs1 =3D check_nanbox_s(rs1); return fclass_s(frs1); } =20 @@ -275,7 +302,8 @@ uint64_t helper_fcvt_s_d(CPURISCVState *env, uint64_t r= s1) =20 uint64_t helper_fcvt_d_s(CPURISCVState *env, uint64_t rs1) { - return float32_to_float64(rs1, &env->fp_status); + float32 frs1 =3D check_nanbox_s(rs1); + return float32_to_float64(frs1, &env->fp_status); } =20 uint64_t helper_fsqrt_d(CPURISCVState *env, uint64_t frs1) --=20 2.25.1