From nobody Sat Nov 15 15:29:49 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=irrelevant.dk ARC-Seal: i=1; a=rsa-sha256; t=1595245676; cv=none; d=zohomail.com; s=zohoarc; b=i2+U0tWpaPs9j60njDqAct8q+VyntFjV7OvwbuHXxUI+Jpey6wAKc9X66Ss7gPsLGOEYlftQb7NkeFFqxuv7ye49vmsdwZAV92sbJfY97CBn9ABK5TXywoiaqlxL61IuMG/u6rgZEEGNSn0hxTcYd3tC0KEHF+mumuox0PIvt2w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1595245676; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=AI7KH4FaXv+hRWdJBo/0XlekhmRoaXnGkrNRK/XDM0o=; b=CocspKBUaFXAEPSsVhkwBfdSiNGGUaZ6f9I9i79UoNDWJ4/3/ksXWQRiRZbkVEECMacXZEGw4I8M+z4qboXcPAmGinbaUa/m26lDrQ3cNxRVHCuciVDNLj01U2evORSBDutrXaggA6ifBzJ1mYO7fuH8GBj/1fVnGWOoxu97uoU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1595245676812464.2777128880999; Mon, 20 Jul 2020 04:47:56 -0700 (PDT) Received: from localhost ([::1]:49938 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jxUGx-00050P-FU for importer@patchew.org; Mon, 20 Jul 2020 07:47:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37298) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jxU7R-0007Nl-WC; Mon, 20 Jul 2020 07:38:06 -0400 Received: from charlie.dont.surf ([128.199.63.193]:46888) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jxU7P-0005B5-28; Mon, 20 Jul 2020 07:38:05 -0400 Received: from apples.local (80-167-98-190-cable.dk.customer.tdc.net [80.167.98.190]) by charlie.dont.surf (Postfix) with ESMTPSA id 839C6BFB1B; Mon, 20 Jul 2020 11:38:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=irrelevant.dk; s=default; t=1595245080; bh=WBJTvPuUpVdkPBaC1mnh3RNYDll46h8qc7kXEHTw7wQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=v9hL9cAz8Wtl23MudOljtGeBMTt3Di5PzzqDynwEnaTy01KwB6bvsjPYjdeTO+Nrv qSycrv1xVdDlzOoUWJEwnoWBCR32SdKqtCAkyCgV5mWbgGO94lmJAp2sHlkQu4ntCA YDI1Ryfb+4QzhS4XOCkKojZtxbQsCZWJDR+5KgRuvBqMj3gTv4jwbN7abojZFg8ShI woX+nHMbAS1L75OrjDTr0zNvaP3UZWrxbSPleItHWObmhHtQZxzYSSRl3dq4W0idqK 2X9DGmr+QzPNbULBjcNbJ+mqHXoHQqoAdVwz7r1UIOcXK9b0fmfFqrpG4GGf2urrC0 nMzgN2B7ADwQg== From: Klaus Jensen To: qemu-devel@nongnu.org Subject: [PATCH 10/16] hw/block/nvme: add check for mdts Date: Mon, 20 Jul 2020 13:37:42 +0200 Message-Id: <20200720113748.322965-11-its@irrelevant.dk> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200720113748.322965-1-its@irrelevant.dk> References: <20200720113748.322965-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=128.199.63.193; envelope-from=its@irrelevant.dk; helo=charlie.dont.surf X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/20 07:37:55 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , qemu-block@nongnu.org, Klaus Jensen , Max Reitz , Keith Busch , Klaus Jensen , Maxim Levitsky Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Klaus Jensen Add 'mdts' device parameter to control the Maximum Data Transfer Size of the controller and check that it is respected. Signed-off-by: Klaus Jensen Reviewed-by: Maxim Levitsky Reviewed-by: Minwoo Im --- hw/block/nvme.c | 32 ++++++++++++++++++++++++++++++-- hw/block/nvme.h | 1 + hw/block/trace-events | 1 + 3 files changed, 32 insertions(+), 2 deletions(-) diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 35bc1a7b7e21..10fe53873ae9 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -18,9 +18,10 @@ * Usage: add options: * -drive file=3D,if=3Dnone,id=3D * -device nvme,drive=3D,serial=3D,id=3D, \ - * cmb_size_mb=3D, \ + * [cmb_size_mb=3D,] \ * [pmrdev=3D,] \ - * max_ioqpairs=3D + * [max_ioqpairs=3D,] \ + * [mdts=3D] * * Note cmb_size_mb denotes size of CMB in MB. CMB is assumed to be at * offset 0 in BAR2 and supports only WDS, RDS and SQS for now. @@ -553,6 +554,17 @@ static void nvme_clear_events(NvmeCtrl *n, uint8_t eve= nt_type) } } =20 +static inline uint16_t nvme_check_mdts(NvmeCtrl *n, size_t len) +{ + uint8_t mdts =3D n->params.mdts; + + if (mdts && len > n->page_size << mdts) { + return NVME_INVALID_FIELD | NVME_DNR; + } + + return NVME_SUCCESS; +} + static inline uint16_t nvme_check_bounds(NvmeCtrl *n, NvmeNamespace *ns, uint64_t slba, uint32_t nlb) { @@ -646,6 +658,13 @@ static uint16_t nvme_rw(NvmeCtrl *n, NvmeNamespace *ns= , NvmeCmd *cmd, =20 trace_pci_nvme_rw(is_write ? "write" : "read", nlb, data_size, slba); =20 + status =3D nvme_check_mdts(n, data_size); + if (status) { + trace_pci_nvme_err_mdts(nvme_cid(req), data_size); + block_acct_invalid(blk_get_stats(n->conf.blk), acct); + return status; + } + status =3D nvme_check_bounds(n, ns, slba, nlb); if (status) { trace_pci_nvme_err_invalid_lba_range(slba, nlb, ns->id_ns.nsze); @@ -938,6 +957,7 @@ static uint16_t nvme_get_log(NvmeCtrl *n, NvmeCmd *cmd,= NvmeRequest *req) uint32_t numdl, numdu; uint64_t off, lpol, lpou; size_t len; + uint16_t status; =20 numdl =3D (dw10 >> 16); numdu =3D (dw11 & 0xffff); @@ -953,6 +973,12 @@ static uint16_t nvme_get_log(NvmeCtrl *n, NvmeCmd *cmd= , NvmeRequest *req) =20 trace_pci_nvme_get_log(nvme_cid(req), lid, lsp, rae, len, off); =20 + status =3D nvme_check_mdts(n, len); + if (status) { + trace_pci_nvme_err_mdts(nvme_cid(req), len); + return status; + } + switch (lid) { case NVME_LOG_ERROR_INFO: return nvme_error_info(n, cmd, rae, len, off, req); @@ -2275,6 +2301,7 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pc= i_dev) id->ieee[0] =3D 0x00; id->ieee[1] =3D 0x02; id->ieee[2] =3D 0xb3; + id->mdts =3D n->params.mdts; id->ver =3D cpu_to_le32(NVME_SPEC_VER); id->oacs =3D cpu_to_le16(0); =20 @@ -2394,6 +2421,7 @@ static Property nvme_props[] =3D { DEFINE_PROP_UINT16("msix_qsize", NvmeCtrl, params.msix_qsize, 65), DEFINE_PROP_UINT8("aerl", NvmeCtrl, params.aerl, 3), DEFINE_PROP_UINT32("aer_max_queued", NvmeCtrl, params.aer_max_queued, = 64), + DEFINE_PROP_UINT8("mdts", NvmeCtrl, params.mdts, 7), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/hw/block/nvme.h b/hw/block/nvme.h index 5519b5cc7686..137cd8c2bf20 100644 --- a/hw/block/nvme.h +++ b/hw/block/nvme.h @@ -11,6 +11,7 @@ typedef struct NvmeParams { uint32_t cmb_size_mb; uint8_t aerl; uint32_t aer_max_queued; + uint8_t mdts; } NvmeParams; =20 typedef struct NvmeAsyncEvent { diff --git a/hw/block/trace-events b/hw/block/trace-events index 6d0cd588c786..5d7d4679650b 100644 --- a/hw/block/trace-events +++ b/hw/block/trace-events @@ -85,6 +85,7 @@ pci_nvme_mmio_shutdown_set(void) "shutdown bit set" pci_nvme_mmio_shutdown_cleared(void) "shutdown bit cleared" =20 # nvme traces for error conditions +pci_nvme_err_mdts(uint16_t cid, size_t len) "cid %"PRIu16" len %"PRIu64"" pci_nvme_err_invalid_dma(void) "PRP/SGL is too small for transfer size" pci_nvme_err_invalid_prplist_ent(uint64_t prplist) "PRP list entry is null= or not page aligned: 0x%"PRIx64"" pci_nvme_err_invalid_prp2_align(uint64_t prp2) "PRP2 is not page aligned: = 0x%"PRIx64"" --=20 2.27.0