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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id t4sm23464334wmf.4.2020.07.13.07.37.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jul 2020 07:37:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=nB/5rC0VVxktBcVawvErd/qrg+KIJA8SmLqeHRRk/Lw=; b=jztX9O/7Tm1QBLswG/KSEekcoGrtP1uoa3C5mQ709P7uaI9ZUgiBvt/FrcQH1gORb1 TITwNct1XaEUQCO+j0epMYjNjyVV/DSuYKJmJAkgCpb+B7NVMjyhInp7Oim5IBrT0uft FjWBZu4o7c4L5dLsujcPY9TlBcbNAuWdke+n1+0V7GZhyIXdQGh3eShdx4tCoeEdVJSB 2v5wa0Hfc00gA3yy17OtE6mo814RGaFdZmJfgtqJhQiyjZnUISWgINeEQJOqKOfykZUd 2xGb1Q6ICWG+mTXyngl9hAOfTp8F6vezq0Wu21Q0szAUJHbrbJGZmAHLbAefzKiGt37D pu8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=nB/5rC0VVxktBcVawvErd/qrg+KIJA8SmLqeHRRk/Lw=; b=LojyvfwS3SfqjCIT0nZ9Qy64gElPs4J3o7EffahZfVxvGHUnJAr97+hy32p5LKsPoF oe8/RbExVzEeF8oSWxG45WZf7sthlqsK6fakn7lkYqPtIULVedpidurpxGGHkG/sryQD IbwSBt4crpuGmtdj/3ReGHneLx4+DH5f6M7EXmXPk3Sqwd1OenwNBrqSpKFNYGtBrqgI WjzqJXRGubM7YeN5k0F2tJGT86ObaGHMVIm2LbIrw22xXl4sA11bcKSxuINQuE3kM2Zu baYLk/w1tkGcDJePAefWwTKIFMpZJR+EaeqrfDu4RBNkEBn4wsNY91RS6AXPz2vEEhrS pNKQ== X-Gm-Message-State: AOAM533tkP4+VHpksNOH7064PZmgUjUVZik16q/f2bJW6OAH5sfW2AUy HncAPY2aeSs79YP4/j40TKBRYA== X-Google-Smtp-Source: ABdhPJxCXszoS5DDXnCS2jJeKv8OGvgM180wCHerla5a8GwLjY0oYzNhMiFdJHa6s7K1/Zyeh18KFQ== X-Received: by 2002:a7b:ca4c:: with SMTP id m12mr256888wml.33.1594651038602; Mon, 13 Jul 2020 07:37:18 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-5.1] hw/arm/armsse: Assert info->num_cpus is in-bounds in armsse_realize() Date: Mon, 13 Jul 2020 15:37:16 +0100 Message-Id: <20200713143716.9881-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::344; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x344.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" In armsse_realize() we have a loop over [0, info->num_cpus), which indexes into various fixed-size arrays in the ARMSSE struct. This confuses Coverity, which warns that we might overrun those arrays (CID 1430326, 1430337, 1430371, 1430414, 1430430). This can't actually happen, because the info struct is always one of the entries in the armsse_variants[] array and num_cpus is either 1 or 2; we also already assert in armsse_init() that num_cpus is not too large. However, adding an assert to armsse_realize() like the one in armsse_init() should help Coverity figure out that these code paths aren't possible. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/armsse.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 64fcab895f7..dcbff9bd8f4 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -452,6 +452,8 @@ static void armsse_realize(DeviceState *dev, Error **er= rp) return; } =20 + assert(info->num_cpus <=3D SSE_MAX_CPUS); + /* max SRAM_ADDR_WIDTH: 24 - log2(SRAM_NUM_BANK) */ assert(is_power_of_2(info->sram_banks)); addr_width_max =3D 24 - ctz32(info->sram_banks); --=20 2.20.1