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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::343; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x343.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, robert.foley@linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, f4bug@amsat.org, robhenry@microsoft.com, aaron@os.amperecomputing.com, cota@braap.org, kuhn.chenqun@huawei.com, peter.puhov@linaro.org, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Do a light conversion to .rst and clean-up some of the language at the start now MTTCG has been merged for a while. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Reviewed-by: Emilio G. Cota --- docs/devel/index.rst | 1 + ...ti-thread-tcg.txt =3D> multi-thread-tcg.rst} | 52 ++++++++++++------- 2 files changed, 34 insertions(+), 19 deletions(-) rename docs/devel/{multi-thread-tcg.txt =3D> multi-thread-tcg.rst} (90%) diff --git a/docs/devel/index.rst b/docs/devel/index.rst index bb8238c5d6de..4ecaea3643fb 100644 --- a/docs/devel/index.rst +++ b/docs/devel/index.rst @@ -23,6 +23,7 @@ Contents: decodetree secure-coding-practices tcg + multi-thread-tcg tcg-plugins bitops reset diff --git a/docs/devel/multi-thread-tcg.txt b/docs/devel/multi-thread-tcg.= rst similarity index 90% rename from docs/devel/multi-thread-tcg.txt rename to docs/devel/multi-thread-tcg.rst index 3c85ac0eab9b..42158b77c707 100644 --- a/docs/devel/multi-thread-tcg.txt +++ b/docs/devel/multi-thread-tcg.rst @@ -1,15 +1,17 @@ -Copyright (c) 2015-2016 Linaro Ltd. +.. + Copyright (c) 2015-2020 Linaro Ltd. =20 -This work is licensed under the terms of the GNU GPL, version 2 or -later. See the COPYING file in the top-level directory. + This work is licensed under the terms of the GNU GPL, version 2 or + later. See the COPYING file in the top-level directory. =20 Introduction =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 -This document outlines the design for multi-threaded TCG system-mode -emulation. The current user-mode emulation mirrors the thread -structure of the translated executable. Some of the work will be -applicable to both system and linux-user emulation. +This document outlines the design for multi-threaded TCG (a.k.a MTTCG) +system-mode emulation. user-mode emulation has always mirrored the +thread structure of the translated executable although some of the +changes done for MTTCG system emulation have improved the stability of +linux-user emulation. =20 The original system-mode TCG implementation was single threaded and dealt with multiple CPUs with simple round-robin scheduling. This @@ -21,9 +23,18 @@ vCPU Scheduling =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 We introduce a new running mode where each vCPU will run on its own -user-space thread. This will be enabled by default for all FE/BE -combinations that have had the required work done to support this -safely. +user-space thread. This is enabled by default for all FE/BE +combinations where the host memory model is able to accommodate the +guest (TCG_GUEST_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO is zero) and the +guest has had the required work done to support this safely +(TARGET_SUPPORTS_MTTCG). + +System emulation will fall back to the original round robin approach +if: + +* forced by --accel tcg,thread=3Dsingle +* enabling --icount mode +* 64 bit guests on 32 bit hosts (TCG_OVERSIZED_GUEST) =20 In the general case of running translated code there should be no inter-vCPU dependencies and all vCPUs should be able to run at full @@ -61,7 +72,9 @@ have their block-to-block jumps patched. Global TCG State ---------------- =20 -### User-mode emulation +User-mode emulation +~~~~~~~~~~~~~~~~~~~ + We need to protect the entire code generation cycle including any post generation patching of the translated code. This also implies a shared translation buffer which contains code running on all cores. Any @@ -78,9 +91,11 @@ patching. =20 Code generation is serialised with mmap_lock(). =20 -### !User-mode emulation +!User-mode emulation +~~~~~~~~~~~~~~~~~~~~ + Each vCPU has its own TCG context and associated TCG region, thereby -requiring no locking. +requiring no locking during translation. =20 Translation Blocks ------------------ @@ -92,6 +107,7 @@ including: =20 - debugging operations (breakpoint insertion/removal) - some CPU helper functions + - linux-user spawning it's first thread =20 This is done with the async_safe_run_on_cpu() mechanism to ensure all vCPUs are quiescent when changes are being made to shared global @@ -250,8 +266,10 @@ to enforce a particular ordering of memory operations = from the point of view of external observers (e.g. another processor core). They can apply to any memory operations as well as just loads or stores. =20 -The Linux kernel has an excellent write-up on the various forms of -memory barrier and the guarantees they can provide [1]. +The Linux kernel has an excellent `write-up +` +on the various forms of memory barrier and the guarantees they can +provide. =20 Barriers are often wrapped around synchronisation primitives to provide explicit memory ordering semantics. However they can be used @@ -352,7 +370,3 @@ an exclusive lock which ensures all emulation is serial= ised. While the atomic helpers look good enough for now there may be a need to look at solutions that can more closely model the guest architectures semantics. - -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D - -[1] https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/plain/= Documentation/memory-barriers.txt --=20 2.20.1 From nobody Wed May 1 23:36:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1594304093; cv=none; d=zohomail.com; s=zohoarc; b=EWVmQetZ/uw/YHQ7qpEYdn8LNnhNZBwWPLpL9T1mO08+uMiyhRLDy3VqUvxduM2Blz5QZPCsPtn5Qz9RC5VHUOMrQoFeGa7gVyglYteoO/XHvXXmPTsaxc2aUWcyYy9v8rwAgzizz+xRzBGMrr2HLgAlqe1nr4TchH8OdvbyVmk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1594304093; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, Peter Maydell , berrange@redhat.com, robert.foley@linaro.org, Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, f4bug@amsat.org, robhenry@microsoft.com, aaron@os.amperecomputing.com, cota@braap.org, Pavel Dovgalyuk , kuhn.chenqun@huawei.com, peter.puhov@linaro.org, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) This attempts to bring together my understanding of the requirements for icount behaviour into one reference document for our developer notes. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Cc: Paolo Bonzini Cc: Pavel Dovgalyuk Cc: Peter Maydell Message-Id: <20200619135844.23307-1-alex.bennee@linaro.org> Reviewed-by: Emilio G. Cota --- v2 - fix copyright date - it's -> its - drop mentioned of gen_io_end() - remove and correct original conjecture v3 - include link in index v4 - Grammar fixes from Peter - re-worded final section --- docs/devel/index.rst | 1 + docs/devel/tcg-icount.rst | 97 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 98 insertions(+) create mode 100644 docs/devel/tcg-icount.rst diff --git a/docs/devel/index.rst b/docs/devel/index.rst index 4ecaea3643fb..ae6eac7c9c66 100644 --- a/docs/devel/index.rst +++ b/docs/devel/index.rst @@ -23,6 +23,7 @@ Contents: decodetree secure-coding-practices tcg + tcg-icount multi-thread-tcg tcg-plugins bitops diff --git a/docs/devel/tcg-icount.rst b/docs/devel/tcg-icount.rst new file mode 100644 index 000000000000..8d67b6c076a7 --- /dev/null +++ b/docs/devel/tcg-icount.rst @@ -0,0 +1,97 @@ +.. + Copyright (c) 2020, Linaro Limited + Written by Alex Benn=C3=A9e + + +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +TCG Instruction Counting +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +TCG has long supported a feature known as icount which allows for +instruction counting during execution. This should not be confused +with cycle accurate emulation - QEMU does not attempt to emulate how +long an instruction would take on real hardware. That is a job for +other more detailed (and slower) tools that simulate the rest of a +micro-architecture. + +This feature is only available for system emulation and is +incompatible with multi-threaded TCG. It can be used to better align +execution time with wall-clock time so a "slow" device doesn't run too +fast on modern hardware. It can also provides for a degree of +deterministic execution and is an essential part of the record/replay +support in QEMU. + +Core Concepts +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +At its heart icount is simply a count of executed instructions which +is stored in the TimersState of QEMU's timer sub-system. The number of +executed instructions can then be used to calculate QEMU_CLOCK_VIRTUAL +which represents the amount of elapsed time in the system since +execution started. Depending on the icount mode this may either be a +fixed number of ns per instruction or adjusted as execution continues +to keep wall clock time and virtual time in sync. + +To be able to calculate the number of executed instructions the +translator starts by allocating a budget of instructions to be +executed. The budget of instructions is limited by how long it will be +until the next timer will expire. We store this budget as part of a +vCPU icount_decr field which shared with the machinery for handling +cpu_exit(). The whole field is checked at the start of every +translated block and will cause a return to the outer loop to deal +with whatever caused the exit. + +In the case of icount, before the flag is checked we subtract the +number of instructions the translation block would execute. If this +would cause the instruction budget to go negative we exit the main +loop and regenerate a new translation block with exactly the right +number of instructions to take the budget to 0 meaning whatever timer +was due to expire will expire exactly when we exit the main run loop. + +Dealing with MMIO +----------------- + +While we can adjust the instruction budget for known events like timer +expiry we cannot do the same for MMIO. Every load/store we execute +might potentially trigger an I/O event, at which point we will need an +up to date and accurate reading of the icount number. + +To deal with this case, when an I/O access is made we: + + - restore un-executed instructions to the icount budget + - re-compile a single [1]_ instruction block for the current PC + - exit the cpu loop and execute the re-compiled block + +The new block is created with the CF_LAST_IO compile flag which +ensures the final instruction translation starts with a call to +gen_io_start() so we don't enter a perpetual loop constantly +recompiling a single instruction block. For translators using the +common translator_loop this is done automatically. + =20 +.. [1] sometimes two instructions if dealing with delay slots =20 + +Other I/O operations +-------------------- + +MMIO isn't the only type of operation for which we might need a +correct and accurate clock. IO port instructions and accesses to +system registers are the common examples here. These instructions have +to be handled by the individual translators which have the knowledge +of which operations are I/O operations. + +When the translator is handling an instruction of this kind: + +* it must call gen_io_start() if icount is enabled, at some + point before the generation of the code which actually does + the I/O, using a code fragment similar to: + +.. code:: c + + if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { + gen_io_start(); + } + +* it must end the TB immediately after this instruction + +Note that some older front-ends call a "gen_io_end()" function: +this is obsolete and should not be used. --=20 2.20.1 From nobody Wed May 1 23:36:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1594304100; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::344; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x344.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, robert.foley@linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, f4bug@amsat.org, robhenry@microsoft.com, aaron@os.amperecomputing.com, cota@braap.org, kuhn.chenqun@huawei.com, peter.puhov@linaro.org, aurelien@aurel32.net, Jon Doron Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Jon Doron The PhyMemMode gdb extension command was missing from the gdb.rst document. Signed-off-by: Jon Doron Signed-off-by: Alex Benn=C3=A9e Message-Id: <20200601171609.1665397-1-arilou@gmail.com> Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- docs/system/gdb.rst | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/docs/system/gdb.rst b/docs/system/gdb.rst index a40145fcf849..abda961e2b49 100644 --- a/docs/system/gdb.rst +++ b/docs/system/gdb.rst @@ -87,3 +87,23 @@ three commands you can query and set the single step beh= avior: (gdb) maintenance packet Qqemu.sstep=3D0x5 sending: "qemu.sstep=3D0x5" received: "OK" + + +Another feature that QEMU gdbstub provides is to toggle the memory GDB +works with, by default GDB will show the current process memory respecting +the virtual address translation. + +If you want to examine/change the physical memory you can set the gdbstub +to work with the physical memory rather with the virtual one. + +The memory mode can be checked by sending the following command: + +``maintenance packet qqemu.PhyMemMode`` + This will return either 0 or 1, 1 indicates you are currently in the + physical memory mode. + +``maintenance packet Qqemu.PhyMemMode:1`` + This will change the memory mode to physical memory. + +``maintenance packet Qqemu.PhyMemMode:0`` + This will change it back to normal memory mode. --=20 2.20.1 From nobody Wed May 1 23:36:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, robert.foley@linaro.org, Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, f4bug@amsat.org, robhenry@microsoft.com, aaron@os.amperecomputing.com, cota@braap.org, kuhn.chenqun@huawei.com, peter.puhov@linaro.org, Eduardo Habkost , aurelien@aurel32.net, Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Any write to a device might cause a re-arrangement of memory triggering a TLB flush and potential re-size of the TLB invalidating previous entries. This would cause users of qemu_plugin_get_hwaddr() to see the warning: invalid use of qemu_plugin_get_hwaddr because of the failed tlb_lookup which should always succeed. To prevent this we save the IOTLB data in case it is later needed by a plugin doing a lookup. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Emilio G. Cota --- v2 - save the entry instead of re-running the tlb_fill. v3 - don't abuse TLS, use CPUState to store data - just use g_free_rcu() to avoid ugliness - verify addr matches before returning data - ws fix --- include/hw/core/cpu.h | 4 +++ include/qemu/typedefs.h | 1 + accel/tcg/cputlb.c | 57 +++++++++++++++++++++++++++++++++++++++-- 3 files changed, 60 insertions(+), 2 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index b3f4b7931823..bedbf098dc57 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -417,7 +417,11 @@ struct CPUState { =20 DECLARE_BITMAP(plugin_mask, QEMU_PLUGIN_EV_MAX); =20 +#ifdef CONFIG_PLUGIN GArray *plugin_mem_cbs; + /* saved iotlb data from io_writex */ + SavedIOTLB *saved_iotlb; +#endif =20 /* TODO Move common fields from CPUArchState here. */ int cpu_index; diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h index 15f5047bf1dc..427027a9707a 100644 --- a/include/qemu/typedefs.h +++ b/include/qemu/typedefs.h @@ -116,6 +116,7 @@ typedef struct QObject QObject; typedef struct QString QString; typedef struct RAMBlock RAMBlock; typedef struct Range Range; +typedef struct SavedIOTLB SavedIOTLB; typedef struct SHPCDevice SHPCDevice; typedef struct SSIBus SSIBus; typedef struct VirtIODevice VirtIODevice; diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 1e815357c709..8636b66e036a 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1073,6 +1073,42 @@ static uint64_t io_readx(CPUArchState *env, CPUIOTLB= Entry *iotlbentry, return val; } =20 +#ifdef CONFIG_PLUGIN + +typedef struct SavedIOTLB { + struct rcu_head rcu; + hwaddr addr; + MemoryRegionSection *section; + hwaddr mr_offset; +} SavedIOTLB; + +/* + * Save a potentially trashed IOTLB entry for later lookup by plugin. + * + * We also need to track the thread storage address because the RCU + * cleanup that runs when we leave the critical region (the current + * execution) is actually in a different thread. + */ +static void save_iotlb_data(CPUState *cs, hwaddr addr, MemoryRegionSection= *section, hwaddr mr_offset) +{ + SavedIOTLB *old, *new =3D g_new(SavedIOTLB, 1); + new->addr =3D addr; + new->section =3D section; + new->mr_offset =3D mr_offset; + old =3D atomic_rcu_read(&cs->saved_iotlb); + atomic_rcu_set(&cs->saved_iotlb, new); + if (old) { + g_free_rcu(old, rcu); + } +} + +#else +static void save_iotlb_data(CPUState *cs, hwaddr addr, MemoryRegionSection= *section, hwaddr mr_offset) +{ + /* do nothing */ +} +#endif + static void io_writex(CPUArchState *env, CPUIOTLBEntry *iotlbentry, int mmu_idx, uint64_t val, target_ulong addr, uintptr_t retaddr, MemOp op) @@ -1092,6 +1128,12 @@ static void io_writex(CPUArchState *env, CPUIOTLBEnt= ry *iotlbentry, } cpu->mem_io_pc =3D retaddr; =20 + /* + * The memory_region_dispatch may trigger a flush/resize + * so for plugins we save the iotlb_data just in case. + */ + save_iotlb_data(cpu, iotlbentry->addr, section, mr_offset); + if (mr->global_locking && !qemu_mutex_iothread_locked()) { qemu_mutex_lock_iothread(); locked =3D true; @@ -1381,8 +1423,11 @@ void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr a= ddr, * in the softmmu lookup code (or helper). We don't handle re-fills or * checking the victim table. This is purely informational. * - * This should never fail as the memory access being instrumented - * should have just filled the TLB. + * This almost never fails as the memory access being instrumented + * should have just filled the TLB. The one corner case is io_writex + * which can cause TLB flushes and potential resizing of the TLBs + * loosing the information we need. In those cases we need to recover + * data from a copy of the io_tlb entry. */ =20 bool tlb_plugin_lookup(CPUState *cpu, target_ulong addr, int mmu_idx, @@ -1406,6 +1451,14 @@ bool tlb_plugin_lookup(CPUState *cpu, target_ulong a= ddr, int mmu_idx, data->v.ram.hostaddr =3D addr + tlbe->addend; } return true; + } else { + SavedIOTLB *saved =3D atomic_rcu_read(&cpu->saved_iotlb); + if (saved && saved->addr =3D=3D tlb_addr) { + data->is_io =3D true; + data->v.io.section =3D saved->section; + data->v.io.offset =3D saved->mr_offset; + return true; + } } return false; } --=20 2.20.1 From nobody Wed May 1 23:36:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1594304306; cv=none; d=zohomail.com; s=zohoarc; b=P7xDkAqb3KXYcgZ+hA7IHTY2OMh4IVC145GpRAYawLnWcIdA/QY3dNEPQphyTpv0JcrVQ27/oGk1DE3niKgnfwVE5D5xJ77eDJQ1cX7j5F/c5cFlZfq+/MRyXqHJbMIniLfWRED9M6D4BIdSCA8+MV0IGU2lP+AtcJMUjkfvUSA= ARC-Message-Signature: i=1; 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Thu, 09 Jul 2020 07:13:36 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 05/13] hw/virtio/pci: include vdev name in registered PCI sections Date: Thu, 9 Jul 2020 15:13:19 +0100 Message-Id: <20200709141327.14631-6-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200709141327.14631-1-alex.bennee@linaro.org> References: <20200709141327.14631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::443; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x443.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, robert.foley@linaro.org, "Michael S . Tsirkin" , =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, f4bug@amsat.org, robhenry@microsoft.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , aaron@os.amperecomputing.com, cota@braap.org, kuhn.chenqun@huawei.com, peter.puhov@linaro.org, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) When viewing/debugging memory regions it is sometimes hard to figure out which PCI device something belongs to. Make the names unique by including the vdev name in the name string. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Michael S. Tsirkin --- v2 - swap ()'s for an extra - --- hw/virtio/virtio-pci.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 8554cf2a038e..215e680c71f4 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1406,7 +1406,8 @@ static void virtio_pci_device_write(void *opaque, hwa= ddr addr, } } =20 -static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy) +static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy, + const char *vdev_name) { static const MemoryRegionOps common_ops =3D { .read =3D virtio_pci_common_read, @@ -1453,36 +1454,41 @@ static void virtio_pci_modern_regions_init(VirtIOPC= IProxy *proxy) }, .endianness =3D DEVICE_LITTLE_ENDIAN, }; + g_autoptr(GString) name =3D g_string_new(NULL); =20 - + g_string_printf(name, "virtio-pci-common-%s", vdev_name); memory_region_init_io(&proxy->common.mr, OBJECT(proxy), &common_ops, proxy, - "virtio-pci-common", + name->str, proxy->common.size); =20 + g_string_printf(name, "virtio-pci-isr-%s", vdev_name); memory_region_init_io(&proxy->isr.mr, OBJECT(proxy), &isr_ops, proxy, - "virtio-pci-isr", + name->str, proxy->isr.size); =20 + g_string_printf(name, "virtio-pci-device-%s", vdev_name); memory_region_init_io(&proxy->device.mr, OBJECT(proxy), &device_ops, virtio_bus_get_device(&proxy->bus), - "virtio-pci-device", + name->str, proxy->device.size); =20 + g_string_printf(name, "virtio-pci-notify-%s", vdev_name); memory_region_init_io(&proxy->notify.mr, OBJECT(proxy), ¬ify_ops, virtio_bus_get_device(&proxy->bus), - "virtio-pci-notify", + name->str, proxy->notify.size); =20 + g_string_printf(name, "virtio-pci-notify-pio-%s", vdev_name); memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy), ¬ify_pio_ops, virtio_bus_get_device(&proxy->bus), - "virtio-pci-notify-pio", + name->str, proxy->notify_pio.size); } =20 @@ -1623,7 +1629,7 @@ static void virtio_pci_device_plugged(DeviceState *d,= Error **errp) =20 struct virtio_pci_cfg_cap *cfg_mask; =20 - virtio_pci_modern_regions_init(proxy); + virtio_pci_modern_regions_init(proxy, vdev->name); =20 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap); virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap); --=20 2.20.1 From nobody Wed May 1 23:36:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1594304248; cv=none; d=zohomail.com; s=zohoarc; b=ZWKsqzjmn0ieNAk49BDEU7P9soAgU1LmSzfBfazxOly/5lzv9IZkyYqKGY+Pt4KIPL57iouEw3lnJkaQgmHiUBP29MINeXWW0UsP6MDmleLSDeKh8QHH++H3vo+fD9R3YTsztw9/ehhkjW8CqZ2Q1tQJ4vhU9FX0D/aNRFffZG4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1594304248; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=M56C/7edPLiM8JWg+URAkFUT+3dv8mHH/cx2urJlkD0=; b=LGL1dfyiJ7gr/LAIKPtx4vT9FZJ4Prnh/yOrJDN/4LJQTcon8BBrjX7M0EXTECwK63 J9baEKrMAktMEZBnPy5Rx4dRXFeJMBTwHHmZCqMu8pmJ34Aolpr46aERPJ719eZ8D0pe OgtwnVdTh3nNHQkq/E1vYvrR4rF1w2btLzapnm70DpkAp8Z989p+kNzBMD8tCBaNw+GS TimZeF5hLU5R5IKTOxoPReROzrKSe7q2IkKFbch3wjhJHrEC7SapbZLgSldrctuMo/ed g0fhuVz82rhT5zsqhFC007Lcrf0BVjqBQEdlHck17CVYN0dIpBBFW+Zcme0rTiywM2R9 +u5g== X-Gm-Message-State: AOAM533cmE2P+91K/cH0JeecI/vLyYm/O+HnTyqH+YNr1EL58xRa4Hp+ I712RGEb1qE8D89oUgUyLGRjLA== X-Google-Smtp-Source: ABdhPJzTBCGgo99LSy2sI8DN0WMrVTPYHtZxUb0+zooRPOjcPPT7zaleImrROeddGniE4P0ZtZVZwg== X-Received: by 2002:a5d:60c5:: with SMTP id x5mr29473461wrt.67.1594304015356; Thu, 09 Jul 2020 07:13:35 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 06/13] plugins: add API to return a name for a IO device Date: Thu, 9 Jul 2020 15:13:20 +0100 Message-Id: <20200709141327.14631-7-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200709141327.14631-1-alex.bennee@linaro.org> References: <20200709141327.14631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, robert.foley@linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, f4bug@amsat.org, robhenry@microsoft.com, aaron@os.amperecomputing.com, cota@braap.org, kuhn.chenqun@huawei.com, peter.puhov@linaro.org, Clement Deschamps , aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) This may well end up being anonymous but it should always be unique. Signed-off-by: Alex Benn=C3=A9e [r-b provisional given change to g_intern_string] Reviewed-by: Clement Deschamps Reviewed-by: Emilio G. Cota --- v3 - return a non-freeable const g_intern_string() - checkpatch cleanups --- include/qemu/qemu-plugin.h | 6 ++++++ plugins/api.c | 20 ++++++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h index bab8b0d4b3af..c98c18d6b052 100644 --- a/include/qemu/qemu-plugin.h +++ b/include/qemu/qemu-plugin.h @@ -335,6 +335,12 @@ struct qemu_plugin_hwaddr *qemu_plugin_get_hwaddr(qemu= _plugin_meminfo_t info, bool qemu_plugin_hwaddr_is_io(const struct qemu_plugin_hwaddr *haddr); uint64_t qemu_plugin_hwaddr_device_offset(const struct qemu_plugin_hwaddr = *haddr); =20 +/* + * Returns a string representing the device. The string is valid for + * the lifetime of the plugin. + */ +const char *qemu_plugin_hwaddr_device_name(const struct qemu_plugin_hwaddr= *h); + typedef void (*qemu_plugin_vcpu_mem_cb_t)(unsigned int vcpu_index, qemu_plugin_meminfo_t info, uint64_t vaddr, diff --git a/plugins/api.c b/plugins/api.c index bbdc5a4eb46d..4304e63f0cf8 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -303,6 +303,26 @@ uint64_t qemu_plugin_hwaddr_device_offset(const struct= qemu_plugin_hwaddr *haddr return 0; } =20 +const char *qemu_plugin_hwaddr_device_name(const struct qemu_plugin_hwaddr= *h) +{ +#ifdef CONFIG_SOFTMMU + if (h && h->is_io) { + MemoryRegionSection *mrs =3D h->v.io.section; + if (!mrs->mr->name) { + unsigned long maddr =3D 0xffffffff & (uintptr_t) mrs->mr; + g_autofree char *temp =3D g_strdup_printf("anon%08lx", maddr); + return g_intern_string(temp); + } else { + return g_intern_string(mrs->mr->name); + } + } else { + return g_intern_string("RAM"); + } +#else + return g_intern_string("Invalid"); +#endif +} + /* * Queries to the number and potential maximum number of vCPUs there * will be. This helps the plugin dimension per-vcpu arrays. --=20 2.20.1 From nobody Wed May 1 23:36:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1594304521; cv=none; d=zohomail.com; s=zohoarc; b=CrS7Wf5OIZeE1hPmopnB5asXjD/hj60s2Na9/nArROy1FBIInzke+D2Q+1Bh6AoIuNlzz3d/rNYyzWwc40HGur8ys3ofoNtCn1jQapCMX/4MEg2ZGgXpm6kiGVo6LyoiwoS1CaKT76Er4FYOoeCMRYgDmh+Mx5WvbXStylvY3GE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1594304521; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ijru7vfuo0rF0FQiZmJ4xzr85Qw/JDmcUhGplkCDPx8=; b=SxgHV7vHgamVJ3x17BqcqyIaM4np7Z+PAb2c4kf7khj6rSvUNdT82Nry1POqUaL7dUURCfxieswijglA2D/d3ACsoeea3TWfpv7RsbAXO0nqZ+xeYlsoS4JhZlIvLhlf96082a/BR25wSg97eS9cA8DxCQ3w7WReTUSM4sRhuLs= ARC-Authentication-Results: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42c.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, robert.foley@linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, f4bug@amsat.org, robhenry@microsoft.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , aaron@os.amperecomputing.com, cota@braap.org, kuhn.chenqun@huawei.com, peter.puhov@linaro.org, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) This is a plugin intended to help with profiling access to various bits of system hardware. It only really makes sense for system emulation. It takes advantage of the recently exposed helper API that allows us to see the device name (memory region name) associated with a device. You can specify arg=3Dread or arg=3Dwrite to limit the tracking to just reads or writes (by default it does both). The pattern option: -plugin ./tests/plugin/libhwprofile.so,arg=3Dpattern will allow you to see the access pattern to devices, eg: gic_cpu @ 0xffffffc010040000 off:00000000, 8, 1, 8, 1 off:00000000, 4, 1, 4, 1 off:00000000, 2, 1, 2, 1 off:00000000, 1, 1, 1, 1 The source option: -plugin ./tests/plugin/libhwprofile.so,arg=3Dsource will track the virtual source address of the instruction making the access: pl011 @ 0xffffffc010031000 pc:ffffffc0104c785c, 1, 4, 0, 0 pc:ffffffc0104c7898, 1, 4, 0, 0 pc:ffffffc010512bcc, 2, 1867, 0, 0 You cannot mix source and pattern. Finally the match option allow you to limit the tracking to just the devices you care about. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Robert Foley Tested-by: Robert Foley --- v2 - use 64 bit cpu masks - warn if we will exceed cpu mask capability - don't run in linux-user mode - skip in check-tcg for linux-user test v3 - update device name API - re-factor and clean-up - add source tracking - use direct hash for source/pattern - add match function - expand the commit message - checkpatch cleanups --- tests/plugin/hwprofile.c | 305 ++++++++++++++++++++++++++++++++++++++ tests/plugin/Makefile | 1 + tests/tcg/Makefile.target | 12 +- 3 files changed, 316 insertions(+), 2 deletions(-) create mode 100644 tests/plugin/hwprofile.c diff --git a/tests/plugin/hwprofile.c b/tests/plugin/hwprofile.c new file mode 100644 index 000000000000..6dac1d5f8541 --- /dev/null +++ b/tests/plugin/hwprofile.c @@ -0,0 +1,305 @@ +/* + * Copyright (C) 2020, Alex Benn=C3=A9e + * + * HW Profile - breakdown access patterns for IO to devices + * + * License: GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +QEMU_PLUGIN_EXPORT int qemu_plugin_version =3D QEMU_PLUGIN_VERSION; + +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + +typedef struct { + uint64_t cpu_read; + uint64_t cpu_write; + uint64_t reads; + uint64_t writes; +} IOCounts; + +typedef struct { + uint64_t off_or_pc; + IOCounts counts; +} IOLocationCounts; + +typedef struct { + const char *name; + uint64_t base; + IOCounts totals; + GHashTable *detail; +} DeviceCounts; + +static GMutex lock; +static GHashTable *devices; + +/* track the access pattern to a piece of HW */ +static bool pattern; +/* track the source address of access to HW */ +static bool source; +/* track only matched regions of HW */ +static bool check_match; +static gchar **matches; + +static enum qemu_plugin_mem_rw rw =3D QEMU_PLUGIN_MEM_RW; + +static inline bool track_reads(void) +{ + return rw =3D=3D QEMU_PLUGIN_MEM_RW || rw =3D=3D QEMU_PLUGIN_MEM_R; +} + +static inline bool track_writes(void) +{ + return rw =3D=3D QEMU_PLUGIN_MEM_RW || rw =3D=3D QEMU_PLUGIN_MEM_W; +} + +static void plugin_init(void) +{ + devices =3D g_hash_table_new(NULL, NULL); +} + +static gint sort_cmp(gconstpointer a, gconstpointer b) +{ + DeviceCounts *ea =3D (DeviceCounts *) a; + DeviceCounts *eb =3D (DeviceCounts *) b; + return ea->totals.reads + ea->totals.writes > + eb->totals.reads + eb->totals.writes ? -1 : 1; +} + +static gint sort_loc(gconstpointer a, gconstpointer b) +{ + IOLocationCounts *ea =3D (IOLocationCounts *) a; + IOLocationCounts *eb =3D (IOLocationCounts *) b; + return ea->off_or_pc > eb->off_or_pc; +} + +static void fmt_iocount_record(GString *s, IOCounts *rec) +{ + if (track_reads()) { + g_string_append_printf(s, ", %"PRIx64", %"PRId64, + rec->cpu_read, rec->reads); + } + if (track_writes()) { + g_string_append_printf(s, ", %"PRIx64", %"PRId64, + rec->cpu_write, rec->writes); + } +} + +static void fmt_dev_record(GString *s, DeviceCounts *rec) +{ + g_string_append_printf(s, "%s, 0x%"PRIx64, + rec->name, rec->base); + fmt_iocount_record(s, &rec->totals); + g_string_append_c(s, '\n'); +} + +static void plugin_exit(qemu_plugin_id_t id, void *p) +{ + g_autoptr(GString) report =3D g_string_new(""); + GList *counts; + + if (!(pattern || source)) { + g_string_printf(report, "Device, Address"); + if (track_reads()) { + g_string_append_printf(report, ", RCPUs, Reads"); + } + if (track_writes()) { + g_string_append_printf(report, ", WCPUs, Writes"); + } + g_string_append_c(report, '\n'); + } + + counts =3D g_hash_table_get_values(devices); + if (counts && g_list_next(counts)) { + GList *it; + + it =3D g_list_sort(counts, sort_cmp); + + while (it) { + DeviceCounts *rec =3D (DeviceCounts *) it->data; + if (rec->detail) { + GList *accesses =3D g_hash_table_get_values(rec->detail); + GList *io_it =3D g_list_sort(accesses, sort_loc); + const char *prefix =3D pattern ? "off" : "pc"; + g_string_append_printf(report, "%s @ 0x%"PRIx64"\n", + rec->name, rec->base); + while (io_it) { + IOLocationCounts *loc =3D (IOLocationCounts *) io_it->= data; + g_string_append_printf(report, " %s:%08"PRIx64, + prefix, loc->off_or_pc); + fmt_iocount_record(report, &loc->counts); + g_string_append_c(report, '\n'); + io_it =3D io_it->next; + } + } else { + fmt_dev_record(report, rec); + } + it =3D it->next; + }; + g_list_free(it); + } + + qemu_plugin_outs(report->str); +} + +static DeviceCounts *new_count(const char *name, uint64_t base) +{ + DeviceCounts *count =3D g_new0(DeviceCounts, 1); + count->name =3D name; + count->base =3D base; + if (pattern || source) { + count->detail =3D g_hash_table_new(NULL, NULL); + } + g_hash_table_insert(devices, (gpointer) name, count); + return count; +} + +static IOLocationCounts *new_location(GHashTable *table, uint64_t off_or_p= c) +{ + IOLocationCounts *loc =3D g_new0(IOLocationCounts, 1); + loc->off_or_pc =3D off_or_pc; + g_hash_table_insert(table, (gpointer) off_or_pc, loc); + return loc; +} + +static void hwprofile_match_hit(DeviceCounts *rec, uint64_t off) +{ + g_autoptr(GString) report =3D g_string_new("hwprofile: match @ offset"= ); + g_string_append_printf(report, "%"PRIx64", previous hits\n", off); + fmt_dev_record(report, rec); + qemu_plugin_outs(report->str); +} + +static void inc_count(IOCounts *count, bool is_write, unsigned int cpu_ind= ex) +{ + if (is_write) { + count->writes++; + count->cpu_write |=3D (1 << cpu_index); + } else { + count->reads++; + count->cpu_read |=3D (1 << cpu_index); + } +} + +static void vcpu_haddr(unsigned int cpu_index, qemu_plugin_meminfo_t memin= fo, + uint64_t vaddr, void *udata) +{ + struct qemu_plugin_hwaddr *hwaddr =3D qemu_plugin_get_hwaddr(meminfo, = vaddr); + + if (!hwaddr || !qemu_plugin_hwaddr_is_io(hwaddr)) { + return; + } else { + const char *name =3D qemu_plugin_hwaddr_device_name(hwaddr); + uint64_t off =3D qemu_plugin_hwaddr_device_offset(hwaddr); + bool is_write =3D qemu_plugin_mem_is_store(meminfo); + DeviceCounts *counts; + + g_mutex_lock(&lock); + counts =3D (DeviceCounts *) g_hash_table_lookup(devices, name); + + if (!counts) { + uint64_t base =3D vaddr - off; + counts =3D new_count(name, base); + } + + if (check_match) { + if (g_strv_contains((const char * const *)matches, counts->nam= e)) { + hwprofile_match_hit(counts, off); + inc_count(&counts->totals, is_write, cpu_index); + } + } else { + inc_count(&counts->totals, is_write, cpu_index); + } + + /* either track offsets or source of access */ + if (source) { + off =3D (uint64_t) udata; + } + + if (pattern || source) { + IOLocationCounts *io_count =3D g_hash_table_lookup(counts->det= ail, + (gpointer) of= f); + if (!io_count) { + io_count =3D new_location(counts->detail, off); + } + inc_count(&io_count->counts, is_write, cpu_index); + } + + g_mutex_unlock(&lock); + } +} + +static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) +{ + size_t n =3D qemu_plugin_tb_n_insns(tb); + size_t i; + + for (i =3D 0; i < n; i++) { + struct qemu_plugin_insn *insn =3D qemu_plugin_tb_get_insn(tb, i); + gpointer udata =3D (gpointer) (source ? qemu_plugin_insn_vaddr(ins= n) : 0); + qemu_plugin_register_vcpu_mem_cb(insn, vcpu_haddr, + QEMU_PLUGIN_CB_NO_REGS, + rw, udata); + } +} + +QEMU_PLUGIN_EXPORT +int qemu_plugin_install(qemu_plugin_id_t id, const qemu_info_t *info, + int argc, char **argv) +{ + int i; + + for (i =3D 0; i < argc; i++) { + char *opt =3D argv[i]; + if (g_strcmp0(opt, "read") =3D=3D 0) { + rw =3D QEMU_PLUGIN_MEM_R; + } else if (g_strcmp0(opt, "write") =3D=3D 0) { + rw =3D QEMU_PLUGIN_MEM_W; + } else if (g_strcmp0(opt, "pattern") =3D=3D 0) { + pattern =3D true; + } else if (g_strcmp0(opt, "source") =3D=3D 0) { + source =3D true; + } else if (g_str_has_prefix(opt, "match")) { + gchar **parts =3D g_strsplit(opt, "=3D", 2); + check_match =3D true; + matches =3D g_strsplit(parts[1], ",", -1); + g_strfreev(parts); + } else { + fprintf(stderr, "option parsing failed: %s\n", opt); + return -1; + } + } + + if (source && pattern) { + fprintf(stderr, "can only currently track either source or pattern= .\n"); + return -1; + } + + if (!info->system_emulation) { + fprintf(stderr, "hwprofile: plugin only useful for system emulatio= n\n"); + return -1; + } + + /* Just warn about overflow */ + if (info->system.smp_vcpus > 64 || + info->system.max_vcpus > 64) { + fprintf(stderr, "hwprofile: can only track up to 64 CPUs\n"); + } + + plugin_init(); + + qemu_plugin_register_vcpu_tb_trans_cb(id, vcpu_tb_trans); + qemu_plugin_register_atexit_cb(id, plugin_exit, NULL); + return 0; +} diff --git a/tests/plugin/Makefile b/tests/plugin/Makefile index 3a50451428b4..0cb8e35ae407 100644 --- a/tests/plugin/Makefile +++ b/tests/plugin/Makefile @@ -14,6 +14,7 @@ NAMES +=3D hotblocks NAMES +=3D howvec NAMES +=3D hotpages NAMES +=3D lockstep +NAMES +=3D hwprofile =20 SONAMES :=3D $(addsuffix .so,$(addprefix lib,$(NAMES))) =20 diff --git a/tests/tcg/Makefile.target b/tests/tcg/Makefile.target index 4b2b696fcee3..bc595b058845 100644 --- a/tests/tcg/Makefile.target +++ b/tests/tcg/Makefile.target @@ -129,8 +129,16 @@ ifeq ($(CONFIG_PLUGIN),y) PLUGIN_SRC=3D$(SRC_PATH)/tests/plugin PLUGIN_LIB=3D../../plugin VPATH+=3D$(PLUGIN_LIB) -PLUGINS=3D$(filter-out liblockstep.so,\ - $(patsubst %.c, lib%.so, $(notdir $(wildcard $(PLUGIN_SRC)/*.c)))) + +# Some plugins aren't testable automatically +SKIP_PLUGINS=3Dliblockstep.so +ifdef CONFIG_USER_ONLY +SKIP_PLUGINS+=3Dlibhwprofile.so +endif + +PLUGINS=3D$(filter-out $(SKIP_PLUGINS),\ + $(patsubst %.c, lib%.so, \ + $(notdir $(wildcard $(PLUGIN_SRC)/*.c)))) =20 # We need to ensure expand the run-plugin-TEST-with-PLUGIN # pre-requistes manually here as we can't use stems to handle it. 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::343; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x343.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, robert.foley@linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, f4bug@amsat.org, robhenry@microsoft.com, aaron@os.amperecomputing.com, cota@braap.org, Dave Bort , kuhn.chenqun@huawei.com, peter.puhov@linaro.org, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) While there isn't any easy way to make the inline counts thread safe we can ensure the callback based ones are. While we are at it we can reduce introduce a new option ("idle") to dump a report of the current bb and insn count each time a vCPU enters the idle state. Signed-off-by: Alex Benn=C3=A9e Cc: Dave Bort Reviewed-by: Robert Foley --- v2 - fixup for non-inline linux-user case - minor cleanup and re-factor --- tests/plugin/bb.c | 96 ++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 83 insertions(+), 13 deletions(-) diff --git a/tests/plugin/bb.c b/tests/plugin/bb.c index df19fd359df3..89c373e19cd8 100644 --- a/tests/plugin/bb.c +++ b/tests/plugin/bb.c @@ -16,24 +16,67 @@ =20 QEMU_PLUGIN_EXPORT int qemu_plugin_version =3D QEMU_PLUGIN_VERSION; =20 -static uint64_t bb_count; -static uint64_t insn_count; +typedef struct { + GMutex lock; + int index; + uint64_t bb_count; + uint64_t insn_count; +} CPUCount; + +/* Used by the inline & linux-user counts */ static bool do_inline; +static CPUCount inline_count; + +/* Dump running CPU total on idle? */ +static bool idle_report; +static GPtrArray *counts; +static int max_cpus; + +static void gen_one_cpu_report(CPUCount *count, GString *report) +{ + if (count->bb_count) { + g_string_append_printf(report, "CPU%d: " + "bb's: %" PRIu64", insns: %" PRIu64 "\n", + count->index, + count->bb_count, count->insn_count); + } +} =20 static void plugin_exit(qemu_plugin_id_t id, void *p) { - g_autofree gchar *out =3D g_strdup_printf( - "bb's: %" PRIu64", insns: %" PRIu64 "\n", - bb_count, insn_count); - qemu_plugin_outs(out); + g_autoptr(GString) report =3D g_string_new(""); + + if (do_inline || !max_cpus) { + g_string_printf(report, "bb's: %" PRIu64", insns: %" PRIu64 "\n", + inline_count.bb_count, inline_count.insn_count); + } else { + g_ptr_array_foreach(counts, (GFunc) gen_one_cpu_report, report); + } + qemu_plugin_outs(report->str); +} + +static void vcpu_idle(qemu_plugin_id_t id, unsigned int cpu_index) +{ + CPUCount *count =3D g_ptr_array_index(counts, cpu_index); + g_autoptr(GString) report =3D g_string_new(""); + gen_one_cpu_report(count, report); + + if (report->len > 0) { + g_string_prepend(report, "Idling "); + qemu_plugin_outs(report->str); + } } =20 static void vcpu_tb_exec(unsigned int cpu_index, void *udata) { - unsigned long n_insns =3D (unsigned long)udata; + CPUCount *count =3D max_cpus ? + g_ptr_array_index(counts, cpu_index) : &inline_count; =20 - insn_count +=3D n_insns; - bb_count++; + unsigned long n_insns =3D (unsigned long)udata; + g_mutex_lock(&count->lock); + count->insn_count +=3D n_insns; + count->bb_count++; + g_mutex_unlock(&count->lock); } =20 static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) @@ -42,9 +85,9 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct qem= u_plugin_tb *tb) =20 if (do_inline) { qemu_plugin_register_vcpu_tb_exec_inline(tb, QEMU_PLUGIN_INLINE_AD= D_U64, - &bb_count, 1); + &inline_count.bb_count, 1= ); qemu_plugin_register_vcpu_tb_exec_inline(tb, QEMU_PLUGIN_INLINE_AD= D_U64, - &insn_count, n_insns); + &inline_count.insn_count,= n_insns); } else { qemu_plugin_register_vcpu_tb_exec_cb(tb, vcpu_tb_exec, QEMU_PLUGIN_CB_NO_REGS, @@ -56,8 +99,35 @@ QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugin_i= d_t id, const qemu_info_t *info, int argc, char **argv) { - if (argc && strcmp(argv[0], "inline") =3D=3D 0) { - do_inline =3D true; + int i; + + for (i =3D 0; i < argc; i++) { + char *opt =3D argv[i]; + if (g_strcmp0(opt, "inline") =3D=3D 0) { + do_inline =3D true; + } else if (g_strcmp0(opt, "idle") =3D=3D 0) { + idle_report =3D true; + } else { + fprintf(stderr, "option parsing failed: %s\n", opt); + return -1; + } + } + + if (info->system_emulation && !do_inline) { + max_cpus =3D info->system.max_vcpus; + counts =3D g_ptr_array_new(); + for (i =3D 0; i < max_cpus; i++) { + CPUCount *count =3D g_new0(CPUCount, 1); + g_mutex_init(&count->lock); + count->index =3D i; + g_ptr_array_add(counts, count); + } + } else if (!do_inline) { + g_mutex_init(&inline_count.lock); + } + + if (idle_report) { + qemu_plugin_register_vcpu_idle_cb(id, vcpu_idle); } =20 qemu_plugin_register_vcpu_tb_trans_cb(id, vcpu_tb_trans); --=20 2.20.1 From nobody Wed May 1 23:36:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::444; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x444.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, robert.foley@linaro.org, Yoshinori Sato , =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, f4bug@amsat.org, robhenry@microsoft.com, aaron@os.amperecomputing.com, cota@braap.org, Claudio Fontana , kuhn.chenqun@huawei.com, peter.puhov@linaro.org, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) The translator_ld* functions very much expect us to be decoding one instruction at a time. Otherwise we will see weirdness such as: qemu-sh4: warning: plugin_disas: 6 bytes left over when we use the disas functions. For what SH4 is doing here (scanning ahead in the instruction stream) this is the right function to use. Reported-by: Claudio Fontana Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/sh4/translate.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 6192d83e8c66..919da72a0c98 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -1915,9 +1915,13 @@ static void decode_gusa(DisasContext *ctx, CPUSH4Sta= te *env) goto fail; } =20 - /* Read all of the insns for the region. */ + /* + * Read all of the insns for the region. We do this directly with + * cpu_lduw_code to avoid confusing the plugins by decoding + * multiple instructions. + */ for (i =3D 0; i < max_insns; ++i) { - insns[i] =3D translator_lduw(env, pc + i * 2); + insns[i] =3D cpu_lduw_code(env, pc + i * 2); } =20 ld_adr =3D ld_dst =3D ld_mop =3D -1; --=20 2.20.1 From nobody Wed May 1 23:36:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1594304389; cv=none; d=zohomail.com; s=zohoarc; b=VGaVwne2lAQqFiHmYz3ew9VfmZnWWf3dfavPH7lv0VKRQNrpNEYyD0mvLQNGa1kICA2qgGbXspw66zG/YIrybUURZnvTmmXf31zlt5kPOuEbBmEWFx4Mw196+td+lk3ZdiyKt9X8VIDVJPFabh/PC9cBNveX2Xx2OJjNx9xwOsg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1594304389; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, robert.foley@linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, f4bug@amsat.org, robhenry@microsoft.com, aaron@os.amperecomputing.com, cota@braap.org, kuhn.chenqun@huawei.com, peter.puhov@linaro.org, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Not all compilers support the -Wpsabi (clang-9 in my case). Fixes: bac8d222a Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Robert Foley --- tests/plugin/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/plugin/Makefile b/tests/plugin/Makefile index 0cb8e35ae407..dcfbd99b15b8 100644 --- a/tests/plugin/Makefile +++ b/tests/plugin/Makefile @@ -18,7 +18,7 @@ NAMES +=3D hwprofile =20 SONAMES :=3D $(addsuffix .so,$(addprefix lib,$(NAMES))) =20 -QEMU_CFLAGS +=3D -fPIC -Wpsabi +QEMU_CFLAGS +=3D -fPIC -Wno-unknown-warning-option -Wpsabi QEMU_CFLAGS +=3D -I$(SRC_PATH)/include/qemu =20 all: $(SONAMES) --=20 2.20.1 From nobody Wed May 1 23:36:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1594304391; cv=none; d=zohomail.com; s=zohoarc; b=oEezaM31ezSOtlOOt4XR6/o6vXa6oHqilq7nEqqiwwJ7JQ+H8KuUBYUpAZaj14vnv4jcgaSIRKaiNoXAk5WAPLVDDsmhsJ9U/mI3Z9MbR8nHXDwZFvBVA+K9/p/lNxIlgEHkdBpTK+PNsNcfYtRzqKkdRtHVADq2cs42AE+7jx4= ARC-Message-Signature: i=1; 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Thu, 09 Jul 2020 07:13:41 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 11/13] tests/docker: fall back more gracefully when pull fails Date: Thu, 9 Jul 2020 15:13:25 +0100 Message-Id: <20200709141327.14631-12-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200709141327.14631-1-alex.bennee@linaro.org> References: <20200709141327.14631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, robert.foley@linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, f4bug@amsat.org, robhenry@microsoft.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , aaron@os.amperecomputing.com, cota@braap.org, kuhn.chenqun@huawei.com, peter.puhov@linaro.org, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) I only spotted this in the small window between my testing with my registry while waiting for the gitlab PR to go in. As we pre-pull the registry image we know if that fails there isn't any point attempting to use the cache. Fall back to the way we used to do it at that point. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- tests/docker/docker.py | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/tests/docker/docker.py b/tests/docker/docker.py index 9684f07bdebe..2d67bbd15a5b 100755 --- a/tests/docker/docker.py +++ b/tests/docker/docker.py @@ -306,13 +306,14 @@ class Docker(object): checksum =3D _text_checksum(_dockerfile_preprocess(dockerfile)) =20 if registry is not None: - dockerfile =3D dockerfile.replace("FROM qemu/", - "FROM %s/qemu/" % - (registry)) # see if we can fetch a cache copy, may fail... pull_args =3D ["pull", "%s/%s" % (registry, tag)] - self._do(pull_args, quiet=3Dquiet) - + if self._do(pull_args, quiet=3Dquiet) =3D=3D 0: + dockerfile =3D dockerfile.replace("FROM qemu/", + "FROM %s/qemu/" % + (registry)) + else: + registry =3D None =20 tmp_df =3D tempfile.NamedTemporaryFile(mode=3D"w+t", encoding=3D'utf-8', --=20 2.20.1 From nobody Wed May 1 23:36:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=D9RzuX/3jxkQtQdTH0rTmm3wMB62+kPBSn4Xf4Inji8=; b=FXCw2snWQSPglyImYM/DSU0KfpwbWMJjrB8yL58lbr0qPFrimIJCx2QUXV7RflWmkb GQdhwxvkK+GhQxsMn0LdP7aqX9HFhO8mnb6xlp8F6UAN+6Y030wW9xEyL0qNJRnBy5IW BiAamGpOpnzY4hLDDMT+/YAx7xRdjtKRHxqyI5BOkBaqJKEgsCqrDx2my6cs0EtfSxdd uDOU9TYWDtMdMdIO7zn2MA7MFj79nky1CISNOe5xQkVYDMeMvLflg0rwIBrIQkHTYaAY 9ZnimYKQAjv773pYDijLvWxLWTgMiGLamXeXEY38ozyz495PgoBbuzqE7QcJd0MneGvf L/4w== X-Gm-Message-State: AOAM531eUii4xuw+ysA4/ALUvk0LLXRNjt4NQa0vu4K0kdsYNk61MyOS w0nFU4iEruwI3yXr9MbjYJz1Zw== X-Google-Smtp-Source: ABdhPJzLY9yGGHDOfv/Vyv4KiaL1g5I1Oda6K54Mkn1jaVQT2uuTtCvtcoBGTW08lD05ydMZ8BMAkg== X-Received: by 2002:a1c:2392:: with SMTP id j140mr259414wmj.6.1594304024625; Thu, 09 Jul 2020 07:13:44 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 12/13] tests/docker: update toolchain set in debian-xtensa-cross Date: Thu, 9 Jul 2020 15:13:26 +0100 Message-Id: <20200709141327.14631-13-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200709141327.14631-1-alex.bennee@linaro.org> References: <20200709141327.14631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, robert.foley@linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, f4bug@amsat.org, robhenry@microsoft.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Max Filippov , aaron@os.amperecomputing.com, cota@braap.org, kuhn.chenqun@huawei.com, peter.puhov@linaro.org, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Max Filippov Switch to the prebuilt xtensa toolchains release 2020.07. Drop csp toolchain as the csp core is not a part of QEMU. Add de233_fpu and dsp3400 toolchains to enable DFPU and FPU2000 tests. Signed-off-by: Max Filippov Signed-off-by: Alex Benn=C3=A9e Message-Id: <20200708082347.27318-1-jcmvbkbc@gmail.com> Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tests/docker/dockerfiles/debian-xtensa-cross.docker | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tests/docker/dockerfiles/debian-xtensa-cross.docker b/tests/do= cker/dockerfiles/debian-xtensa-cross.docker index beb73f46baa6..ba4148299c5a 100644 --- a/tests/docker/dockerfiles/debian-xtensa-cross.docker +++ b/tests/docker/dockerfiles/debian-xtensa-cross.docker @@ -18,12 +18,12 @@ RUN apt-get update && \ git \ python3-minimal =20 -ENV CPU_LIST csp dc232b dc233c -ENV TOOLCHAIN_RELEASE 2018.02 +ENV CPU_LIST dc232b dc233c de233_fpu dsp3400 +ENV TOOLCHAIN_RELEASE 2020.07 =20 RUN for cpu in $CPU_LIST; do \ curl -#SL http://github.com/foss-xtensa/toolchain/releases/downloa= d/$TOOLCHAIN_RELEASE/x86_64-$TOOLCHAIN_RELEASE-xtensa-$cpu-elf.tar.gz \ | tar -xzC /opt; \ done =20 -ENV PATH $PATH:/opt/$TOOLCHAIN_RELEASE/xtensa-dc232b-elf/bin:/opt/$TOOLCHA= IN_RELEASE/xtensa-dc233c-elf/bin:/opt/$TOOLCHAIN_RELEASE/xtensa-csp-elf/bin +ENV PATH $PATH:/opt/$TOOLCHAIN_RELEASE/xtensa-dc232b-elf/bin:/opt/$TOOLCHA= IN_RELEASE/xtensa-dc233c-elf/bin:/opt/$TOOLCHAIN_RELEASE/xtensa-de233_fpu-e= lf/bin:/opt/$TOOLCHAIN_RELEASE/xtensa-dsp3400-elf/bin --=20 2.20.1 From nobody Wed May 1 23:36:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, robert.foley@linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org, f4bug@amsat.org, robhenry@microsoft.com, aaron@os.amperecomputing.com, cota@braap.org, kuhn.chenqun@huawei.com, peter.puhov@linaro.org, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) The previous code was brittle and missed cases such as the mipn32 variants which for some reason has the 64 bit syscalls. This leads to a number of binary targets having deps lines like: all.clang-sanitizer/mipsn32el-linux-user/linux-user/signal.d 140: /home/alex/lsrc/qemu.git/linux-user/mips64/syscall_nr.h \ 455:/home/alex/lsrc/qemu.git/linux-user/mips64/syscall_nr.h: all.clang-sanitizer/mipsn32el-linux-user/linux-user/syscall.d 146: /home/alex/lsrc/qemu.git/linux-user/mips64/syscall_nr.h \ 485:/home/alex/lsrc/qemu.git/linux-user/mips64/syscall_nr.h: which in turn would trigger the re-generation of syscall_nr.h in the source tree (thanks to generic %/syscall_nr.h rules). The previous code attempts to clean it out but misses edge cases but fails. After spending a day trying to understand how this was happening I'm unconvinced that there are not other such breakages possible with this "caching". As we add more auto-generated code to the build it is likely to trip up again. Apply a hammer to the problem. Fixes: 91e5998f18 (which fixes 5f29856b852d and 4d6a835dea47) Signed-off-by: Alex Benn=C3=A9e --- configure | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/configure b/configure index 1e977601a47a..3c404f31f4f4 100755 --- a/configure +++ b/configure @@ -1955,23 +1955,20 @@ EOF exit 0 fi =20 -# Remove old dependency files to make sure that they get properly regenera= ted -rm -f */config-devices.mak.d - # Remove syscall_nr.h to be sure they will be regenerated in the build # directory, not in the source directory for arch in alpha hppa m68k xtensa sh4 microblaze arm ppc s390x sparc spar= c64 \ i386 x86_64 mips mips64 ; do # remove the file if it has been generated in the source directory rm -f "${source_path}/linux-user/${arch}/syscall_nr.h" - # remove the dependency files - for target in ${arch}*-linux-user ; do - test -d "${target}" && find "${target}" -type f -name "*.d" \ - -exec grep -q "${source_path}/linux-user/${arch}/syscall_nr.h= " {} \; \ - -print | while read file ; do rm "${file}" "${file%.d}.o" ; d= one - done done =20 +# Clean out all old dependency files. As more files are generated we +# run the risk of old dependencies triggering generation in the wrong +# places. Previous brittle attempts to be surgical tend to miss edge +# cases leading to wasted time and much confusion. +find -type f -name "*.d" -exec rm -f {} \; + if test -z "$python" then error_exit "Python not found. Use --python=3D/path/to/python" --=20 2.20.1