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That's all we know. X-Spam_score_int: -5 X-Spam_score: -0.6 X-Spam_bar: / X-Spam_report: (-0.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Peter Maydell Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) target/xtensa, the only user of NO_SIGNALING_NANS macro has FPU implementations with and without the corresponding property. With NO_SIGNALING_NANS being a macro they cannot be a part of the same QEMU executable. Replace macro with new property in float_status to allow cores with different FPU implementations coexist. Cc: Peter Maydell Cc: "Alex Benn=C3=A9e" Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Max Filippov Reviewed-by: Richard Henderson --- Changes v1->v2: - use inline function for no_signaling_nans property to allow for constant folding on architectures that have this property fixed. fpu/softfloat-specialize.inc.c | 229 ++++++++++++++++---------------- include/fpu/softfloat-helpers.h | 5 + include/fpu/softfloat-types.h | 7 +- 3 files changed, 128 insertions(+), 113 deletions(-) diff --git a/fpu/softfloat-specialize.inc.c b/fpu/softfloat-specialize.inc.c index 44f5b661f831..9d919ee2d993 100644 --- a/fpu/softfloat-specialize.inc.c +++ b/fpu/softfloat-specialize.inc.c @@ -79,12 +79,18 @@ this code that are retained. * version 2 or later. See the COPYING file in the top-level directory. */ =20 -/* Define for architectures which deviate from IEEE in not supporting +/* + * Define whether architecture deviates from IEEE in not supporting * signaling NaNs (so all NaNs are treated as quiet). */ +static inline bool no_signaling_nans(float_status *status) +{ #if defined(TARGET_XTENSA) -#define NO_SIGNALING_NANS 1 + return status->no_signaling_nans; +#else + return false; #endif +} =20 /* Define how the architecture discriminates signaling NaNs. * This done with the most significant bit of the fraction. @@ -111,12 +117,12 @@ static inline bool snan_bit_is_one(float_status *stat= us) =20 static bool parts_is_snan_frac(uint64_t frac, float_status *status) { -#ifdef NO_SIGNALING_NANS - return false; -#else - bool msb =3D extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1); - return msb =3D=3D snan_bit_is_one(status); -#endif + if (no_signaling_nans(status)) { + return false; + } else { + bool msb =3D extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1); + return msb =3D=3D snan_bit_is_one(status); + } } =20 /*------------------------------------------------------------------------= ---- @@ -170,9 +176,8 @@ static FloatParts parts_default_nan(float_status *statu= s) =20 static FloatParts parts_silence_nan(FloatParts a, float_status *status) { -#ifdef NO_SIGNALING_NANS - g_assert_not_reached(); -#elif defined(TARGET_HPPA) + g_assert(!no_signaling_nans(status)); +#if defined(TARGET_HPPA) a.frac &=3D ~(1ULL << (DECOMPOSED_BINARY_POINT - 1)); a.frac |=3D 1ULL << (DECOMPOSED_BINARY_POINT - 2); #else @@ -247,16 +252,16 @@ typedef struct { =20 bool float16_is_quiet_nan(float16 a_, float_status *status) { -#ifdef NO_SIGNALING_NANS - return float16_is_any_nan(a_); -#else - uint16_t a =3D float16_val(a_); - if (snan_bit_is_one(status)) { - return (((a >> 9) & 0x3F) =3D=3D 0x3E) && (a & 0x1FF); + if (no_signaling_nans(status)) { + return float16_is_any_nan(a_); } else { - return ((a & ~0x8000) >=3D 0x7C80); + uint16_t a =3D float16_val(a_); + if (snan_bit_is_one(status)) { + return (((a >> 9) & 0x3F) =3D=3D 0x3E) && (a & 0x1FF); + } else { + return ((a & ~0x8000) >=3D 0x7C80); + } } -#endif } =20 /*------------------------------------------------------------------------= ---- @@ -266,16 +271,16 @@ bool float16_is_quiet_nan(float16 a_, float_status *s= tatus) =20 bool float16_is_signaling_nan(float16 a_, float_status *status) { -#ifdef NO_SIGNALING_NANS - return 0; -#else - uint16_t a =3D float16_val(a_); - if (snan_bit_is_one(status)) { - return ((a & ~0x8000) >=3D 0x7C80); + if (no_signaling_nans(status)) { + return 0; } else { - return (((a >> 9) & 0x3F) =3D=3D 0x3E) && (a & 0x1FF); + uint16_t a =3D float16_val(a_); + if (snan_bit_is_one(status)) { + return ((a & ~0x8000) >=3D 0x7C80); + } else { + return (((a >> 9) & 0x3F) =3D=3D 0x3E) && (a & 0x1FF); + } } -#endif } =20 /*------------------------------------------------------------------------= ---- @@ -285,16 +290,16 @@ bool float16_is_signaling_nan(float16 a_, float_statu= s *status) =20 bool float32_is_quiet_nan(float32 a_, float_status *status) { -#ifdef NO_SIGNALING_NANS - return float32_is_any_nan(a_); -#else - uint32_t a =3D float32_val(a_); - if (snan_bit_is_one(status)) { - return (((a >> 22) & 0x1FF) =3D=3D 0x1FE) && (a & 0x003FFFFF); + if (no_signaling_nans(status)) { + return float32_is_any_nan(a_); } else { - return ((uint32_t)(a << 1) >=3D 0xFF800000); + uint32_t a =3D float32_val(a_); + if (snan_bit_is_one(status)) { + return (((a >> 22) & 0x1FF) =3D=3D 0x1FE) && (a & 0x003FFFFF); + } else { + return ((uint32_t)(a << 1) >=3D 0xFF800000); + } } -#endif } =20 /*------------------------------------------------------------------------= ---- @@ -304,16 +309,16 @@ bool float32_is_quiet_nan(float32 a_, float_status *s= tatus) =20 bool float32_is_signaling_nan(float32 a_, float_status *status) { -#ifdef NO_SIGNALING_NANS - return 0; -#else - uint32_t a =3D float32_val(a_); - if (snan_bit_is_one(status)) { - return ((uint32_t)(a << 1) >=3D 0xFF800000); + if (no_signaling_nans(status)) { + return 0; } else { - return (((a >> 22) & 0x1FF) =3D=3D 0x1FE) && (a & 0x003FFFFF); + uint32_t a =3D float32_val(a_); + if (snan_bit_is_one(status)) { + return ((uint32_t)(a << 1) >=3D 0xFF800000); + } else { + return (((a >> 22) & 0x1FF) =3D=3D 0x1FE) && (a & 0x003FFFFF); + } } -#endif } =20 /*------------------------------------------------------------------------= ---- @@ -639,17 +644,17 @@ static float32 propagateFloat32NaN(float32 a, float32= b, float_status *status) =20 bool float64_is_quiet_nan(float64 a_, float_status *status) { -#ifdef NO_SIGNALING_NANS - return float64_is_any_nan(a_); -#else - uint64_t a =3D float64_val(a_); - if (snan_bit_is_one(status)) { - return (((a >> 51) & 0xFFF) =3D=3D 0xFFE) - && (a & 0x0007FFFFFFFFFFFFULL); + if (no_signaling_nans(status)) { + return float64_is_any_nan(a_); } else { - return ((a << 1) >=3D 0xFFF0000000000000ULL); + uint64_t a =3D float64_val(a_); + if (snan_bit_is_one(status)) { + return (((a >> 51) & 0xFFF) =3D=3D 0xFFE) + && (a & 0x0007FFFFFFFFFFFFULL); + } else { + return ((a << 1) >=3D 0xFFF0000000000000ULL); + } } -#endif } =20 /*------------------------------------------------------------------------= ---- @@ -659,17 +664,17 @@ bool float64_is_quiet_nan(float64 a_, float_status *s= tatus) =20 bool float64_is_signaling_nan(float64 a_, float_status *status) { -#ifdef NO_SIGNALING_NANS - return 0; -#else - uint64_t a =3D float64_val(a_); - if (snan_bit_is_one(status)) { - return ((a << 1) >=3D 0xFFF0000000000000ULL); + if (no_signaling_nans(status)) { + return 0; } else { - return (((a >> 51) & 0xFFF) =3D=3D 0xFFE) - && (a & UINT64_C(0x0007FFFFFFFFFFFF)); + uint64_t a =3D float64_val(a_); + if (snan_bit_is_one(status)) { + return ((a << 1) >=3D 0xFFF0000000000000ULL); + } else { + return (((a >> 51) & 0xFFF) =3D=3D 0xFFE) + && (a & UINT64_C(0x0007FFFFFFFFFFFF)); + } } -#endif } =20 /*------------------------------------------------------------------------= ---- @@ -778,21 +783,21 @@ static float64 propagateFloat64NaN(float64 a, float64= b, float_status *status) =20 int floatx80_is_quiet_nan(floatx80 a, float_status *status) { -#ifdef NO_SIGNALING_NANS - return floatx80_is_any_nan(a); -#else - if (snan_bit_is_one(status)) { - uint64_t aLow; - - aLow =3D a.low & ~0x4000000000000000ULL; - return ((a.high & 0x7FFF) =3D=3D 0x7FFF) - && (aLow << 1) - && (a.low =3D=3D aLow); + if (no_signaling_nans(status)) { + return floatx80_is_any_nan(a); } else { - return ((a.high & 0x7FFF) =3D=3D 0x7FFF) - && (UINT64_C(0x8000000000000000) <=3D ((uint64_t)(a.low << 1))= ); + if (snan_bit_is_one(status)) { + uint64_t aLow; + + aLow =3D a.low & ~0x4000000000000000ULL; + return ((a.high & 0x7FFF) =3D=3D 0x7FFF) + && (aLow << 1) + && (a.low =3D=3D aLow); + } else { + return ((a.high & 0x7FFF) =3D=3D 0x7FFF) + && (UINT64_C(0x8000000000000000) <=3D ((uint64_t)(a.low <<= 1))); + } } -#endif } =20 /*------------------------------------------------------------------------= ---- @@ -803,21 +808,21 @@ int floatx80_is_quiet_nan(floatx80 a, float_status *s= tatus) =20 int floatx80_is_signaling_nan(floatx80 a, float_status *status) { -#ifdef NO_SIGNALING_NANS - return 0; -#else - if (snan_bit_is_one(status)) { - return ((a.high & 0x7FFF) =3D=3D 0x7FFF) - && ((a.low << 1) >=3D 0x8000000000000000ULL); + if (no_signaling_nans(status)) { + return 0; } else { - uint64_t aLow; + if (snan_bit_is_one(status)) { + return ((a.high & 0x7FFF) =3D=3D 0x7FFF) + && ((a.low << 1) >=3D 0x8000000000000000ULL); + } else { + uint64_t aLow; =20 - aLow =3D a.low & ~UINT64_C(0x4000000000000000); - return ((a.high & 0x7FFF) =3D=3D 0x7FFF) - && (uint64_t)(aLow << 1) - && (a.low =3D=3D aLow); + aLow =3D a.low & ~UINT64_C(0x4000000000000000); + return ((a.high & 0x7FFF) =3D=3D 0x7FFF) + && (uint64_t)(aLow << 1) + && (a.low =3D=3D aLow); + } } -#endif } =20 /*------------------------------------------------------------------------= ---- @@ -941,17 +946,17 @@ floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b,= float_status *status) =20 bool float128_is_quiet_nan(float128 a, float_status *status) { -#ifdef NO_SIGNALING_NANS - return float128_is_any_nan(a); -#else - if (snan_bit_is_one(status)) { - return (((a.high >> 47) & 0xFFFF) =3D=3D 0xFFFE) - && (a.low || (a.high & 0x00007FFFFFFFFFFFULL)); + if (no_signaling_nans(status)) { + return float128_is_any_nan(a); } else { - return ((a.high << 1) >=3D 0xFFFF000000000000ULL) - && (a.low || (a.high & 0x0000FFFFFFFFFFFFULL)); + if (snan_bit_is_one(status)) { + return (((a.high >> 47) & 0xFFFF) =3D=3D 0xFFFE) + && (a.low || (a.high & 0x00007FFFFFFFFFFFULL)); + } else { + return ((a.high << 1) >=3D 0xFFFF000000000000ULL) + && (a.low || (a.high & 0x0000FFFFFFFFFFFFULL)); + } } -#endif } =20 /*------------------------------------------------------------------------= ---- @@ -961,17 +966,17 @@ bool float128_is_quiet_nan(float128 a, float_status *= status) =20 bool float128_is_signaling_nan(float128 a, float_status *status) { -#ifdef NO_SIGNALING_NANS - return 0; -#else - if (snan_bit_is_one(status)) { - return ((a.high << 1) >=3D 0xFFFF000000000000ULL) - && (a.low || (a.high & 0x0000FFFFFFFFFFFFULL)); + if (no_signaling_nans(status)) { + return 0; } else { - return (((a.high >> 47) & 0xFFFF) =3D=3D 0xFFFE) - && (a.low || (a.high & UINT64_C(0x00007FFFFFFFFFFF))); + if (snan_bit_is_one(status)) { + return ((a.high << 1) >=3D 0xFFFF000000000000ULL) + && (a.low || (a.high & 0x0000FFFFFFFFFFFFULL)); + } else { + return (((a.high >> 47) & 0xFFFF) =3D=3D 0xFFFE) + && (a.low || (a.high & UINT64_C(0x00007FFFFFFFFFFF))); + } } -#endif } =20 /*------------------------------------------------------------------------= ---- @@ -981,16 +986,16 @@ bool float128_is_signaling_nan(float128 a, float_stat= us *status) =20 float128 float128_silence_nan(float128 a, float_status *status) { -#ifdef NO_SIGNALING_NANS - g_assert_not_reached(); -#else - if (snan_bit_is_one(status)) { - return float128_default_nan(status); + if (no_signaling_nans(status)) { + g_assert_not_reached(); } else { - a.high |=3D UINT64_C(0x0000800000000000); - return a; + if (snan_bit_is_one(status)) { + return float128_default_nan(status); + } else { + a.high |=3D UINT64_C(0x0000800000000000); + return a; + } } -#endif } =20 /*------------------------------------------------------------------------= ---- diff --git a/include/fpu/softfloat-helpers.h b/include/fpu/softfloat-helper= s.h index 735ed6b653ee..e842f83a1285 100644 --- a/include/fpu/softfloat-helpers.h +++ b/include/fpu/softfloat-helpers.h @@ -95,6 +95,11 @@ static inline void set_snan_bit_is_one(bool val, float_s= tatus *status) status->snan_bit_is_one =3D val; } =20 +static inline void set_no_signaling_nans(bool val, float_status *status) +{ + status->no_signaling_nans =3D val; +} + static inline bool get_float_detect_tininess(float_status *status) { return status->tininess_before_rounding; diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 7680193ebc1c..d6f167c1b0c4 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -165,8 +165,13 @@ typedef struct float_status { /* should denormalised inputs go to zero and set the input_denormal fl= ag? */ bool flush_inputs_to_zero; bool default_nan_mode; - /* not always used -- see snan_bit_is_one() in softfloat-specialize.h = */ + /* + * The flags below are not used on all specializations and may + * constant fold away (see snan_bit_is_one()/no_signalling_nans() in + * softfloat-specialize.inc.c) + */ bool snan_bit_is_one; + bool no_signaling_nans; } float_status; =20 #endif /* SOFTFLOAT_TYPES_H */ --=20 2.20.1