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[217.232.54.84]) by smtp.gmail.com with ESMTPSA id bq8sm10941776ejb.103.2020.07.05.07.03.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jul 2020 07:03:31 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jkC0aolhlj6RcBhlvFE2t0bB5Yx6UH76eFCh011rLYA=; b=GBHJTy2djowMvBrxecy2w64DCX+z/pvo/jO+/UPcL6moSloMj6ZlRqMnPQ8IoPUrCX ibxEg0ofgVA3IIi3F/pSCt9HE3X902gbHqoVhQO1YguecvJOYqkDhzj4nkLEs64NxDK0 bng3xuPlYCaEd5W1kx4AG2270Q1FaSW9JSWo7RWfJMlsSSr0hCb8dwOyguKz8g05iWSj gCotcl7atlUBhVqY6uTnp5JxizAKX+YLWcWzPJijd5IMHOSkhNzsIG5tLh8hBicfjGhq 6vOsn4/zpoFtEEYWcuAGkXmFJUp3RG7lSpnbgqWrwi+b95iOakRXLFUNzkTJYk6x5DZ5 +BJA== X-Gm-Message-State: AOAM531Q6IYxQqb7/bukwNDMGXsWN3l9ZBjdDixUJ3yp1IuLn+vBbuLr hA00rGdUR+yNyrobrb+X4eGKtWtP X-Google-Smtp-Source: ABdhPJwiH7tkO/RIWTy2nMophv9qlKkACO37EyOVyxU86bFk0rwm8Ea+xaLRz/s+LKvvtN8VMmggyw== X-Received: by 2002:a17:906:f202:: with SMTP id gt2mr39443768ejb.70.1593957812297; Sun, 05 Jul 2020 07:03:32 -0700 (PDT) From: Thomas Huth To: qemu-devel@nongnu.org, Michael Rolnik , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH rc6 05/30] target/avr: CPU class: Add migration support Date: Sun, 5 Jul 2020 16:02:50 +0200 Message-Id: <20200705140315.260514-6-huth@tuxfamily.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200705140315.260514-1-huth@tuxfamily.org> References: <20200705140315.260514-1-huth@tuxfamily.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=209.85.218.51; envelope-from=th.huth@gmail.com; helo=mail-ej1-f51.google.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/05 10:03:32 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: 1 X-Spam_score: 0.1 X-Spam_bar: / X-Spam_report: (0.1 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=1, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sarah Harris Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" From: Michael Rolnik Add migration-related functions of AVR CPU class object. [AM: Split a larger AVR introduction patch into logical units] Suggested-by: Aleksandar Markovic Co-developed-by: Michael Rolnik Co-developed-by: Sarah Harris Signed-off-by: Michael Rolnik Signed-off-by: Sarah Harris Signed-off-by: Richard Henderson Signed-off-by: Aleksandar Markovic Acked-by: Igor Mammedov Tested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Thomas Huth --- target/avr/cpu.c | 1 + target/avr/cpu.h | 2 + target/avr/machine.c | 121 +++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 124 insertions(+) create mode 100644 target/avr/machine.c diff --git a/target/avr/cpu.c b/target/avr/cpu.c index a1d5f3c1eb..ced1107824 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -206,6 +206,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *d= ata) cc->memory_rw_debug =3D avr_cpu_memory_rw_debug; cc->get_phys_page_debug =3D avr_cpu_get_phys_page_debug; cc->tlb_fill =3D avr_cpu_tlb_fill; + cc->vmsd =3D &vms_avr_cpu; cc->disas_set_info =3D avr_cpu_disas_set_info; cc->tcg_initialize =3D avr_cpu_tcg_init; cc->synchronize_from_tb =3D avr_cpu_synchronize_from_tb; diff --git a/target/avr/cpu.h b/target/avr/cpu.h index ac14e642bf..d3003f8e25 100644 --- a/target/avr/cpu.h +++ b/target/avr/cpu.h @@ -118,6 +118,8 @@ typedef struct AVRCPU { CPUAVRState env; } AVRCPU; =20 +extern const struct VMStateDescription vms_avr_cpu; + void avr_cpu_do_interrupt(CPUState *cpu); bool avr_cpu_exec_interrupt(CPUState *cpu, int int_req); hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); diff --git a/target/avr/machine.c b/target/avr/machine.c new file mode 100644 index 0000000000..ba44bd042b --- /dev/null +++ b/target/avr/machine.c @@ -0,0 +1,121 @@ +/* + * QEMU AVR CPU + * + * Copyright (c) 2019 Michael Rolnik + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see + * + */ + +#include "qemu/osdep.h" +#include "cpu.h" +#include "migration/cpu.h" + +static int get_sreg(QEMUFile *f, void *opaque, size_t size, + const VMStateField *field) +{ + CPUAVRState *env =3D opaque; + uint8_t sreg; + + sreg =3D qemu_get_byte(f); + cpu_set_sreg(env, sreg); + return 0; +} + +static int put_sreg( + QEMUFile *f, void *opaque, size_t size, + const VMStateField *field, QJSON *vmdesc) +{ + CPUAVRState *env =3D opaque; + uint8_t sreg =3D cpu_get_sreg(env); + + qemu_put_byte(f, sreg); + return 0; +} + +static const VMStateInfo vms_sreg =3D { + .name =3D "sreg", + .get =3D get_sreg, + .put =3D put_sreg, +}; + +static int get_segment( + QEMUFile *f, void *opaque, size_t size, const VMStateField *field) +{ + uint32_t *ramp =3D opaque; + uint8_t temp; + + temp =3D qemu_get_byte(f); + *ramp =3D ((uint32_t)temp) << 16; + return 0; +} + +static int put_segment( + QEMUFile *f, void *opaque, size_t size, + const VMStateField *field, QJSON *vmdesc) +{ + uint32_t *ramp =3D opaque; + uint8_t temp =3D *ramp >> 16; + + qemu_put_byte(f, temp); + return 0; +} + +static const VMStateInfo vms_rampD =3D { + .name =3D "rampD", + .get =3D get_segment, + .put =3D put_segment, +}; +static const VMStateInfo vms_rampX =3D { + .name =3D "rampX", + .get =3D get_segment, + .put =3D put_segment, +}; +static const VMStateInfo vms_rampY =3D { + .name =3D "rampY", + .get =3D get_segment, + .put =3D put_segment, +}; +static const VMStateInfo vms_rampZ =3D { + .name =3D "rampZ", + .get =3D get_segment, + .put =3D put_segment, +}; +static const VMStateInfo vms_eind =3D { + .name =3D "eind", + .get =3D get_segment, + .put =3D put_segment, +}; + +const VMStateDescription vms_avr_cpu =3D { + .name =3D "cpu", + .version_id =3D 0, + .minimum_version_id =3D 0, + .fields =3D (VMStateField[]) { + VMSTATE_UINT32(env.pc_w, AVRCPU), + VMSTATE_UINT32(env.sp, AVRCPU), + VMSTATE_UINT32(env.skip, AVRCPU), + + VMSTATE_UINT32_ARRAY(env.r, AVRCPU, NUMBER_OF_CPU_REGISTERS), + + VMSTATE_SINGLE(env, AVRCPU, 0, vms_sreg, CPUAVRState), + VMSTATE_SINGLE(env.rampD, AVRCPU, 0, vms_rampD, uint32_t), + VMSTATE_SINGLE(env.rampX, AVRCPU, 0, vms_rampX, uint32_t), + VMSTATE_SINGLE(env.rampY, AVRCPU, 0, vms_rampY, uint32_t), + VMSTATE_SINGLE(env.rampZ, AVRCPU, 0, vms_rampZ, uint32_t), + VMSTATE_SINGLE(env.eind, AVRCPU, 0, vms_eind, uint32_t), + + VMSTATE_END_OF_LIST() + } +}; --=20 2.26.2