From nobody Fri Dec 19 19:07:26 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1593511661; cv=none; d=zohomail.com; s=zohoarc; b=nQl2JeQT2ckx6Modali+y5CAQNKCKDizIMu4cjyvPCYOUPW21HhCZwdEQPweqQWrIlGpVLKsBb0OsbA12YpfL3w4GF4JG5L6Aj9dvfBVPTq5O2tksOVKu8Z9Aie5dJ9zYzcjZ5J8d+8Rfy80BTTF4oiM7QlrhNhoaD6vmpr3sLk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1593511661; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=n6kTl7vh239l80gg3Z02wO0nmw3KEYISPKOO1WVAiZI=; b=m1LJGFRRGCiZF9AhkTRr2GT65PfoxvPySgvqpnvJXSb9UOxO6N7cBehv17f63zWTPqf9n4JtAarASVYBXIlrtG8cwXT30CbBBFyWc2liN2L6/hoSqfV++gWQxBEbSps5c7NI2ot2WDHgtW+EE1JrdKWuIAy8qlAhewq2NbmOfKQ= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 15935116619026.3974381931373046; Tue, 30 Jun 2020 03:07:41 -0700 (PDT) Received: from localhost ([::1]:45872 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jqDAy-0008Qm-LQ for importer@patchew.org; Tue, 30 Jun 2020 06:07:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58018) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jqD5h-0007pV-Gy; Tue, 30 Jun 2020 06:02:13 -0400 Received: from charlie.dont.surf ([128.199.63.193]:47608) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jqD5T-0004K0-1n; Tue, 30 Jun 2020 06:02:13 -0400 Received: from apples.local (80-167-98-190-cable.dk.customer.tdc.net [80.167.98.190]) by charlie.dont.surf (Postfix) with ESMTPSA id BA508BF7F2; Tue, 30 Jun 2020 10:01:55 +0000 (UTC) From: Klaus Jensen To: qemu-block@nongnu.org Subject: [PATCH 06/10] hw/block/nvme: add the zone append command Date: Tue, 30 Jun 2020 12:01:35 +0200 Message-Id: <20200630100139.1483002-7-its@irrelevant.dk> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200630100139.1483002-1-its@irrelevant.dk> References: <20200630100139.1483002-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=128.199.63.193; envelope-from=its@irrelevant.dk; helo=charlie.dont.surf X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/30 04:46:49 X-ACL-Warn: Detected OS = Linux 3.11 and newer [fuzzy] X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Niklas Cassel , Damien Le Moal , Dmitry Fomichev , Klaus Jensen , qemu-devel@nongnu.org, Max Reitz , Klaus Jensen , Keith Busch , Javier Gonzalez , Maxim Levitsky , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Matias Bjorling Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Add the Zone Append command. Signed-off-by: Klaus Jensen --- hw/block/nvme.c | 106 ++++++++++++++++++++++++++++++++++++++++++ hw/block/nvme.h | 3 ++ hw/block/trace-events | 2 + 3 files changed, 111 insertions(+) diff --git a/hw/block/nvme.c b/hw/block/nvme.c index a4527ad9840e..6b394d374c8e 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -1294,6 +1294,12 @@ static void nvme_aio_zone_reset_cb(NvmeAIO *aio, voi= d *opaque, int ret) } } =20 +static void nvme_zone_append_cb(NvmeRequest *req, void *opaque) +{ + trace_pci_nvme_zone_append_cb(nvme_cid(req), le64_to_cpu(req->cqe.qw0)= ); + nvme_rw_cb(req, opaque); +} + static void nvme_aio_cb(void *opaque, int ret) { NvmeAIO *aio =3D opaque; @@ -1424,6 +1430,104 @@ static uint16_t nvme_flush(NvmeCtrl *n, NvmeRequest= *req) return NVME_NO_COMPLETE; } =20 +static uint16_t nvme_do_zone_append(NvmeCtrl *n, NvmeRequest *req, + NvmeZone *zone) +{ + NvmeAIO *aio; + NvmeNamespace *ns =3D req->ns; + + uint64_t zslba =3D nvme_zslba(zone); + uint64_t wp =3D zone->wp_staging; + + size_t len; + uint16_t status; + + req->cqe.qw0 =3D cpu_to_le64(wp); + req->slba =3D wp; + + len =3D req->nlb << nvme_ns_lbads(ns); + + trace_pci_nvme_zone_append(nvme_cid(req), zslba, wp, req->nlb); + + status =3D nvme_check_rw(n, req); + if (status) { + goto invalid; + } + + status =3D nvme_check_zone_write(n, req->slba, req->nlb, req, zone); + if (status) { + goto invalid; + } + + switch (nvme_zs(zone)) { + case NVME_ZS_ZSE: + case NVME_ZS_ZSC: + nvme_zs_set(zone, NVME_ZS_ZSIO); + default: + break; + } + + status =3D nvme_map(n, len, req); + if (status) { + goto invalid; + } + + aio =3D g_new0(NvmeAIO, 1); + *aio =3D (NvmeAIO) { + .opc =3D NVME_AIO_OPC_WRITE, + .blk =3D ns->blk, + .offset =3D req->slba << nvme_ns_lbads(ns), + .req =3D req, + .cb =3D nvme_aio_zone_write_cb, + .cb_arg =3D zone, + }; + + if (req->qsg.sg) { + aio->len =3D req->qsg.size; + aio->flags |=3D NVME_AIO_DMA; + } else { + aio->len =3D req->iov.size; + } + + nvme_req_add_aio(req, aio); + nvme_req_set_cb(req, nvme_zone_append_cb, zone); + + zone->wp_staging +=3D req->nlb; + + return NVME_NO_COMPLETE; + +invalid: + block_acct_invalid(blk_get_stats(ns->blk), BLOCK_ACCT_WRITE); + return status; +} + +static uint16_t nvme_zone_append(NvmeCtrl *n, NvmeRequest *req) +{ + NvmeZone *zone; + NvmeZoneAppendCmd *zappend =3D (NvmeZoneAppendCmd *) &req->cmd; + NvmeNamespace *ns =3D req->ns; + uint64_t zslba =3D le64_to_cpu(zappend->zslba); + + if (!nvme_ns_zoned(ns)) { + return NVME_INVALID_OPCODE | NVME_DNR; + } + + if (zslba & (nvme_ns_zsze(ns) - 1)) { + trace_pci_nvme_err_invalid_zslba(nvme_cid(req), zslba); + return NVME_INVALID_FIELD | NVME_DNR; + } + + req->nlb =3D le16_to_cpu(zappend->nlb) + 1; + + zone =3D nvme_ns_get_zone(ns, zslba); + if (!zone) { + trace_pci_nvme_err_invalid_zone(nvme_cid(req), req->slba); + return NVME_INVALID_FIELD | NVME_DNR; + } + + return nvme_do_zone_append(n, req, zone); +} + static uint16_t nvme_zone_mgmt_send_close(NvmeCtrl *n, NvmeRequest *req, NvmeZone *zone) { @@ -2142,6 +2246,8 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest = *req) return nvme_zone_mgmt_send(n, req); case NVME_CMD_ZONE_MGMT_RECV: return nvme_zone_mgmt_recv(n, req); + case NVME_CMD_ZONE_APPEND: + return nvme_zone_append(n, req); default: trace_pci_nvme_err_invalid_opc(req->cmd.opcode); return NVME_INVALID_OPCODE | NVME_DNR; diff --git a/hw/block/nvme.h b/hw/block/nvme.h index 757277d339bf..6b4eb0098450 100644 --- a/hw/block/nvme.h +++ b/hw/block/nvme.h @@ -53,6 +53,8 @@ static const NvmeEffectsLog nvme_effects[] =3D { [NVME_CMD_ZONE_MGMT_RECV] =3D NVME_EFFECTS_CSUPP, [NVME_CMD_ZONE_MGMT_SEND] =3D NVME_EFFECTS_CSUPP | NVME_EFFECTS_LBCC, + [NVME_CMD_ZONE_APPEND] =3D NVME_EFFECTS_CSUPP | + NVME_EFFECTS_LBCC, } }, }; @@ -177,6 +179,7 @@ static inline bool nvme_req_is_write(NvmeRequest *req) switch (req->cmd.opcode) { case NVME_CMD_WRITE: case NVME_CMD_WRITE_ZEROES: + case NVME_CMD_ZONE_APPEND: return true; default: return false; diff --git a/hw/block/trace-events b/hw/block/trace-events index 1da48d1c29d0..0dfc6e22008e 100644 --- a/hw/block/trace-events +++ b/hw/block/trace-events @@ -50,6 +50,8 @@ pci_nvme_admin_cmd(uint16_t cid, uint16_t sqid, uint8_t o= pcode) "cid %"PRIu16" s pci_nvme_rw(uint16_t cid, const char *verb, uint32_t nsid, uint32_t nlb, u= int64_t count, uint64_t lba) "cid %"PRIu16" %s nsid %"PRIu32" nlb %"PRIu32"= count %"PRIu64" lba 0x%"PRIx64"" pci_nvme_rw_cb(uint16_t cid, uint32_t nsid) "cid %"PRIu16" nsid %"PRIu32"" pci_nvme_write_zeroes(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t= nlb) "cid %"PRIu16" nsid %"PRIu32" slba %"PRIu64" nlb %"PRIu32"" +pci_nvme_zone_append(uint16_t cid, uint64_t zslba, uint64_t wp, uint16_t n= lb) "cid %"PRIu16" zslba 0x%"PRIx64" wp 0x%"PRIx64" nlb %"PRIu16"" +pci_nvme_zone_append_cb(uint16_t cid, uint64_t slba) "cid %"PRIu16" slba 0= x%"PRIx64"" pci_nvme_zone_mgmt_send(uint16_t cid, uint32_t nsid, uint64_t zslba, uint8= _t zsa, uint8_t zsflags) "cid %"PRIu16" nsid %"PRIu32" zslba 0x%"PRIx64" zs= a 0x%"PRIx8" zsflags 0x%"PRIx8"" pci_nvme_zone_mgmt_send_all(uint16_t cid, uint32_t nsid, uint8_t za) "cid = %"PRIu16" nsid %"PRIu32" za 0x%"PRIx8"" pci_nvme_zone_mgmt_send_close(uint16_t cid, uint32_t nsid, uint64_t zslba,= const char *zc) "cid %"PRIu16" nsid %"PRIu32" zslba 0x%"PRIx64" zc \"%s\"" --=20 2.27.0