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[174.21.143.238]) by smtp.gmail.com with ESMTPSA id p12sm17927642pfq.69.2020.06.23.12.37.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Jun 2020 12:37:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=drS4gTiWZxC3Kosp8AvXNBkFhO1l78w6MG//p420qaQ=; b=tsjgXD6fZTateWW5KZKXQRLhJ/Gs65xk/vXMZ4Qs+qqFj0C5SnrNjoRRbMSZUmDNCV jbFLS1wSE93UWfv2XcCrwO/jekmD8RBDPtw7d5aFsknC3ABqqAxSih7iDN0QHOGOJVXg K/jH3PD2MrDbWthdeqeTx5GlNVZhe4fNasidrTEg6DsQuozVxkY/dySzWj+yCAVWKgL9 8F6F1ND2IFCAmAanrnJN1pYFWcUHXoP4Ehl+k38gWa5bWc7dfJlt0eU9STtk452STKkl O/E2DGA09Y00XaF3OPNXxGP+AljE86Y3/BzP8U1QoUY0RPLidFolRD38owxXvgbJ3gFZ 4dFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=drS4gTiWZxC3Kosp8AvXNBkFhO1l78w6MG//p420qaQ=; b=YWvwhISEklRl/TgfF08pcy6tWthtLXEpN5bMin34P1liXB99aW6b5thWTB4B2GSvmO PUotTsaxjy1Are7E1OlL44p7drqaeQa+dqMMaBTQ1uB/Dv00p9sobc8yqanEImlg0xXD 57NfpGyZYf/Q54zW5vlV0kUz4P6XZZYxzn0vygjwuUCKjfzVSQBDxleMOG8mA9JHXyZ8 cT+yfDZYDjIXCofzUKdEiyWPZUA4GEIFqePaFpZhtwDyUNS4qL9kFvsYp0QQJLq9Q3TJ Kz640MrJkk3OBaYvekMxACPWlVSMV5S2EpyxQe6WfC2ueELu+gfiwfFXUeAv937RVon8 vz+g== X-Gm-Message-State: AOAM530UQN2Ms36HaRCVKDwHjjCCtvd6RxM+KJUlusUZ5yaagTViUqAR 3efkTmx128Y2hRunDdLyadWgmyO5LXQ= X-Google-Smtp-Source: ABdhPJzZ/SK3w235FH2HfMUaNK5fudUkt9q3N6hdVRKxG8rI/wyUxrKp5jLfJ3G9fzCJ0Kh6zJewHQ== X-Received: by 2002:a62:cf01:: with SMTP id b1mr25307278pfg.84.1592941039233; Tue, 23 Jun 2020 12:37:19 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v8 14/45] target/arm: Define arm_cpu_do_unaligned_access for user-only Date: Tue, 23 Jun 2020 12:36:27 -0700 Message-Id: <20200623193658.623279-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200623193658.623279-1-richard.henderson@linaro.org> References: <20200623193658.623279-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::542; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x542.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, david.spickett@linaro.org, steplong@quicinc.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Use the same code as system mode, so that we generate the same exception + syndrome for the unaligned access. For the moment, if MTE is enabled so that this path is reachable, this would generate a SIGSEGV in the user-only cpu_loop. Decoding the syndrome to produce the proper SIGBUS will be done later. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- v8: Raise the normal data exception + syndrome. --- target/arm/cpu.c | 2 +- target/arm/tlb_helper.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 5b7a36b5d7..10677c0c23 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2169,8 +2169,8 @@ static void arm_cpu_class_init(ObjectClass *oc, void = *data) cc->tlb_fill =3D arm_cpu_tlb_fill; cc->debug_excp_handler =3D arm_debug_excp_handler; cc->debug_check_watchpoint =3D arm_debug_check_watchpoint; -#if !defined(CONFIG_USER_ONLY) cc->do_unaligned_access =3D arm_cpu_do_unaligned_access; +#if !defined(CONFIG_USER_ONLY) cc->do_transaction_failed =3D arm_cpu_do_transaction_failed; cc->adjust_watchpoint_address =3D arm_adjust_watchpoint_address; #endif /* CONFIG_TCG && !CONFIG_USER_ONLY */ diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c index 7388494a55..522a6442a4 100644 --- a/target/arm/tlb_helper.c +++ b/target/arm/tlb_helper.c @@ -10,8 +10,6 @@ #include "internals.h" #include "exec/exec-all.h" =20 -#if !defined(CONFIG_USER_ONLY) - static inline uint32_t merge_syn_data_abort(uint32_t template_syn, unsigned int target_el, bool same_el, bool ea, @@ -122,6 +120,8 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr va= ddr, arm_deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi); } =20 +#if !defined(CONFIG_USER_ONLY) + /* * arm_cpu_do_transaction_failed: handle a memory system error response * (eg "no device/memory present at address") by raising an external abort --=20 2.25.1