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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::344; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x344.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , richard.henderson@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) OP_SIGILL means we have an unexpected invalid operation. If this is a load or store the register state may be un-rectified pointing at the memblock so would be invalid. In this case just compare the PC and make sure the other end also faulted at the same place. Signed-off-by: Alex Benn=C3=A9e --- risu.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/risu.c b/risu.c index 8d907d9..6d6dcf9 100644 --- a/risu.c +++ b/risu.c @@ -124,7 +124,6 @@ static RisuResult send_register_info(void *uc) switch (op) { case OP_TESTEND: case OP_COMPARE: - case OP_SIGILL: header.size =3D reginfo_size(&ri[MASTER]); extra =3D &ri[MASTER]; break; @@ -132,6 +131,7 @@ static RisuResult send_register_info(void *uc) header.size =3D MEMBLOCKLEN; extra =3D memblock; break; + case OP_SIGILL: case OP_SETMEMBLOCK: case OP_GETMEMBLOCK: header.size =3D 0; @@ -203,7 +203,6 @@ static RisuResult recv_register_info(struct reginfo *ri) switch (header.risu_op) { case OP_COMPARE: case OP_TESTEND: - case OP_SIGILL: /* If we can't store the data, report invalid size. */ if (header.size > sizeof(*ri)) { return RES_BAD_SIZE; @@ -223,6 +222,7 @@ static RisuResult recv_register_info(struct reginfo *ri) respond(RES_OK); return read_buffer(other_memblock, MEMBLOCKLEN); =20 + case OP_SIGILL: case OP_SETMEMBLOCK: case OP_GETMEMBLOCK: return header.size =3D=3D 0 ? RES_OK : RES_BAD_SIZE; @@ -250,7 +250,6 @@ static RisuResult recv_and_compare_register_info(void *= uc) switch (op) { case OP_COMPARE: case OP_TESTEND: - case OP_SIGILL: /* * If we have nothing to compare against, report an op mismatch. * Otherwise allow the compare to continue, and assume that @@ -270,7 +269,14 @@ static RisuResult recv_and_compare_register_info(void = *uc) res =3D RES_END; } break; - + case OP_SIGILL: + /* We can only check the op and PC */ + if (header.risu_op !=3D OP_SIGILL) { + res =3D RES_MISMATCH_OP; + } else if (header.pc !=3D get_pc(&ri[APPRENTICE])) { + res =3D RES_MISMATCH_REG; + } + break; case OP_SETMEMBLOCK: if (op !=3D header.risu_op) { res =3D RES_MISMATCH_OP; --=20 2.20.1