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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id m10sm4022177wru.4.2020.06.23.04.39.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Jun 2020 04:39:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=tymhxqXyDEbTmZSCGO7IT18a7NBET9izMcg9/EiMo9E=; b=t2hG5wLJmwiFTv1+8/9HxuTVTuSw4TFMViTVZsuP3FQ06IV/GQMnfku0xpeQFhKcv3 KePEoPpMx8BXp9LkOnGeGP5tI85KBAFgxTq2uoxg8XHNIOtbFjnzC1/XoIxozuDNb42/ LEWE+DjFh7AlJycaG3rGxG3FRijbCgDck9JInmyfsh+fGs43DhLqwtZZhMFzgJviZgcw 1DuTgaXbnm+LWPI2rEPieTqkbaNIUEi85wVrkvuFvOzGO3bUe9SMnuz+gBjVLree6jHX Sq1SOplAwJl54KBZxkNrZOmeZG5+ahxs+D898RAJWS+lB/JqCfDFebm1hzcH17lmEq1Q uqNg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tymhxqXyDEbTmZSCGO7IT18a7NBET9izMcg9/EiMo9E=; b=YjqJgFc6hbwQfB9IDrVAJY7CoacotVmHNUz7VrQIbaAANiS/qqcXtKG2WxzvVPovqQ QZ8sHR3Apa3LTCBc+Hbc+Ij3oT++nYNcIfcJs7NSGlXI/6PeLWrwdM4vlVn+mTT9DZe3 stiLybN613My9tHAePFA8hAhNGkNx8XjxQdV5fv3O9vDZMwq7YmW/muaLaTe7BqxYj3A lRgKg5/dEuO7ndqWA34U0tsDuqV2rjKov52xoKh7DhJKWWPviaAIt/HGD0iNSwo9wkMI mA+eGC/bfK0TsPczW37NBGyVzc9QI6scBR+9xOGfzwOSzPauZgVHgRUvT3UbG4GiQJtw SdjQ== X-Gm-Message-State: AOAM531RqNp2EKtJkRpkDfHVJA/JgT2rg/080ZVcQCJawLhrVK3wraOg EPl160YeaRd3WlSzoUmUB7EvaUUudBDPgw== X-Google-Smtp-Source: ABdhPJxzlJjKAbo6zi/DzFBbfcdCVbcBltvlY//tPm/iANFqS/zlz2/9hqhs8LOTRTueeJLpPAzUOw== X-Received: by 2002:a05:600c:410f:: with SMTP id j15mr535731wmi.128.1592912387885; Tue, 23 Jun 2020 04:39:47 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 36/42] hw/arm/mps2: Add SPI devices Date: Tue, 23 Jun 2020 12:38:58 +0100 Message-Id: <20200623113904.28805-37-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200623113904.28805-1-peter.maydell@linaro.org> References: <20200623113904.28805-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x329.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 From 'Application Note AN385', chapter 3.9, SPI: The SMM implements five PL022 SPI modules. Two pairs of modules share the same OR-gated IRQ. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20200617072539.32686-12-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/mps2.c | 24 ++++++++++++++++++++++++ hw/arm/Kconfig | 6 +++--- 2 files changed, 27 insertions(+), 3 deletions(-) diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index e1061232254..daa26f68d79 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -39,6 +39,7 @@ #include "hw/timer/cmsdk-apb-dualtimer.h" #include "hw/misc/mps2-scc.h" #include "hw/misc/mps2-fpgaio.h" +#include "hw/ssi/pl022.h" #include "hw/net/lan9118.h" #include "net/net.h" #include "hw/watchdog/cmsdk-apb-watchdog.h" @@ -341,6 +342,29 @@ static void mps2_common_init(MachineState *machine) qdev_prop_set_uint32(DEVICE(&mms->fpgaio), "prescale-clk", 25000000); sysbus_realize(SYS_BUS_DEVICE(&mms->fpgaio), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&mms->fpgaio), 0, 0x40028000); + sysbus_create_simple(TYPE_PL022, 0x40025000, /* External ADC */ + qdev_get_gpio_in(armv7m, 22)); + for (i =3D 0; i < 2; i++) { + static const int spi_irqno[] =3D {11, 24}; + static const hwaddr spibase[] =3D {0x40020000, /* APB */ + 0x40021000, /* LCD */ + 0x40026000, /* Shield0 */ + 0x40027000}; /* Shield1 */ + DeviceState *orgate_dev; + Object *orgate; + int j; + + orgate =3D object_new(TYPE_OR_IRQ); + object_property_set_int(orgate, 2, "num-lines", &error_fatal); + orgate_dev =3D DEVICE(orgate); + qdev_realize(orgate_dev, NULL, &error_fatal); + qdev_connect_gpio_out(orgate_dev, 0, + qdev_get_gpio_in(armv7m, spi_irqno[i])); + for (j =3D 0; j < 2; j++) { + sysbus_create_simple(TYPE_PL022, spibase[2 * i + j], + qdev_get_gpio_in(orgate_dev, j)); + } + } =20 /* In hardware this is a LAN9220; the LAN9118 is software compatible * except that it doesn't support the checksum-offload feature. diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 5c8f689b3dd..90ed584e7ac 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -59,7 +59,7 @@ config HIGHBANK select ARM_TIMER # sp804 select ARM_V7M select PL011 # UART - select PL022 # Serial port + select PL022 # SPI select PL031 # RTC select PL061 # GPIO select PL310 # cache controller @@ -222,7 +222,7 @@ config STELLARIS select CMSDK_APB_WATCHDOG select I2C select PL011 # UART - select PL022 # Serial port + select PL022 # SPI select PL061 # GPIO select SSD0303 # OLED display select SSD0323 # OLED display @@ -401,7 +401,7 @@ config MPS2 select MPS2_FPGAIO select MPS2_SCC select OR_IRQ - select PL022 # Serial port + select PL022 # SPI select PL080 # DMA controller select SPLIT_IRQ select UNIMP --=20 2.20.1