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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id z12sm31090851wrg.9.2020.06.16.02.57.25 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2020 02:57:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=p0X61Okm864TSGJKiLA/ZVrs/QLhGGy8X0m3f0p9S/o=; b=vdRptSFG1ccjWwuJ0FLHubTpMzSA8yi2iofd9f8IXGlT9eXD6Oa29LB2oQE/yeAYQF kLVpiVNczsd1tpDpKpurkh/lULnw/gYYedxNklWhnqYDVMmSwmLMZWNUUftKCgcR5gfy pUyxt1n76mx65Jp7wm/zIfs9PXVDh3YMAVLGNyYNXEUUGgUjiY0cwYO/jbMLJt7XE9X3 StWAcSDW6DKGzo9lZfKIclb3boLWs1gGWIRDMbITY6+0hB8CSiAZJjtJAkxTIXS3xcYh Czcf+uZQwHurIfIXshFqjXtT1cWXYKD64HZ1lLlhlY9bT+grRFSxuz8jtQJJ3fmwCoVJ xY0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=p0X61Okm864TSGJKiLA/ZVrs/QLhGGy8X0m3f0p9S/o=; b=WGdBgibXcPhNPalV4rHNLOADfYwb6GRIEd97urSdh+hKhZkZR+2ujzx13S6wgQylsv Y7uy7J7vYJxwWsz4glhcY66KKbUSjpSzoVysS83Tzrb6KRy+938Is4TnyCAQR/692VpD LzMf+0eD+bwQABFV8T43U4gKkGszUmPH5+YjVuopC/5DMJoI/iE3QkHxWupoLx/JM50o MlbcjP6z8GIFkSpNWkRR4qCSZToSXqLKSAcDjf3O/HuW2A2fTn/znVHOeSkfFDlJhTs2 IMXe2JAdC/QyLJfli17tNI7O6dJs8ykGnI+NwcO3dku3f0El8KeObRuPRKV2UrJvSgwl CUZA== X-Gm-Message-State: AOAM531qtnrJ44XoBTiqoVJLAB1RXGNp0fnQwHZIwwn1UOvzE27ahIE1 DfUuDi572phFqcAqgCIveWNRsnXb5/vaOg== X-Google-Smtp-Source: ABdhPJzHf0KMqvi/HoeVI3fc+4Lgfa2T2m8ohEFinZZJNZ8+qjhG7ieJhG3aPPDiQVbEsoCClqJmTQ== X-Received: by 2002:a5d:4dc9:: with SMTP id f9mr2117033wru.407.1592301446581; Tue, 16 Jun 2020 02:57:26 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 18/23] hw/misc/imx6ul_ccm: Implement non writable bits in CCM registers Date: Tue, 16 Jun 2020 10:56:57 +0100 Message-Id: <20200616095702.25848-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200616095702.25848-1-peter.maydell@linaro.org> References: <20200616095702.25848-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Jean-Christophe Dubois Some bits of the CCM registers are non writable. This was left undone in the initial commit (all bits of registers were writable). This patch adds the required code to protect the non writable bits. Signed-off-by: Jean-Christophe Dubois Message-id: 20200608133508.550046-1-jcd@tribudubois.net Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/misc/imx6ul_ccm.c | 76 ++++++++++++++++++++++++++++++++++++-------- 1 file changed, 63 insertions(+), 13 deletions(-) diff --git a/hw/misc/imx6ul_ccm.c b/hw/misc/imx6ul_ccm.c index a2fc1d0364a..5e0661dacf7 100644 --- a/hw/misc/imx6ul_ccm.c +++ b/hw/misc/imx6ul_ccm.c @@ -19,6 +19,62 @@ =20 #include "trace.h" =20 +static const uint32_t ccm_mask[CCM_MAX] =3D { + [CCM_CCR] =3D 0xf01fef80, + [CCM_CCDR] =3D 0xfffeffff, + [CCM_CSR] =3D 0xffffffff, + [CCM_CCSR] =3D 0xfffffef2, + [CCM_CACRR] =3D 0xfffffff8, + [CCM_CBCDR] =3D 0xc1f8e000, + [CCM_CBCMR] =3D 0xfc03cfff, + [CCM_CSCMR1] =3D 0x80700000, + [CCM_CSCMR2] =3D 0xe01ff003, + [CCM_CSCDR1] =3D 0xfe00c780, + [CCM_CS1CDR] =3D 0xfe00fe00, + [CCM_CS2CDR] =3D 0xf8007000, + [CCM_CDCDR] =3D 0xf00fffff, + [CCM_CHSCCDR] =3D 0xfffc01ff, + [CCM_CSCDR2] =3D 0xfe0001ff, + [CCM_CSCDR3] =3D 0xffffc1ff, + [CCM_CDHIPR] =3D 0xffffffff, + [CCM_CTOR] =3D 0x00000000, + [CCM_CLPCR] =3D 0xf39ff01c, + [CCM_CISR] =3D 0xfb85ffbe, + [CCM_CIMR] =3D 0xfb85ffbf, + [CCM_CCOSR] =3D 0xfe00fe00, + [CCM_CGPR] =3D 0xfffc3fea, + [CCM_CCGR0] =3D 0x00000000, + [CCM_CCGR1] =3D 0x00000000, + [CCM_CCGR2] =3D 0x00000000, + [CCM_CCGR3] =3D 0x00000000, + [CCM_CCGR4] =3D 0x00000000, + [CCM_CCGR5] =3D 0x00000000, + [CCM_CCGR6] =3D 0x00000000, + [CCM_CMEOR] =3D 0xafffff1f, +}; + +static const uint32_t analog_mask[CCM_ANALOG_MAX] =3D { + [CCM_ANALOG_PLL_ARM] =3D 0xfff60f80, + [CCM_ANALOG_PLL_USB1] =3D 0xfffe0fbc, + [CCM_ANALOG_PLL_USB2] =3D 0xfffe0fbc, + [CCM_ANALOG_PLL_SYS] =3D 0xfffa0ffe, + [CCM_ANALOG_PLL_SYS_SS] =3D 0x00000000, + [CCM_ANALOG_PLL_SYS_NUM] =3D 0xc0000000, + [CCM_ANALOG_PLL_SYS_DENOM] =3D 0xc0000000, + [CCM_ANALOG_PLL_AUDIO] =3D 0xffe20f80, + [CCM_ANALOG_PLL_AUDIO_NUM] =3D 0xc0000000, + [CCM_ANALOG_PLL_AUDIO_DENOM] =3D 0xc0000000, + [CCM_ANALOG_PLL_VIDEO] =3D 0xffe20f80, + [CCM_ANALOG_PLL_VIDEO_NUM] =3D 0xc0000000, + [CCM_ANALOG_PLL_VIDEO_DENOM] =3D 0xc0000000, + [CCM_ANALOG_PLL_ENET] =3D 0xffc20ff0, + [CCM_ANALOG_PFD_480] =3D 0x40404040, + [CCM_ANALOG_PFD_528] =3D 0x40404040, + [PMU_MISC0] =3D 0x01fe8306, + [PMU_MISC1] =3D 0x07fcede0, + [PMU_MISC2] =3D 0x005f5f5f, +}; + static const char *imx6ul_ccm_reg_name(uint32_t reg) { static char unknown[20]; @@ -596,11 +652,8 @@ static void imx6ul_ccm_write(void *opaque, hwaddr offs= et, uint64_t value, =20 trace_ccm_write_reg(imx6ul_ccm_reg_name(index), (uint32_t)value); =20 - /* - * We will do a better implementation later. In particular some bits - * cannot be written to. - */ - s->ccm[index] =3D (uint32_t)value; + s->ccm[index] =3D (s->ccm[index] & ccm_mask[index]) | + ((uint32_t)value & ~ccm_mask[index]); } =20 static uint64_t imx6ul_analog_read(void *opaque, hwaddr offset, unsigned s= ize) @@ -737,7 +790,7 @@ static void imx6ul_analog_write(void *opaque, hwaddr of= fset, uint64_t value, * the REG_NAME register. So we change the value of the * REG_NAME register, setting bits passed in the value. */ - s->analog[index - 1] |=3D value; + s->analog[index - 1] |=3D (value & ~analog_mask[index - 1]); break; case CCM_ANALOG_PLL_ARM_CLR: case CCM_ANALOG_PLL_USB1_CLR: @@ -762,7 +815,7 @@ static void imx6ul_analog_write(void *opaque, hwaddr of= fset, uint64_t value, * the REG_NAME register. So we change the value of the * REG_NAME register, unsetting bits passed in the value. */ - s->analog[index - 2] &=3D ~value; + s->analog[index - 2] &=3D ~(value & ~analog_mask[index - 2]); break; case CCM_ANALOG_PLL_ARM_TOG: case CCM_ANALOG_PLL_USB1_TOG: @@ -787,14 +840,11 @@ static void imx6ul_analog_write(void *opaque, hwaddr = offset, uint64_t value, * the REG_NAME register. So we change the value of the * REG_NAME register, toggling bits passed in the value. */ - s->analog[index - 3] ^=3D value; + s->analog[index - 3] ^=3D (value & ~analog_mask[index - 3]); break; default: - /* - * We will do a better implementation later. In particular some bi= ts - * cannot be written to. - */ - s->analog[index] =3D value; + s->analog[index] =3D (s->analog[index] & analog_mask[index]) | + (value & ~analog_mask[index]); break; } } --=20 2.20.1