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Mon, 15 Jun 2020 16:40:20 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-200-4jpDKB_fNvat036ZBnbfFQ-1; Mon, 15 Jun 2020 16:40:14 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id C1680873400; Mon, 15 Jun 2020 20:40:13 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 451C75D9CD; Mon, 15 Jun 2020 20:40:13 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 2E83E113860E; Mon, 15 Jun 2020 22:40:08 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1592253618; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=nOECelpWA6D0c17j8+HGM5onaY+ZBJsWAgFT7DAcYXI=; b=ZN9JBao+0F1ncnu1A9oIcLeb8Xvl4cibPOJPyP2dBhHucT2TSv7jQ5kRefHTh4bEDufbZj 9FFe9liDeo4h24+hiBLD7vvebWXO/08+HGbdRZvCetLyv4EzxUsYUhZSWMcSNhfrSDYk1I CvqZotkwb8X9tjVpouJp1MMn6gDonvs= X-MC-Unique: 4jpDKB_fNvat036ZBnbfFQ-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PULL 06/84] arm/aspeed: Compute the number of CPUs from the SoC definition Date: Mon, 15 Jun 2020 22:38:50 +0200 Message-Id: <20200615204008.3069956-7-armbru@redhat.com> In-Reply-To: <20200615204008.3069956-1-armbru@redhat.com> References: <20200615204008.3069956-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/15 16:38:57 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) From: C=C3=A9dric Le Goater Commit ece09beec457 ("aspeed: introduce a configurable number of CPU per machine") was a convient change during bringup but the Aspeed SoCs have a fixed number of CPUs : one for the AST2400 and AST2500, and two for the AST2600. When the number of CPUs configured with -smp is less than the SoC's fixed number, the "unconfigured" CPUs are left unrealized. This can happen for machines ast2600-evb and tacoma-bmc, where the SoC's fixed number is 2. To get virtual hardware that matches the physical hardware, you have to pass -smp cpus=3D2 (or its sugared form -smp 2). We normally reject -smp cpus=3DN when N exceeds the machine's limit. Except we ignore cpus=3D2 (and only cpus=3D2) with a warning for machines ast2500-evb, palmetto-bmc, romulus-bmc, sonorapass-bmc, swift-bmc, and witherspoon-bmc. Remove the "num-cpu" property from the SoC state and use the fixed number of CPUs defined in the SoC class instead. Compute the default, min, max number of CPUs of the machine directly from the SoC class definition. Machines ast2600-evb and tacoma-bmc now always get their second CPU as they should. Visible in "info qom-tree"; here's the change for ast2600-evb: /machine (ast2600-evb-machine) /peripheral (container) /peripheral-anon (container) /soc (ast2600-a1) /a7mpcore (a15mpcore_priv) /a15mp-priv-container[0] (qemu:memory-region) /gic (arm_gic) /gic_cpu[0] (qemu:memory-region) /gic_cpu[1] (qemu:memory-region) + /gic_cpu[2] (qemu:memory-region) /gic_dist[0] (qemu:memory-region) /gic_vcpu[0] (qemu:memory-region) /gic_viface[0] (qemu:memory-region) /gic_viface[1] (qemu:memory-region) + /gic_viface[2] (qemu:memory-region) /unnamed-gpio-in[0] (irq) [...] + /unnamed-gpio-in[160] (irq) [same for 161 to 190...] + /unnamed-gpio-in[191] (irq) Also visible in "info qtree"; here's the change for ast2600-evb: bus: main-system-bus type System dev: a15mpcore_priv, id "" gpio-in "" 128 - gpio-out "sysbus-irq" 5 - num-cpu =3D 1 (0x1) + gpio-out "sysbus-irq" 10 + num-cpu =3D 2 (0x2) num-irq =3D 160 (0xa0) mmio 0000000040460000/0000000000008000 dev: arm_gic, id "" - gpio-in "" 160 - num-cpu =3D 1 (0x1) + gpio-in "" 192 + num-cpu =3D 2 (0x2) num-irq =3D 160 (0xa0) revision =3D 2 (0x2) has-security-extensions =3D true has-virtualization-extensions =3D true num-priority-bits =3D 8 (0x8) mmio ffffffffffffffff/0000000000001000 mmio ffffffffffffffff/0000000000002000 mmio ffffffffffffffff/0000000000001000 mmio ffffffffffffffff/0000000000002000 mmio ffffffffffffffff/0000000000000100 + mmio ffffffffffffffff/0000000000000100 + mmio ffffffffffffffff/0000000000000200 mmio ffffffffffffffff/0000000000000200 The other machines now reject -smp cpus=3D2 just like -smp cpus=3D3 and up. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: Markus Armbruster [Commit message expanded] Signed-off-by: Markus Armbruster Message-Id: <20200609122339.937862-5-armbru@redhat.com> --- include/hw/arm/aspeed_soc.h | 1 - hw/arm/aspeed.c | 29 ++++++++++++++++++++++++----- hw/arm/aspeed_ast2600.c | 20 +++++++------------- hw/arm/aspeed_soc.c | 9 +-------- 4 files changed, 32 insertions(+), 27 deletions(-) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 78b9f6ae53..914115f3ef 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -40,7 +40,6 @@ typedef struct AspeedSoCState { =20 /*< public >*/ ARMCPU cpu[ASPEED_CPUS_NUM]; - uint32_t num_cpus; A15MPPrivState a7mpcore; MemoryRegion *dram_mr; MemoryRegion sram; diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 62344ac6a3..2e7917da74 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -283,8 +283,6 @@ static void aspeed_machine_init(MachineState *machine) &error_abort); object_property_set_int(OBJECT(&bmc->soc), amc->num_cs, "num-cs", &error_abort); - object_property_set_int(OBJECT(&bmc->soc), machine->smp.cpus, "num-cpu= s", - &error_abort); object_property_set_link(OBJECT(&bmc->soc), OBJECT(&bmc->ram_container= ), "dram", &error_abort); if (machine->kernel_filename) { @@ -337,7 +335,7 @@ static void aspeed_machine_init(MachineState *machine) } } =20 - if (machine->kernel_filename && bmc->soc.num_cpus > 1) { + if (machine->kernel_filename && sc->num_cpus > 1) { /* With no u-boot we must set up a boot stub for the secondary CPU= */ MemoryRegion *smpboot =3D g_new(MemoryRegion, 1); memory_region_init_ram(smpboot, OBJECT(bmc), "aspeed.smpboot", @@ -352,7 +350,7 @@ static void aspeed_machine_init(MachineState *machine) =20 aspeed_board_binfo.ram_size =3D ram_size; aspeed_board_binfo.loader_start =3D sc->memmap[ASPEED_SDRAM]; - aspeed_board_binfo.nb_cpus =3D bmc->soc.num_cpus; + aspeed_board_binfo.nb_cpus =3D sc->num_cpus; =20 if (amc->i2c_init) { amc->i2c_init(bmc); @@ -549,12 +547,17 @@ static void aspeed_machine_class_props_init(ObjectCla= ss *oc) "boot directly from CE0 flash device"); } =20 +static int aspeed_soc_num_cpus(const char *soc_name) +{ + AspeedSoCClass *sc =3D ASPEED_SOC_CLASS(object_class_by_name(soc_name)); + return sc->num_cpus; +} + static void aspeed_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); =20 mc->init =3D aspeed_machine_init; - mc->max_cpus =3D ASPEED_CPUS_NUM; mc->no_floppy =3D 1; mc->no_cdrom =3D 1; mc->no_parallel =3D 1; @@ -576,6 +579,8 @@ static void aspeed_machine_palmetto_class_init(ObjectCl= ass *oc, void *data) amc->num_cs =3D 1; amc->i2c_init =3D palmetto_bmc_i2c_init; mc->default_ram_size =3D 256 * MiB; + mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D + aspeed_soc_num_cpus(amc->soc_name); }; =20 static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *d= ata) @@ -591,6 +596,8 @@ static void aspeed_machine_ast2500_evb_class_init(Objec= tClass *oc, void *data) amc->num_cs =3D 1; amc->i2c_init =3D ast2500_evb_i2c_init; mc->default_ram_size =3D 512 * MiB; + mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D + aspeed_soc_num_cpus(amc->soc_name); }; =20 static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data) @@ -606,6 +613,8 @@ static void aspeed_machine_romulus_class_init(ObjectCla= ss *oc, void *data) amc->num_cs =3D 2; amc->i2c_init =3D romulus_bmc_i2c_init; mc->default_ram_size =3D 512 * MiB; + mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D + aspeed_soc_num_cpus(amc->soc_name); }; =20 static void aspeed_machine_sonorapass_class_init(ObjectClass *oc, void *da= ta) @@ -621,6 +630,8 @@ static void aspeed_machine_sonorapass_class_init(Object= Class *oc, void *data) amc->num_cs =3D 2; amc->i2c_init =3D sonorapass_bmc_i2c_init; mc->default_ram_size =3D 512 * MiB; + mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D + aspeed_soc_num_cpus(amc->soc_name); }; =20 static void aspeed_machine_swift_class_init(ObjectClass *oc, void *data) @@ -636,6 +647,8 @@ static void aspeed_machine_swift_class_init(ObjectClass= *oc, void *data) amc->num_cs =3D 2; amc->i2c_init =3D swift_bmc_i2c_init; mc->default_ram_size =3D 512 * MiB; + mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D + aspeed_soc_num_cpus(amc->soc_name); }; =20 static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *d= ata) @@ -651,6 +664,8 @@ static void aspeed_machine_witherspoon_class_init(Objec= tClass *oc, void *data) amc->num_cs =3D 2; amc->i2c_init =3D witherspoon_bmc_i2c_init; mc->default_ram_size =3D 512 * MiB; + mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D + aspeed_soc_num_cpus(amc->soc_name); }; =20 static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *d= ata) @@ -667,6 +682,8 @@ static void aspeed_machine_ast2600_evb_class_init(Objec= tClass *oc, void *data) amc->num_cs =3D 1; amc->i2c_init =3D ast2600_evb_i2c_init; mc->default_ram_size =3D 1 * GiB; + mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D + aspeed_soc_num_cpus(amc->soc_name); }; =20 static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data) @@ -683,6 +700,8 @@ static void aspeed_machine_tacoma_class_init(ObjectClas= s *oc, void *data) amc->num_cs =3D 2; amc->i2c_init =3D witherspoon_bmc_i2c_init; /* Same board layout */ mc->default_ram_size =3D 1 * GiB; + mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D + aspeed_soc_num_cpus(amc->soc_name); }; =20 static const TypeInfo aspeed_machine_types[] =3D { diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 71a0acfe26..c6821b3322 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -255,17 +255,11 @@ static void aspeed_soc_ast2600_realize(DeviceState *d= ev, Error **errp) create_unimplemented_device("aspeed.video", sc->memmap[ASPEED_VIDEO], 0x1000); =20 - if (s->num_cpus > sc->num_cpus) { - warn_report("%s: invalid number of CPUs %d, using default %d", - sc->name, s->num_cpus, sc->num_cpus); - s->num_cpus =3D sc->num_cpus; - } - /* CPU */ - for (i =3D 0; i < s->num_cpus; i++) { + for (i =3D 0; i < sc->num_cpus; i++) { object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC, "psci-conduit", &error_abort); - if (s->num_cpus > 1) { + if (sc->num_cpus > 1) { object_property_set_int(OBJECT(&s->cpu[i]), ASPEED_A7MPCORE_ADDR, "reset-cbar", &error_abort); @@ -289,7 +283,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev= , Error **errp) } =20 /* A7MPCORE */ - object_property_set_int(OBJECT(&s->a7mpcore), s->num_cpus, "num-cpu", + object_property_set_int(OBJECT(&s->a7mpcore), sc->num_cpus, "num-cpu", &error_abort); object_property_set_int(OBJECT(&s->a7mpcore), ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL, @@ -299,18 +293,18 @@ static void aspeed_soc_ast2600_realize(DeviceState *d= ev, Error **errp) &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, ASPEED_A7MPCORE_ADDR); =20 - for (i =3D 0; i < s->num_cpus; i++) { + for (i =3D 0; i < sc->num_cpus; i++) { SysBusDevice *sbd =3D SYS_BUS_DEVICE(&s->a7mpcore); DeviceState *d =3D DEVICE(qemu_get_cpu(i)); =20 irq =3D qdev_get_gpio_in(d, ARM_CPU_IRQ); sysbus_connect_irq(sbd, i, irq); irq =3D qdev_get_gpio_in(d, ARM_CPU_FIQ); - sysbus_connect_irq(sbd, i + s->num_cpus, irq); + sysbus_connect_irq(sbd, i + sc->num_cpus, irq); irq =3D qdev_get_gpio_in(d, ARM_CPU_VIRQ); - sysbus_connect_irq(sbd, i + 2 * s->num_cpus, irq); + sysbus_connect_irq(sbd, i + 2 * sc->num_cpus, irq); irq =3D qdev_get_gpio_in(d, ARM_CPU_VFIQ); - sysbus_connect_irq(sbd, i + 3 * s->num_cpus, irq); + sysbus_connect_irq(sbd, i + 3 * sc->num_cpus, irq); } =20 /* SRAM */ diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index cf6b6dd116..e6f4b59134 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -242,14 +242,8 @@ static void aspeed_soc_realize(DeviceState *dev, Error= **errp) create_unimplemented_device("aspeed.video", sc->memmap[ASPEED_VIDEO], 0x1000); =20 - if (s->num_cpus > sc->num_cpus) { - warn_report("%s: invalid number of CPUs %d, using default %d", - sc->name, s->num_cpus, sc->num_cpus); - s->num_cpus =3D sc->num_cpus; - } - /* CPU */ - for (i =3D 0; i < s->num_cpus; i++) { + for (i =3D 0; i < sc->num_cpus; i++) { object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &er= r); if (err) { error_propagate(errp, err); @@ -460,7 +454,6 @@ static void aspeed_soc_realize(DeviceState *dev, Error = **errp) aspeed_soc_get_irq(s, ASPEED_SDHCI)); } static Property aspeed_soc_properties[] =3D { - DEFINE_PROP_UINT32("num-cpus", AspeedSoCState, num_cpus, 0), DEFINE_PROP_LINK("dram", AspeedSoCState, dram_mr, TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_END_OF_LIST(), --=20 2.26.2