From nobody Sat Nov 15 01:00:41 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1592254906; cv=none; d=zohomail.com; s=zohoarc; b=R2AIbRkjR7WVZGrR1Ctb3Nawq4Y/ENmAYgLpyEymAeTYd8QPdJN56L/3aPKU/1Nv2Wm908kK026w3xX/7Z8Kx31OgJU5dfYOzvZoDYyllyrws8wWXUm4SR1shuutKVsbbYInJjNOFom6AHrQRJkaKMIU7taocbSLQXBgwt98oL0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1592254906; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=WSEFF9DoIxrKXJNtEM+wjTFCkRr+RtsMi5qBeoYhzuk=; b=eKhBNGLmHEh2e5Pkg2Yrsv8HfrU5Oqky6f8NokSJ4wJ8o1E8IJg5LVe2k6CIiE4E+0CsEFxHHmKb5nPx/ClCQGZaA7NrzsN2/3J/kSwUXg6PP5hjKqHDEuGtOG3ePDd6un13Fy9KCatGhKejOqMPqkx5ROZRg36BJlgSj3yDKi0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1592254906672818.5488022551119; Mon, 15 Jun 2020 14:01:46 -0700 (PDT) Received: from localhost ([::1]:57296 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jkwEj-0002Vy-D2 for importer@patchew.org; Mon, 15 Jun 2020 17:01:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33494) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkvuK-0002yJ-4J for qemu-devel@nongnu.org; Mon, 15 Jun 2020 16:40:40 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:36342 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jkvuE-0000YD-Sp for qemu-devel@nongnu.org; Mon, 15 Jun 2020 16:40:39 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-408-lSd6O5J-MzafrU7N3qp_gA-1; Mon, 15 Jun 2020 16:40:18 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 0CB3E5AED0; Mon, 15 Jun 2020 20:40:17 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A7B1319C79; Mon, 15 Jun 2020 20:40:16 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 2385C11385F9; Mon, 15 Jun 2020 22:40:08 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1592253634; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WSEFF9DoIxrKXJNtEM+wjTFCkRr+RtsMi5qBeoYhzuk=; b=cu1icWj4LR+7Dq2A9Rmnk50QKo92rudlqFUudpm5rIGlvZfeqpw7hhe3FzUbHzfxVP58ls SDtbUNYEdEG2iLhCKys0OZc/2H1Nn+lH18YCTkOdv0Bbtpcn9fxcF7XHvDDfynODD/5Obj HrPm1kotE4qtYDoYXsf8EZbSdP0YLs0= X-MC-Unique: lSd6O5J-MzafrU7N3qp_gA-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PULL 03/84] arm/stm32f405: Fix realization of "stm32f2xx-adc" devices Date: Mon, 15 Jun 2020 22:38:47 +0200 Message-Id: <20200615204008.3069956-4-armbru@redhat.com> In-Reply-To: <20200615204008.3069956-1-armbru@redhat.com> References: <20200615204008.3069956-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/15 16:38:57 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Alistair Francis , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) stm32f405_soc_initfn() creates six such devices, but stm32f405_soc_realize() realizes only one. Affects machine netduinoplus2. In theory, a device becomes real only on realize. In practice, the transition from unreal to real is a fuzzy one. The work to make a device real can be spread between realize methods (fine), instance_init methods (wrong), and board code wiring up the device (fine as long as it effectively happens on realize). Depending on what exactly is done where, a device can work even when we neglect to realize it. The five unrealized devices appear to stay unreal: neither MMIO nor IRQ get wired up. Fix stm32f405_soc_realize() to realize and wire up all six. Visible in "info qtree": bus: main-system-bus type System dev: stm32f405-soc, id "" cpu-type =3D "cortex-m4-arm-cpu" dev: stm32f2xx-adc, id "" gpio-out "sysbus-irq" 1 - mmio ffffffffffffffff/00000000000000ff + mmio 0000000040012000/00000000000000ff dev: stm32f2xx-adc, id "" gpio-out "sysbus-irq" 1 - mmio ffffffffffffffff/00000000000000ff + mmio 0000000040012100/00000000000000ff dev: stm32f2xx-adc, id "" gpio-out "sysbus-irq" 1 - mmio ffffffffffffffff/00000000000000ff + mmio 0000000040012200/00000000000000ff dev: stm32f2xx-adc, id "" gpio-out "sysbus-irq" 1 - mmio ffffffffffffffff/00000000000000ff + mmio 0000000040012300/00000000000000ff dev: stm32f2xx-adc, id "" gpio-out "sysbus-irq" 1 - mmio 0000000040012000/00000000000000ff + mmio 0000000040012400/00000000000000ff dev: stm32f2xx-adc, id "" gpio-out "sysbus-irq" 1 - mmio ffffffffffffffff/00000000000000ff + mmio 0000000040012500/00000000000000ff dev: armv7m, id "" Fixes: 529fc5fd3e18ace8f739afd02dc0953354f39442 Cc: Alistair Francis Cc: Peter Maydell Cc: qemu-arm@nongnu.org Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20200609122339.937862-2-armbru@redhat.com> Reviewed-by: Alistair Francis --- hw/arm/stm32f405_soc.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c index 4f10ce6176..c9a530eecf 100644 --- a/hw/arm/stm32f405_soc.c +++ b/hw/arm/stm32f405_soc.c @@ -37,7 +37,8 @@ static const uint32_t usart_addr[] =3D { 0x40011000, 0x40= 004400, 0x40004800, /* At the moment only Timer 2 to 5 are modelled */ static const uint32_t timer_addr[] =3D { 0x40000000, 0x40000400, 0x40000800, 0x40000C00 }; -#define ADC_ADDR 0x40012000 +static const uint32_t adc_addr[] =3D { 0x40012000, 0x40012100, 0x40012200, + 0x40012300, 0x40012400, 0x40012500 }; static const uint32_t spi_addr[] =3D { 0x40013000, 0x40003800, 0x40003C0= 0, 0x40013400, 0x40015000, 0x40015400 = }; #define EXTI_ADDR 0x40013C00 @@ -185,16 +186,18 @@ static void stm32f405_soc_realize(DeviceState *dev_so= c, Error **errp) qdev_connect_gpio_out(DEVICE(&s->adc_irqs), 0, qdev_get_gpio_in(armv7m, ADC_IRQ)); =20 - dev =3D DEVICE(&(s->adc[i])); - object_property_set_bool(OBJECT(&s->adc[i]), true, "realized", &err); - if (err !=3D NULL) { - error_propagate(errp, err); - return; + for (i =3D 0; i < STM_NUM_ADCS; i++) { + dev =3D DEVICE(&(s->adc[i])); + object_property_set_bool(OBJECT(&s->adc[i]), true, "realized", &er= r); + if (err !=3D NULL) { + error_propagate(errp, err); + return; + } + busdev =3D SYS_BUS_DEVICE(dev); + sysbus_mmio_map(busdev, 0, adc_addr[i]); + sysbus_connect_irq(busdev, 0, + qdev_get_gpio_in(DEVICE(&s->adc_irqs), i)); } - busdev =3D SYS_BUS_DEVICE(dev); - sysbus_mmio_map(busdev, 0, ADC_ADDR); - sysbus_connect_irq(busdev, 0, - qdev_get_gpio_in(DEVICE(&s->adc_irqs), i)); =20 /* SPI devices */ for (i =3D 0; i < STM_NUM_SPIS; i++) { --=20 2.26.2