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[79.178.18.124]) by smtp.gmail.com with ESMTPSA id z25sm9103366wmf.10.2020.06.12.07.52.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jun 2020 07:52:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591973532; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=10332xG/Et6G9yDWYNuu/GUK5CzyCJzNTiI8MGCB5RE=; b=ektoibFlcy/FaOaMp1GgnDNMvriAEwMO647p/m28Yc4Aps//eXCsNhoEaGqGAJUymX4Elg PLjbF0E1KviCFehYUZnF2xlxCsd2R7mmC8x+y0E0xzWKKnq1Z/yghdKK/8NLqUUbdFTznZ 8USVMkQ7PaaU5SoSvgMwdiDFe+pEK5w= X-MC-Unique: edYZCoFqO66yY9UrM4nMUg-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to; bh=10332xG/Et6G9yDWYNuu/GUK5CzyCJzNTiI8MGCB5RE=; b=rcM6TmoYuhYlciHOxR+Q6INF3zzu0DsmSCYYk3zptdneorbSwacMJBs0EDCKe1LUWw 09M2UzgLM7VVXq7KWo5xHhq9M2ZLb/gHM4zum4HSha1iD7xbBWlrowR9SiXRVtW+TMCr Is+ZVWwDYpskT8C0gNBqRYQUQ9OQMv/11SGdBEnHpcozVgv6CuCdUENPj0sf9Vvmg7Jj Yn/n1c4oSzxfi3Ff8JWry2mnmqluoLgucl16TaxVSpFmXLoBYIBh8NU3WhbK/56JXTSp SZ22/cot+PzoWs8RJNbor0ktoLuUTK2iRzCTaQAAzUJU6EdI8gMGt7ZUOn+M9EOODpOX gj5g== X-Gm-Message-State: AOAM530fR2Cm3mc0JSaeioY/dKb8xXDequuIZUtYHi6Ni5BFQx04Dhk3 f7OtuQqZwC4u1QK1hCvOj1w7ir6o3HhKRTfQyx9cRo5516bFuVcO9py7edjJBnPuOc6gA8OyPAK dC5eVGj9JG3uIY0I= X-Received: by 2002:adf:fd4b:: with SMTP id h11mr14995190wrs.209.1591973529128; Fri, 12 Jun 2020 07:52:09 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwpP8uo1RqI58tiTARxfnua1V7PbmukBMKys7UocvScr6yP2w3gQVW5S4VhSwBSepb8HqkngA== X-Received: by 2002:adf:fd4b:: with SMTP id h11mr14995175wrs.209.1591973528925; Fri, 12 Jun 2020 07:52:08 -0700 (PDT) Date: Fri, 12 Jun 2020 10:52:07 -0400 From: "Michael S. Tsirkin" To: qemu-devel@nongnu.org Subject: [PULL v2 29/58] pci: assert configuration access is within bounds Message-ID: <20200612141917.9446-30-mst@redhat.com> References: <20200612141917.9446-1-mst@redhat.com> MIME-Version: 1.0 In-Reply-To: <20200612141917.9446-1-mst@redhat.com> X-Mailer: git-send-email 2.27.0.106.g8ac3dc51b1 X-Mutt-Fcc: =sent X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.81; envelope-from=mst@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/12 08:07:17 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , Prasad J Pandit Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Prasad J Pandit While accessing PCI configuration bytes, assert that 'address + len' is within PCI configuration space. Generally it is within bounds. This is more of a defensive assert, in case a buggy device was to send 'address' which may go out of bounds. Suggested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Prasad J Pandit Message-Id: <20200604113525.58898-1-ppandit@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/pci/pci.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 70c66965f5..7bf2ae6d92 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -1381,6 +1381,8 @@ uint32_t pci_default_read_config(PCIDevice *d, { uint32_t val =3D 0; =20 + assert(address + len <=3D pci_config_size(d)); + if (pci_is_express_downstream_port(d) && ranges_overlap(address, len, d->exp.exp_cap + PCI_EXP_LNKSTA, 2)) { pcie_sync_bridge_lnk(d); @@ -1394,6 +1396,8 @@ void pci_default_write_config(PCIDevice *d, uint32_t = addr, uint32_t val_in, int int i, was_irq_disabled =3D pci_irq_disabled(d); uint32_t val =3D val_in; =20 + assert(addr + l <=3D pci_config_size(d)); + for (i =3D 0; i < l; val >>=3D 8, ++i) { uint8_t wmask =3D d->wmask[addr + i]; uint8_t w1cmask =3D d->w1cmask[addr + i]; --=20 MST