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bh=Xhpy5/KHWu7f7iBNn50umu1Z55N8FKEPXHzp1efxKzw=; b=dpfBWfDScX+C8peYycV23NhET1jJftZo8MevUS6BOPnW59WDXNipn1HibCgV13pbrmKvPT eLkmKllPKPlrNKUbZmpmC1KRo5L8SuKnF8g/OZSWoVg+hnwFUBT8v7Zd87SO1uiiQnfP0R N6gwqrjTh5NCZ+lCcLPFsKZR/pWbR2o= X-MC-Unique: sO1Vp0BfO3-C3zENJobzOg-1 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, peterx@redhat.com Subject: [PATCH RESEND 3/9] hw/arm/smmu: Simplify the IOTLB key format Date: Thu, 11 Jun 2020 18:14:54 +0200 Message-Id: <20200611161500.23580-4-eric.auger@redhat.com> In-Reply-To: <20200611161500.23580-1-eric.auger@redhat.com> References: <20200611161500.23580-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" Instead of using a Jenkins hash function to generate the key let's just use a 64 bit unsigned integer that contains the asid and the 40 upper bits of the iova. A maximum of 52-bit IOVA is supported. This change in the key format also prepares for the addition of new fields in subsequent patches (granule and level). Signed-off-by: Eric Auger --- hw/arm/smmu-internal.h | 4 +++ include/hw/arm/smmu-common.h | 6 +--- hw/arm/smmu-common.c | 53 ++++++++++++++---------------------- 3 files changed, 26 insertions(+), 37 deletions(-) diff --git a/hw/arm/smmu-internal.h b/hw/arm/smmu-internal.h index 7794d6d394..2ecb6f1dc6 100644 --- a/hw/arm/smmu-internal.h +++ b/hw/arm/smmu-internal.h @@ -96,4 +96,8 @@ uint64_t iova_level_offset(uint64_t iova, int inputsize, MAKE_64BIT_MASK(0, gsz - 3); } =20 +#define SMMU_IOTLB_ASID_SHIFT 40 + +#define SMMU_IOTLB_ASID(key) (((key) >> SMMU_IOTLB_ASID_SHIFT) & 0xFFFF) +#define SMMU_IOTLB_IOVA(key) (((key) & MAKE_64BIT_MASK(0, 40)) << 12) #endif diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h index 1dceec5cb1..7b9d2f0eb7 100644 --- a/include/hw/arm/smmu-common.h +++ b/include/hw/arm/smmu-common.h @@ -88,11 +88,6 @@ typedef struct SMMUPciBus { SMMUDevice *pbdev[]; /* Parent array is sparse, so dynamically alloc= */ } SMMUPciBus; =20 -typedef struct SMMUIOTLBKey { - uint64_t iova; - uint16_t asid; -} SMMUIOTLBKey; - typedef struct SMMUState { /* */ SysBusDevice dev; @@ -155,6 +150,7 @@ IOMMUMemoryRegion *smmu_iommu_mr(SMMUState *s, uint32_t= sid); =20 IOMMUTLBEntry *smmu_iotlb_lookup(SMMUState *bs, SMMUTransCfg *cfg, hwaddr = iova); void smmu_iotlb_insert(SMMUState *bs, SMMUTransCfg *cfg, IOMMUTLBEntry *en= try); +uint64_t smmu_get_iotlb_key(uint16_t asid, uint64_t iova); void smmu_iotlb_inv_all(SMMUState *s); void smmu_iotlb_inv_asid(SMMUState *s, uint16_t asid); void smmu_iotlb_inv_iova(SMMUState *s, uint16_t asid, dma_addr_t iova); diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index 8409de052d..3101043540 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -32,10 +32,25 @@ =20 /* IOTLB Management */ =20 +static guint smmu_iotlb_key_hash(gconstpointer v) +{ + return (guint)*(const uint64_t *)v; +} + +static gboolean smmu_iotlb_key_equal(gconstpointer v1, gconstpointer v2) +{ + return *((const uint64_t *)v1) =3D=3D *((const uint64_t *)v2); +} + +uint64_t smmu_get_iotlb_key(uint16_t asid, uint64_t iova) +{ + return iova >> 12 | (uint64_t)(asid) << SMMU_IOTLB_ASID_SHIFT; +} + IOMMUTLBEntry *smmu_iotlb_lookup(SMMUState *bs, SMMUTransCfg *cfg, hwaddr iova) { - SMMUIOTLBKey key =3D {.asid =3D cfg->asid, .iova =3D iova}; + uint64_t key =3D smmu_get_iotlb_key(cfg->asid, iova); IOMMUTLBEntry *entry =3D g_hash_table_lookup(bs->iotlb, &key); =20 if (entry) { @@ -56,14 +71,13 @@ IOMMUTLBEntry *smmu_iotlb_lookup(SMMUState *bs, SMMUTra= nsCfg *cfg, =20 void smmu_iotlb_insert(SMMUState *bs, SMMUTransCfg *cfg, IOMMUTLBEntry *en= try) { - SMMUIOTLBKey *key =3D g_new0(SMMUIOTLBKey, 1); + uint64_t *key =3D g_new0(uint64_t, 1); =20 if (g_hash_table_size(bs->iotlb) >=3D SMMU_IOTLB_MAX_SIZE) { smmu_iotlb_inv_all(bs); } =20 - key->asid =3D cfg->asid; - key->iova =3D entry->iova; + *key =3D smmu_get_iotlb_key(cfg->asid, entry->iova); trace_smmu_iotlb_insert(cfg->asid, entry->iova); g_hash_table_insert(bs->iotlb, key, entry); } @@ -78,14 +92,14 @@ static gboolean smmu_hash_remove_by_asid(gpointer key, = gpointer value, gpointer user_data) { uint16_t asid =3D *(uint16_t *)user_data; - SMMUIOTLBKey *iotlb_key =3D (SMMUIOTLBKey *)key; + uint64_t *iotlb_key =3D (uint64_t *)key; =20 - return iotlb_key->asid =3D=3D asid; + return SMMU_IOTLB_ASID(*iotlb_key) =3D=3D asid; } =20 inline void smmu_iotlb_inv_iova(SMMUState *s, uint16_t asid, dma_addr_t io= va) { - SMMUIOTLBKey key =3D {.asid =3D asid, .iova =3D iova}; + uint64_t key =3D smmu_get_iotlb_key(asid, iova); =20 trace_smmu_iotlb_inv_iova(asid, iova); g_hash_table_remove(s->iotlb, &key); @@ -382,31 +396,6 @@ IOMMUMemoryRegion *smmu_iommu_mr(SMMUState *s, uint32_= t sid) return NULL; } =20 -static guint smmu_iotlb_key_hash(gconstpointer v) -{ - SMMUIOTLBKey *key =3D (SMMUIOTLBKey *)v; - uint32_t a, b, c; - - /* Jenkins hash */ - a =3D b =3D c =3D JHASH_INITVAL + sizeof(*key); - a +=3D key->asid; - b +=3D extract64(key->iova, 0, 32); - c +=3D extract64(key->iova, 32, 32); - - __jhash_mix(a, b, c); - __jhash_final(a, b, c); - - return c; -} - -static gboolean smmu_iotlb_key_equal(gconstpointer v1, gconstpointer v2) -{ - const SMMUIOTLBKey *k1 =3D v1; - const SMMUIOTLBKey *k2 =3D v2; - - return (k1->asid =3D=3D k2->asid) && (k1->iova =3D=3D k2->iova); -} - /* Unmap the whole notifier's range */ static void smmu_unmap_notifier_range(IOMMUNotifier *n) { --=20 2.20.1