From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591721308; cv=none; d=zohomail.com; s=zohoarc; b=FRd3HmE+c6h6zItnmsfUy2/BGG0ClogDCN0/gWNyNYgFHjpmLa9R30T874CSe5E5Nbt+DWFiOjYA1fKQJyMZe2jKOqpwd+r71atTbqTXya2LW/UFc0a5vHwlcU1tc1/vDw1Tlt4KRqoKBkcojXLGgOyRqdTHdwUGbyjXZVg3SSs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591721308; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=JmfV2lyXxzyriLghLZNE7LX24yAODMlBXvgUNemIP7U=; b=eva9CL72DulPToxXp+WkqaJk2g7dV2kNBstQrfnZ/PnSKFArBTqFcU/6zx05dIA8kMzTSKxiGWuwfBYlbytaoC40Qo+aJp1GdY+zFVAkSY3h5rCdMlvnzBvQ3S0xIeGSUqNWdXybjWvgeB2KcQIF0oqtx9rhUgh+pa1Nn1CQ21g= ARC-Authentication-Results: i=1; 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Tue, 09 Jun 2020 12:39:40 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-147-NT3sX91qNDS-rxJ7BPqLvA-1; Tue, 09 Jun 2020 12:39:34 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id D8CCF18FE863 for ; Tue, 9 Jun 2020 16:39:33 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A97095C1BD; Tue, 9 Jun 2020 16:39:33 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 3167711385C2; Tue, 9 Jun 2020 18:39:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720777; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JmfV2lyXxzyriLghLZNE7LX24yAODMlBXvgUNemIP7U=; b=HXkWo3dp2rk/f3yXtLS+XsotxfSpUUr3mV//bL9TO+ufMQ2Su+jrDN+DQfAiBh7usZqzB9 BUMiixIEKWCjFQY1hmmx/g41iIrpHqKK0F1v171iA6Gc/fA3g+1GYvE6TgM+BGsAAIr1ao b85Q5QiVPdk6iEQUVwFdlwSx4Qbrbd0= X-MC-Unique: NT3sX91qNDS-rxJ7BPqLvA-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 01/39] qdev: Rename qbus_realize() to qbus_init() Date: Tue, 9 Jun 2020 18:38:54 +0200 Message-Id: <20200609163932.1566209-2-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/08 23:42:34 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) qbus_realize() does not actually realize. Rename it to qbus_init(). Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- hw/core/bus.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/core/bus.c b/hw/core/bus.c index 50924793ac..33a4443217 100644 --- a/hw/core/bus.c +++ b/hw/core/bus.c @@ -95,7 +95,7 @@ static void bus_reset_child_foreach(Object *obj, Resettab= leChildCallback cb, } } =20 -static void qbus_realize(BusState *bus, DeviceState *parent, const char *n= ame) +static void qbus_init(BusState *bus, DeviceState *parent, const char *name) { const char *typename =3D object_get_typename(OBJECT(bus)); BusClass *bc; @@ -151,7 +151,7 @@ void qbus_create_inplace(void *bus, size_t size, const = char *typename, DeviceState *parent, const char *name) { object_initialize(bus, size, typename); - qbus_realize(bus, parent, name); + qbus_init(bus, parent, name); } =20 BusState *qbus_create(const char *typename, DeviceState *parent, const cha= r *name) @@ -159,7 +159,7 @@ BusState *qbus_create(const char *typename, DeviceState= *parent, const char *nam BusState *bus; =20 bus =3D BUS(object_new(typename)); - qbus_realize(bus, parent, name); + qbus_init(bus, parent, name); =20 return bus; } --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591721870; cv=none; d=zohomail.com; s=zohoarc; b=NoKwdDJ5sMoM0xacd2JuQMgD+h1kz7fm/22dbP6gcG6v9StCEevGUZV6JiSKIUVrIJ+R0cXkPp8vkeCf7Kg/sAX5fDEWeV0yma7U1IOvig/1HD2ITOLzvTBU0ka7zbZbpmdgXjpkrefsheoPfiEmLe9bR3AASnIJdIGu3XjPzDE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591721870; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Tue, 9 Jun 2020 18:39:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720781; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3C2RbCfz3YEiAEf5pDJ1VAjz3PUufLSTMx7KPyTCxS0=; b=g9ESzSQO7kLXhblXo5en1QUZoiYT9Jn4F84RdtLufraRb9FZ07IDssqh6ISEUrKTKEgamb bg0nZcOzWaZ0fHSyU53ZXJWlN/OEo5/J7mnpmK0606cgAZ4W2vfmXIH+mdJU8J93FiFBpS bmqC68+O6p8qy+QQN8g9PZvA+iB62Is= X-MC-Unique: JO-oQ181MvGgm27ZNoh0QQ-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 02/39] Revert "hw/prep: realize the PCI root bus as part of the prep init" Date: Tue, 9 Jun 2020 18:38:55 +0200 Message-Id: <20200609163932.1566209-3-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 01:38:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" This reverts commit 685f9a3428f625f580af0123aa95f4838d86cac3. Realizing a device automatically realizes its buses, in device_set_realized(). Realizing them in realize methods is redundant, unless the methods themselves require them to be realized early. raven_pcihost_realizefn() doesn't. Drop the redundant bus realization. Cc: Marcel Apfelbaum Cc: Michael S. Tsirkin Signed-off-by: Markus Armbruster Reviewed-by: Paolo Bonzini --- hw/pci-host/prep.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 1a02e9a670..c821ef889d 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -268,7 +268,6 @@ static void raven_pcihost_realizefn(DeviceState *d, Err= or **errp) memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->pci_int= ack); =20 /* TODO Remove once realize propagates to child devices. */ - object_property_set_bool(OBJECT(&s->pci_bus), true, "realized", errp); object_property_set_bool(OBJECT(&s->pci_dev), true, "realized", errp); } =20 --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Tue, 9 Jun 2020 16:39:36 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id AFFFB5C1C5; Tue, 9 Jun 2020 16:39:33 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 423CA11385C8; Tue, 9 Jun 2020 18:39:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720779; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sXGq+tA8wdOcKFz9bUgPH6W+bkMUfMcYPNT4V95Es64=; b=Xxvd9tcH9/S3s/Oczuo/R2fPMAV18FY0NOJcocMS+fPB+tI+D1XF3yc9o5aMyrl+EFfnBO l+0YK8At/tEDxRByJzhbOreS+NlHVyoVJ0tiu56cMcTQXu5bBLRdipzPHmuuxv948lBs+I jeZNpMtciLtsIRYIA2PQ+022fxCmjUE= X-MC-Unique: tLrTUVGCNgWItCSI6MSjVA-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 03/39] Revert "hw/versatile: realize the PCI root bus as part of the versatile init" Date: Tue, 9 Jun 2020 18:38:56 +0200 Message-Id: <20200609163932.1566209-4-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" This reverts commit b1af7959a66610669e1a019b9a84f6ed3a7936c6. Realizing a device automatically realizes its buses, in device_set_realized(). Realizing them in realize methods is redundant, unless the methods themselves require them to be realized early. pci_vpb_realize() doesn't. Drop the redundant bus realization. Cc: Marcel Apfelbaum Cc: Michael S. Tsirkin Signed-off-by: Markus Armbruster Reviewed-by: Paolo Bonzini --- hw/pci-host/versatile.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index cfb9a78ea6..28817dbeec 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -458,7 +458,6 @@ static void pci_vpb_realize(DeviceState *dev, Error **e= rrp) } =20 /* TODO Remove once realize propagates to child devices. */ - object_property_set_bool(OBJECT(&s->pci_bus), true, "realized", errp); object_property_set_bool(OBJECT(&s->pci_dev), true, "realized", errp); } =20 --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591722886; cv=none; d=zohomail.com; s=zohoarc; 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Tue, 9 Jun 2020 16:39:39 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id B3B0C1001281; Tue, 9 Jun 2020 16:39:33 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 48DC21138527; Tue, 9 Jun 2020 18:39:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720783; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=rLYWNyXFquqcraCCOZhEajGOVqymajFQW4vHR5bq7fQ=; b=V0lPtydtaTQdsAKUxByM80MeS58/2Pt7kNf2OKndsBFdFhho57aqkXeEqn/gRDKipvlYzu C1hsZLND0DL201IkPD1zgUOeF48hLkeQnKS6hW133Gw4lo7QN+GX78LxmEyVsz0upk6rTg JnnkdfTsEI7Y3bwTU67KOxZHLIf6FVo= X-MC-Unique: vmJ_EUuDN7aKonDVF4Hm3A-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 04/39] qdev: New qdev_new(), qdev_realize(), etc. Date: Tue, 9 Jun 2020 18:38:57 +0200 Message-Id: <20200609163932.1566209-5-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 02:41:53 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S . Tsirkin" , Alistair Francis , Mark Cave-Ayland , Alistair Francis , Gerd Hoffmann , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) We commonly plug devices into their bus right when we create them, like this: dev =3D qdev_create(bus, type_name); Note that @dev is a weak reference. The reference from @bus to @dev is the only strong one. We realize at some later time, either with object_property_set_bool(OBJECT(dev), true, "realized", errp); or its convenience wrapper qdev_init_nofail(dev); If @dev still has no QOM parent then, realizing makes the /machine/unattached/ orphanage its QOM parent. Note that the device returned by qdev_create() is plugged into a bus, but doesn't have a QOM parent, yet. Until it acquires one, unrealizing the bus will hang in bus_unparent(): while ((kid =3D QTAILQ_FIRST(&bus->children)) !=3D NULL) { DeviceState *dev =3D kid->child; object_unparent(OBJECT(dev)); } object_unparent() does nothing when its argument has no QOM parent, and the loop spins forever. Device state "no QOM parent, but plugged into bus" is dangerous. Paolo suggested to delay plugging into the bus until realize. We need to plug into the parent bus before we call the device's realize method, in case it uses the parent bus. So the dangerous state still exists, but only within realization, where we can manage it safely. This commit creates infrastructure to do this: dev =3D qdev_new(type_name); ... qdev_realize_and_unref(dev, bus, errp) Note that @dev becomes a strong reference here. qdev_realize_and_unref() drops it. There is also plain qdev_realize(), which doesn't drop it. The remainder of this series will convert all users to this new interface. Cc: Michael S. Tsirkin Cc: Marcel Apfelbaum Cc: Alistair Francis Cc: Gerd Hoffmann Cc: Mark Cave-Ayland Cc: David Gibson Signed-off-by: Markus Armbruster Acked-by: Gerd Hoffmann Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- include/hw/qdev-core.h | 11 +++++- hw/core/bus.c | 14 +++++++ hw/core/qdev.c | 90 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 114 insertions(+), 1 deletion(-) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index b870b27966..fba29308f7 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -57,7 +57,7 @@ typedef void (*BusUnrealize)(BusState *bus); * After successful realization, setting static properties will fail. * * As an interim step, the #DeviceState:realized property can also be - * set with qdev_init_nofail(). + * set with qdev_realize() or qdev_init_nofail(). * In the future, devices will propagate this state change to their childr= en * and along busses they expose. * The point in time will be deferred to machine creation, so that values @@ -322,7 +322,13 @@ compat_props_add(GPtrArray *arr, =20 DeviceState *qdev_create(BusState *bus, const char *name); DeviceState *qdev_try_create(BusState *bus, const char *name); +DeviceState *qdev_new(const char *name); +DeviceState *qdev_try_new(const char *name); void qdev_init_nofail(DeviceState *dev); +bool qdev_realize(DeviceState *dev, BusState *bus, Error **errp); +bool qdev_realize_and_unref(DeviceState *dev, BusState *bus, Error **errp); +void qdev_unrealize(DeviceState *dev); + void qdev_set_legacy_instance_id(DeviceState *dev, int alias_id, int required_for_version); HotplugHandler *qdev_get_bus_hotplug_handler(DeviceState *dev); @@ -411,6 +417,9 @@ typedef int (qdev_walkerfn)(DeviceState *dev, void *opa= que); void qbus_create_inplace(void *bus, size_t size, const char *typename, DeviceState *parent, const char *name); BusState *qbus_create(const char *typename, DeviceState *parent, const cha= r *name); +bool qbus_realize(BusState *bus, Error **errp); +void qbus_unrealize(BusState *bus); + /* Returns > 0 if either devfn or busfn skip walk somewhere in cursion, * < 0 if either devfn or busfn terminate walk somewhere in cursio= n, * 0 otherwise. */ diff --git a/hw/core/bus.c b/hw/core/bus.c index 33a4443217..6f6071f5fa 100644 --- a/hw/core/bus.c +++ b/hw/core/bus.c @@ -164,6 +164,20 @@ BusState *qbus_create(const char *typename, DeviceStat= e *parent, const char *nam return bus; } =20 +bool qbus_realize(BusState *bus, Error **errp) +{ + Error *err =3D NULL; + + object_property_set_bool(OBJECT(bus), true, "realized", &err); + error_propagate(errp, err); + return !err; +} + +void qbus_unrealize(BusState *bus) +{ + object_property_set_bool(OBJECT(bus), false, "realized", &error_abort); +} + static bool bus_get_realized(Object *obj, Error **errp) { BusState *bus =3D BUS(obj); diff --git a/hw/core/qdev.c b/hw/core/qdev.c index a68ba674db..f2c5cee278 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -176,6 +176,32 @@ DeviceState *qdev_try_create(BusState *bus, const char= *type) return dev; } =20 +/* + * Create a device on the heap. + * A type @name must exist. + * This only initializes the device state structure and allows + * properties to be set. The device still needs to be realized. See + * qdev-core.h. + */ +DeviceState *qdev_new(const char *name) +{ + return DEVICE(object_new(name)); +} + +/* + * Try to create a device on the heap. + * This is like qdev_new(), except it returns %NULL when type @name + * does not exist. + */ +DeviceState *qdev_try_new(const char *name) +{ + if (!object_class_by_name(name)) { + return NULL; + } + + return DEVICE(object_new(name)); +} + static QTAILQ_HEAD(, DeviceListener) device_listeners =3D QTAILQ_HEAD_INITIALIZER(device_listeners); =20 @@ -427,6 +453,66 @@ void qdev_init_nofail(DeviceState *dev) object_unref(OBJECT(dev)); } =20 +/* + * Realize @dev. + * @dev must not be plugged into a bus. + * Plug @dev into @bus if non-null, else into the main system bus. + * This takes a reference to @dev. + * If @dev has no QOM parent, make one up, taking another reference. + * On success, return true. + * On failure, store an error through @errp and return false. + */ +bool qdev_realize(DeviceState *dev, BusState *bus, Error **errp) +{ + Error *err =3D NULL; + + assert(!dev->realized && !dev->parent_bus); + + if (!bus) { + /* + * Assert that the device really is a SysBusDevice before we + * put it onto the sysbus. Non-sysbus devices which aren't + * being put onto a bus should be realized with + * object_property_set_bool(OBJECT(dev), true, "realized", + * errp); + */ + g_assert(object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE)); + bus =3D sysbus_get_default(); + } + + qdev_set_parent_bus(dev, bus); + + object_property_set_bool(OBJECT(dev), true, "realized", &err); + if (err) { + error_propagate(errp, err); + } + return !err; +} + +/* + * Realize @dev and drop a reference. + * This is like qdev_realize(), except the caller must hold a + * (private) reference, which is dropped on return regardless of + * success or failure. Intended use: + * dev =3D qdev_new(); + * [...] + * qdev_realize_and_unref(dev, bus, errp); + * Now @dev can go away without further ado. + */ +bool qdev_realize_and_unref(DeviceState *dev, BusState *bus, Error **errp) +{ + bool ret; + + ret =3D qdev_realize(dev, bus, errp); + object_unref(OBJECT(dev)); + return ret; +} + +void qdev_unrealize(DeviceState *dev) +{ + object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); +} + static int qdev_assert_realized_properly(Object *obj, void *opaque) { DeviceState *dev =3D DEVICE(object_dynamic_cast(obj, TYPE_DEVICE)); @@ -1002,6 +1088,10 @@ post_realize_fail: fail: error_propagate(errp, local_err); if (unattached_parent) { + /* + * Beware, this doesn't just revert + * object_property_add_child(), it also runs bus_remove()! + */ object_unparent(OBJECT(dev)); unattached_count--; } --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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b=hmmfycf//L+6XWz3cdpeEquR9/40s57mw/yAUX+i6TJIv/3w6CSSSbL+efFN+Zhi09UhMa BR/7IxI62jXrRwG6uUzLiEWoaBnhyJkebBXOUbbEApZMRVWiOsJ1irnYDSUQmWB5xodvPt 3GjyEPxuG0PYbEjvw10FMbOCtI3uFvk= X-MC-Unique: LoVIK0f8PGW2mfy0_uMeOQ-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 05/39] qdev: Put qdev_new() to use with Coccinelle Date: Tue, 9 Jun 2020 18:38:58 +0200 Message-Id: <20200609163932.1566209-6-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 02:41:53 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Let's start simple and put qdev_new() to use. Coccinelle script: @ depends on !(file in "hw/core/qdev.c")@ expression type_name; @@ - DEVICE(object_new(type_name)) + qdev_new(type_name) Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- hw/block/nand.c | 2 +- hw/misc/auxbus.c | 2 +- qdev-monitor.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/block/nand.c b/hw/block/nand.c index bba89688ba..cdf3429ce6 100644 --- a/hw/block/nand.c +++ b/hw/block/nand.c @@ -644,7 +644,7 @@ DeviceState *nand_init(BlockBackend *blk, int manf_id, = int chip_id) if (nand_flash_ids[chip_id].size =3D=3D 0) { hw_error("%s: Unsupported NAND chip ID.\n", __func__); } - dev =3D DEVICE(object_new(TYPE_NAND)); + dev =3D qdev_new(TYPE_NAND); qdev_prop_set_uint8(dev, "manufacturer_id", manf_id); qdev_prop_set_uint8(dev, "chip_id", chip_id); if (blk) { diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c index 5e4794f0ac..7fb020086f 100644 --- a/hw/misc/auxbus.c +++ b/hw/misc/auxbus.c @@ -273,7 +273,7 @@ DeviceState *aux_create_slave(AUXBus *bus, const char *= type) { DeviceState *dev; =20 - dev =3D DEVICE(object_new(type)); + dev =3D qdev_new(type); assert(dev); qdev_set_parent_bus(dev, &bus->qbus); return dev; diff --git a/qdev-monitor.c b/qdev-monitor.c index a4735d3bb1..20cfa7615b 100644 --- a/qdev-monitor.c +++ b/qdev-monitor.c @@ -652,7 +652,7 @@ DeviceState *qdev_device_add(QemuOpts *opts, Error **er= rp) } =20 /* create device */ - dev =3D DEVICE(object_new(driver)); + dev =3D qdev_new(driver); =20 /* Check whether the hotplug is allowed by the machine */ if (qdev_hotplug && !qdev_hotplug_allowed(dev, &err)) { --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591721593; cv=none; d=zohomail.com; s=zohoarc; b=QujGaFSigaRtzsswoSJAVBB9Cyiy5JztER89xwlMHopQtZqUgXwwfZp4BLVxY4ddfIHsAzLgGnw2wWdNvd2mI3z/xV6H2dcAIg7du8tUSxBnNt2gt+rWRaE9TVRhI+M8IDCcrdT160Fx8H3TGVDayZ1eRqB1IKuRwUvajdqym8g= ARC-Message-Signature: i=1; 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Tue, 9 Jun 2020 16:39:35 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 2CDE27CCC0; Tue, 9 Jun 2020 16:39:35 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 54E101138539; Tue, 9 Jun 2020 18:39:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720778; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cx3xj/4fX2YH/B/jEecpvXqVnOEd+qsDGCB+bkD5rwk=; b=dNRJVrqlaIxaCB/R7Zi+oZaWCqoOhDbueLQxhI6I+c4w11ZSoGZ9KUdzSjJku7fiLv9R67 NVfeBXURnnmpT3E1AeP2cQE/Nywp+0y1QfSIFB3sbC3kkkbD4YzoqLREkL/GBYeRuu7bW2 fMO7sbqdsmBWDcO9uB1h03ILEeGDklI= X-MC-Unique: KWDNu4jtOTO101CH6AC1Eg-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 06/39] qdev: Convert to qbus_realize(), qbus_unrealize() Date: Tue, 9 Jun 2020 18:38:59 +0200 Message-Id: <20200609163932.1566209-7-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 01:38:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, T_SPF_HELO_TEMPERROR=0.01 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) I'm going to convert device realization to qdev_realize() with the help of Coccinelle. Convert bus realization to qbus_realize() first, to get it out of Coccinelle's way. Readability improves. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- hw/core/qdev.c | 10 +++------- hw/pci/pci.c | 2 +- 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/hw/core/qdev.c b/hw/core/qdev.c index f2c5cee278..b7355fbcd0 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -1024,9 +1024,7 @@ static void device_set_realized(Object *obj, bool val= ue, Error **errp) resettable_state_clear(&dev->reset); =20 QLIST_FOREACH(bus, &dev->child_bus, sibling) { - object_property_set_bool(OBJECT(bus), true, "realized", - &local_err); - if (local_err !=3D NULL) { + if (!qbus_realize(bus, errp)) { goto child_realize_fail; } } @@ -1051,8 +1049,7 @@ static void device_set_realized(Object *obj, bool val= ue, Error **errp) =20 } else if (!value && dev->realized) { QLIST_FOREACH(bus, &dev->child_bus, sibling) { - object_property_set_bool(OBJECT(bus), false, "realized", - &error_abort); + qbus_unrealize(bus); } if (qdev_get_vmsd(dev)) { vmstate_unregister(VMSTATE_IF(dev), qdev_get_vmsd(dev), dev); @@ -1070,8 +1067,7 @@ static void device_set_realized(Object *obj, bool val= ue, Error **errp) =20 child_realize_fail: QLIST_FOREACH(bus, &dev->child_bus, sibling) { - object_property_set_bool(OBJECT(bus), false, "realized", - &error_abort); + qbus_unrealize(bus); } =20 if (qdev_get_vmsd(dev)) { diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 70c66965f5..6947c741c3 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -456,7 +456,7 @@ void pci_root_bus_cleanup(PCIBus *bus) { pci_bus_uninit(bus); /* the caller of the unplug hotplug handler will delete this device */ - object_property_set_bool(OBJECT(bus), false, "realized", &error_abort); + qbus_unrealize(BUS(bus)); } =20 void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_= irq, --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Tue, 09 Jun 2020 12:39:37 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id E514D3640A for ; Tue, 9 Jun 2020 16:39:36 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 9036D60C87; Tue, 9 Jun 2020 16:39:36 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 5B4D611384A0; Tue, 9 Jun 2020 18:39:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720779; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8XbeMRYzhO7W17z+G/P+wZYYdm1oIX8eMyRKzM1l27k=; b=S76bFYWv7ilgdWOJDxHGoGu3vF8of9eWQtnUhWuRDFbE5hJa605+HlQSiC3fcxXNYWl4mw nOTyz1QzyqhNoqGvU3OoSeNL7xl2usd+kujZ7vjnZGXaw+YgUkugt5YJLE5fuZsm9wDknS T+QEFSezAEX+Dj6IYqPkQBBZovY/CYw= X-MC-Unique: _7WCGpfUOI6sN_arc-8LVA-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 07/39] qdev: Convert to qdev_unrealize() with Coccinelle Date: Tue, 9 Jun 2020 18:39:00 +0200 Message-Id: <20200609163932.1566209-8-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/08 23:42:34 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) For readability, and consistency with qbus_realize(). Coccinelle script: @ depends on !(file in "hw/core/qdev.c")@ typedef DeviceState; DeviceState *dev; symbol false, error_abort; @@ - object_property_set_bool(OBJECT(dev), false, "realized", &error_ab= ort); + qdev_unrealize(dev); @ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@ expression dev; symbol false, error_abort; @@ - object_property_set_bool(OBJECT(dev), false, "realized", &error_ab= ort); + qdev_unrealize(DEVICE(dev)); Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- hw/acpi/pcihp.c | 2 +- hw/char/serial-pci-multi.c | 2 +- hw/char/serial-pci.c | 2 +- hw/core/bus.c | 3 +-- hw/i386/pc.c | 4 ++-- hw/pci/pcie.c | 2 +- hw/pci/shpc.c | 2 +- hw/ppc/spapr.c | 8 ++++---- hw/ppc/spapr_pci.c | 3 +-- hw/s390x/css-bridge.c | 2 +- hw/s390x/s390-pci-bus.c | 4 ++-- 11 files changed, 16 insertions(+), 18 deletions(-) diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index d42906ea19..33ea2b76ae 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -266,7 +266,7 @@ void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplu= g_dev, AcpiPciHpState *s, { trace_acpi_pci_unplug(PCI_SLOT(PCI_DEVICE(dev)->devfn), acpi_pcihp_get_bsel(pci_get_bus(PCI_DEVICE(dev))= )); - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); } =20 void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev, diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 5f9ccfcc93..23d0ebe2cd 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -56,7 +56,7 @@ static void multi_serial_pci_exit(PCIDevice *dev) =20 for (i =3D 0; i < pci->ports; i++) { s =3D pci->state + i; - object_property_set_bool(OBJECT(s), false, "realized", &error_abor= t); + qdev_unrealize(DEVICE(s)); memory_region_del_subregion(&pci->iobar, &s->io); g_free(pci->name[i]); } diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index 37818db156..65eacfae0e 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -68,7 +68,7 @@ static void serial_pci_exit(PCIDevice *dev) PCISerialState *pci =3D DO_UPCAST(PCISerialState, dev, dev); SerialState *s =3D &pci->state; =20 - object_property_set_bool(OBJECT(s), false, "realized", &error_abort); + qdev_unrealize(DEVICE(s)); qemu_free_irq(s->irq); } =20 diff --git a/hw/core/bus.c b/hw/core/bus.c index 6f6071f5fa..6cc28b334e 100644 --- a/hw/core/bus.c +++ b/hw/core/bus.c @@ -200,8 +200,7 @@ static void bus_set_realized(Object *obj, bool value, E= rror **errp) } else if (!value && bus->realized) { QTAILQ_FOREACH(kid, &bus->children, sibling) { DeviceState *dev =3D kid->child; - object_property_set_bool(OBJECT(dev), false, "realized", - &error_abort); + qdev_unrealize(dev); } if (bc->unrealize) { bc->unrealize(bus); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 2128f3d6fe..f9d51479b1 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1385,7 +1385,7 @@ static void pc_memory_unplug(HotplugHandler *hotplug_= dev, } =20 pc_dimm_unplug(PC_DIMM(dev), MACHINE(pcms)); - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); out: error_propagate(errp, local_err); } @@ -1493,7 +1493,7 @@ static void pc_cpu_unplug_cb(HotplugHandler *hotplug_= dev, =20 found_cpu =3D pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, NULL); found_cpu->cpu =3D NULL; - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); =20 /* decrement the number of CPUs */ x86ms->boot_cpus--; diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index f50e10b8fb..582f81fdff 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -457,7 +457,7 @@ void pcie_cap_slot_plug_cb(HotplugHandler *hotplug_dev,= DeviceState *dev, void pcie_cap_slot_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); } =20 static void pcie_unplug_device(PCIBus *bus, PCIDevice *dev, void *opaque) diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c index b76d3d2c9a..99d65d5c4c 100644 --- a/hw/pci/shpc.c +++ b/hw/pci/shpc.c @@ -547,7 +547,7 @@ void shpc_device_plug_cb(HotplugHandler *hotplug_dev, D= eviceState *dev, void shpc_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); } =20 void shpc_device_unplug_request_cb(HotplugHandler *hotplug_dev, diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 3b1a5ed865..6a315c0dc8 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3671,7 +3671,7 @@ static void spapr_memory_unplug(HotplugHandler *hotpl= ug_dev, DeviceState *dev) SpaprDimmState *ds =3D spapr_pending_dimm_unplugs_find(spapr, PC_DIMM(= dev)); =20 pc_dimm_unplug(PC_DIMM(dev), MACHINE(hotplug_dev)); - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); spapr_pending_dimm_unplugs_remove(spapr, ds); } =20 @@ -3764,7 +3764,7 @@ static void spapr_core_unplug(HotplugHandler *hotplug= _dev, DeviceState *dev) =20 assert(core_slot); core_slot->cpu =3D NULL; - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); } =20 static @@ -4037,7 +4037,7 @@ void spapr_phb_release(DeviceState *dev) =20 static void spapr_phb_unplug(HotplugHandler *hotplug_dev, DeviceState *dev) { - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); } =20 static void spapr_phb_unplug_request(HotplugHandler *hotplug_dev, @@ -4073,7 +4073,7 @@ static void spapr_tpm_proxy_unplug(HotplugHandler *ho= tplug_dev, DeviceState *dev { SpaprMachineState *spapr =3D SPAPR_MACHINE(OBJECT(hotplug_dev)); =20 - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); object_unparent(OBJECT(dev)); spapr->tpm_proxy =3D NULL; } diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 83f1453096..329002ac04 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1587,8 +1587,7 @@ static void spapr_pci_unplug(HotplugHandler *plug_han= dler, return; } =20 - object_property_set_bool(OBJECT(plugged_dev), false, "realized", - &error_abort); + qdev_unrealize(plugged_dev); } =20 static void spapr_pci_unplug_request(HotplugHandler *plug_handler, diff --git a/hw/s390x/css-bridge.c b/hw/s390x/css-bridge.c index 3f6aec6b6a..813bfc768a 100644 --- a/hw/s390x/css-bridge.c +++ b/hw/s390x/css-bridge.c @@ -54,7 +54,7 @@ static void ccw_device_unplug(HotplugHandler *hotplug_dev, =20 css_generate_sch_crws(sch->cssid, sch->ssid, sch->schid, 1, 0); =20 - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); } =20 static void virtual_css_bus_reset(BusState *qbus) diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index c4a4259f0c..7a4bfb7383 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -1003,7 +1003,7 @@ static void s390_pcihost_unplug(HotplugHandler *hotpl= ug_dev, DeviceState *dev, pbdev->fh, pbdev->fid); bus =3D pci_get_bus(pci_dev); devfn =3D pci_dev->devfn; - object_property_set_bool(OBJECT(dev), false, "realized", &error_ab= ort); + qdev_unrealize(dev); =20 s390_pci_msix_free(pbdev); s390_pci_iommu_free(s, bus, devfn); @@ -1014,7 +1014,7 @@ static void s390_pcihost_unplug(HotplugHandler *hotpl= ug_dev, DeviceState *dev, pbdev->fid =3D 0; QTAILQ_REMOVE(&s->zpci_devs, pbdev, link); g_hash_table_remove(s->zpci_table, &pbdev->idx); - object_property_set_bool(OBJECT(dev), false, "realized", &error_ab= ort); + qdev_unrealize(dev); } } =20 --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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bh=0hC4mpeJZfphtWYsBTXEUYFx6o077dtztmAdYg392xk=; b=FXcYF7kUeh7cDg5sAkULT5s6DlBYzyqGvemun56VPdTvIVAhXV6mc9PgO+NkBEGdn5jNDh y3pTZ7Ur2pBXPMAK7Z2zIjuoEnZn5InrSpfV6VOSvxRxysVVAG8+xSgVOwu1xCE/2oJEu/ AR3SjpAv7hIg0G87igyhuMwKebt+D4k= X-MC-Unique: ONzXiAGWO3OQeSvEa18gug-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 08/39] qdev: Convert to qdev_unrealize() manually Date: Tue, 9 Jun 2020 18:39:01 +0200 Message-Id: <20200609163932.1566209-9-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.139.110.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 02:44:16 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- include/hw/qdev-core.h | 1 - hw/core/qdev.c | 4 ++-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index fba29308f7..be6f7c4736 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -328,7 +328,6 @@ void qdev_init_nofail(DeviceState *dev); bool qdev_realize(DeviceState *dev, BusState *bus, Error **errp); bool qdev_realize_and_unref(DeviceState *dev, BusState *bus, Error **errp); void qdev_unrealize(DeviceState *dev); - void qdev_set_legacy_instance_id(DeviceState *dev, int alias_id, int required_for_version); HotplugHandler *qdev_get_bus_hotplug_handler(DeviceState *dev); diff --git a/hw/core/qdev.c b/hw/core/qdev.c index b7355fbcd0..4768244f31 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -421,7 +421,7 @@ static void device_reset_child_foreach(Object *obj, Res= ettableChildCallback cb, void qdev_simple_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { - object_property_set_bool(OBJECT(dev), false, "realized", &error_abort); + qdev_unrealize(dev); } =20 /* @@ -1183,7 +1183,7 @@ static void device_unparent(Object *obj) BusState *bus; =20 if (dev->realized) { - object_property_set_bool(obj, false, "realized", &error_abort); + qdev_unrealize(dev); } while (dev->num_child_bus) { bus =3D QLIST_FIRST(&dev->child_bus); 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bh=YfOfXNRfGyws46FTBRu/c0lWpekujPfqzbxJPzKExJI=; b=HcUlRgGV10qr5Z9eZUKHwdTIodSNQ9OZUnrfhbsiVSa0cxzpx+gYaPpqcVHl2RFkhB1iwm H3PWsiljGBg5+1EIIQaX9TVztzbPSGm7MQNCIuD9OWBk5svrGEVNRtDTe/b67cj7TZyeRw evBGNXaPDlfRkBICiC2uppIuJXxcNa4= X-MC-Unique: VeTtP6fnPBGUiKkNiJHQVg-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 09/39] qdev: Convert uses of qdev_create() with Coccinelle Date: Tue, 9 Jun 2020 18:39:02 +0200 Message-Id: <20200609163932.1566209-10-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 01:38:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" This is the transformation explained in the commit before previous. Takes care of just one pattern that needs conversion. More to come in this series. Coccinelle script: @ depends on !(file in "hw/arm/highbank.c")@ expression bus, type_name, dev, expr; @@ - dev =3D qdev_create(bus, type_name); + dev =3D qdev_new(type_name); ... when !=3D dev =3D expr - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, bus, &error_fatal); @@ expression bus, type_name, dev, expr; identifier DOWN; @@ - dev =3D DOWN(qdev_create(bus, type_name)); + dev =3D DOWN(qdev_new(type_name)); ... when !=3D dev =3D expr - qdev_init_nofail(DEVICE(dev)); + qdev_realize_and_unref(DEVICE(dev), bus, &error_fatal); @@ expression bus, type_name, expr; identifier dev; @@ - DeviceState *dev =3D qdev_create(bus, type_name); + DeviceState *dev =3D qdev_new(type_name); ... when !=3D dev =3D expr - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, bus, &error_fatal); @@ expression bus, type_name, dev, expr, errp; symbol true; @@ - dev =3D qdev_create(bus, type_name); + dev =3D qdev_new(type_name); ... when !=3D dev =3D expr - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize_and_unref(dev, bus, errp); @@ expression bus, type_name, expr, errp; identifier dev; symbol true; @@ - DeviceState *dev =3D qdev_create(bus, type_name); + DeviceState *dev =3D qdev_new(type_name); ... when !=3D dev =3D expr - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize_and_unref(dev, bus, errp); The first rule exempts hw/arm/highbank.c, because it matches along two control flow paths there, with different @type_name. Covered by the next commit's manual conversions. Missing #include "qapi/error.h" added manually. Signed-off-by: Markus Armbruster Reviewed-by: Paolo Bonzini --- hw/lm32/lm32.h | 13 ++--- hw/lm32/milkymist-hw.h | 37 +++++++------- include/hw/char/cadence_uart.h | 5 +- include/hw/char/cmsdk-apb-uart.h | 4 +- include/hw/char/pl011.h | 9 ++-- include/hw/char/xilinx_uartlite.h | 4 +- include/hw/cris/etraxfs.h | 4 +- include/hw/misc/unimp.h | 5 +- include/hw/timer/cmsdk-apb-timer.h | 4 +- hw/alpha/typhoon.c | 4 +- hw/arm/aspeed.c | 7 +-- hw/arm/cubieboard.c | 4 +- hw/arm/exynos4210.c | 41 +++++++-------- hw/arm/exynos4_boards.c | 4 +- hw/arm/imx25_pdk.c | 5 +- hw/arm/integratorcp.c | 4 +- hw/arm/mcimx6ul-evk.c | 5 +- hw/arm/mcimx7d-sabre.c | 5 +- hw/arm/mps2-tz.c | 4 +- hw/arm/msf2-som.c | 4 +- hw/arm/musicpal.c | 8 +-- hw/arm/netduino2.c | 4 +- hw/arm/netduinoplus2.c | 4 +- hw/arm/nseries.c | 8 +-- hw/arm/omap1.c | 16 +++--- hw/arm/omap2.c | 16 +++--- hw/arm/orangepi.c | 4 +- hw/arm/pxa2xx.c | 8 +-- hw/arm/pxa2xx_gpio.c | 5 +- hw/arm/pxa2xx_pic.c | 5 +- hw/arm/raspi.c | 4 +- hw/arm/realview.c | 20 ++++---- hw/arm/sbsa-ref.c | 20 ++++---- hw/arm/spitz.c | 4 +- hw/arm/stellaris.c | 12 ++--- hw/arm/strongarm.c | 9 ++-- hw/arm/versatilepb.c | 16 +++--- hw/arm/vexpress.c | 16 +++--- hw/arm/virt.c | 32 ++++++------ hw/arm/xilinx_zynq.c | 38 +++++++------- hw/arm/xlnx-versal-virt.c | 9 ++-- hw/arm/xlnx-versal.c | 4 +- hw/arm/xlnx-zcu102.c | 5 +- hw/audio/intel-hda.c | 4 +- hw/block/fdc.c | 12 ++--- hw/block/pflash_cfi01.c | 4 +- hw/block/pflash_cfi02.c | 4 +- hw/char/exynos4210_uart.c | 5 +- hw/char/mcf_uart.c | 5 +- hw/char/spapr_vty.c | 4 +- hw/core/empty_slot.c | 5 +- hw/core/sysbus.c | 4 +- hw/cris/axis_dev88.c | 4 +- hw/display/milkymist-tmu2.c | 4 +- hw/display/sm501.c | 4 +- hw/dma/pxa2xx_dma.c | 8 +-- hw/dma/rc4030.c | 5 +- hw/dma/sparc32_dma.c | 16 +++--- hw/hppa/dino.c | 4 +- hw/hppa/lasi.c | 4 +- hw/hppa/machine.c | 4 +- hw/i2c/core.c | 5 +- hw/i2c/smbus_eeprom.c | 4 +- hw/i386/pc_q35.c | 4 +- hw/i386/x86.c | 6 +-- hw/ide/qdev.c | 4 +- hw/intc/exynos4210_gic.c | 5 +- hw/intc/s390_flic.c | 6 +-- hw/isa/isa-bus.c | 4 +- hw/m68k/mcf5208.c | 4 +- hw/m68k/mcf_intc.c | 5 +- hw/m68k/next-cube.c | 12 ++--- hw/m68k/q800.c | 36 ++++++------- hw/microblaze/petalogix_ml605_mmu.c | 20 ++++---- hw/microblaze/petalogix_s3adsp1800_mmu.c | 12 ++--- hw/mips/boston.c | 8 +-- hw/mips/gt64xxx_pci.c | 5 +- hw/mips/jazz.c | 16 +++--- hw/mips/malta.c | 4 +- hw/mips/mipssim.c | 8 +-- hw/net/etraxfs_eth.c | 4 +- hw/net/fsl_etsec/etsec.c | 5 +- hw/net/lan9118.c | 5 +- hw/net/lasi_i82596.c | 5 +- hw/net/smc91c111.c | 5 +- hw/net/spapr_llan.c | 4 +- hw/nios2/10m50_devboard.c | 12 ++--- hw/nvram/fw_cfg.c | 8 +-- hw/openrisc/openrisc_sim.c | 8 +-- hw/pci-bridge/pci_expander_bridge.c | 4 +- hw/pci-host/bonito.c | 5 +- hw/pci-host/i440fx.c | 4 +- hw/pcmcia/pxa2xx.c | 5 +- hw/ppc/e500.c | 32 ++++++------ hw/ppc/mac_newworld.c | 40 +++++++-------- hw/ppc/mac_oldworld.c | 20 ++++---- hw/ppc/pnv.c | 4 +- hw/ppc/ppc440_uc.c | 8 +-- hw/ppc/prep.c | 9 ++-- hw/ppc/sam460ex.c | 4 +- hw/ppc/spapr.c | 8 +-- hw/ppc/spapr_irq.c | 4 +- hw/ppc/spapr_vio.c | 4 +- hw/ppc/virtex_ml507.c | 9 ++-- hw/riscv/sifive_clint.c | 5 +- hw/riscv/sifive_e_prci.c | 5 +- hw/riscv/sifive_plic.c | 5 +- hw/riscv/sifive_test.c | 5 +- hw/riscv/virt.c | 4 +- hw/rtc/m48t59.c | 5 +- hw/rtc/sun4v-rtc.c | 5 +- hw/s390x/ap-bridge.c | 4 +- hw/s390x/css-bridge.c | 4 +- hw/s390x/s390-virtio-ccw.c | 12 ++--- hw/scsi/scsi-bus.c | 4 +- hw/scsi/spapr_vscsi.c | 4 +- hw/sd/milkymist-memcard.c | 4 +- hw/sd/pxa2xx_mmci.c | 8 +-- hw/sd/ssi-sd.c | 4 +- hw/sh4/r2d.c | 12 ++--- hw/sparc/leon3.c | 12 ++--- hw/sparc/sun4m.c | 64 ++++++++++++------------ hw/sparc64/sun4u.c | 24 ++++----- hw/xen/xen-bus.c | 4 +- hw/xen/xen-legacy-backend.c | 4 +- hw/xtensa/virt.c | 4 +- hw/xtensa/xtfpga.c | 8 +-- 127 files changed, 581 insertions(+), 552 deletions(-) diff --git a/hw/lm32/lm32.h b/hw/lm32/lm32.h index 98de07acf2..326238d859 100644 --- a/hw/lm32/lm32.h +++ b/hw/lm32/lm32.h @@ -3,14 +3,15 @@ =20 #include "hw/char/lm32_juart.h" #include "hw/qdev-properties.h" +#include "qapi/error.h" =20 static inline DeviceState *lm32_pic_init(qemu_irq cpu_irq) { DeviceState *dev; SysBusDevice *d; =20 - dev =3D qdev_create(NULL, "lm32-pic"); - qdev_init_nofail(dev); + dev =3D qdev_new("lm32-pic"); + qdev_realize_and_unref(dev, NULL, &error_fatal); d =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(d, 0, cpu_irq); =20 @@ -21,9 +22,9 @@ static inline DeviceState *lm32_juart_init(Chardev *chr) { DeviceState *dev; =20 - dev =3D qdev_create(NULL, TYPE_LM32_JUART); + dev =3D qdev_new(TYPE_LM32_JUART); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 return dev; } @@ -35,10 +36,10 @@ static inline DeviceState *lm32_uart_create(hwaddr addr, DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, "lm32-uart"); + dev =3D qdev_new("lm32-uart"); s =3D SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); return dev; diff --git a/hw/lm32/milkymist-hw.h b/hw/lm32/milkymist-hw.h index 5f63024355..d5f15a30a1 100644 --- a/hw/lm32/milkymist-hw.h +++ b/hw/lm32/milkymist-hw.h @@ -3,6 +3,7 @@ =20 #include "hw/qdev-core.h" #include "net/net.h" +#include "qapi/error.h" =20 static inline DeviceState *milkymist_uart_create(hwaddr base, qemu_irq irq, @@ -10,9 +11,9 @@ static inline DeviceState *milkymist_uart_create(hwaddr b= ase, { DeviceState *dev; =20 - dev =3D qdev_create(NULL, "milkymist-uart"); + dev =3D qdev_new("milkymist-uart"); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); =20 @@ -23,8 +24,8 @@ static inline DeviceState *milkymist_hpdmc_create(hwaddr = base) { DeviceState *dev; =20 - dev =3D qdev_create(NULL, "milkymist-hpdmc"); - qdev_init_nofail(dev); + dev =3D qdev_new("milkymist-hpdmc"); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); =20 return dev; @@ -34,8 +35,8 @@ static inline DeviceState *milkymist_memcard_create(hwadd= r base) { DeviceState *dev; =20 - dev =3D qdev_create(NULL, "milkymist-memcard"); - qdev_init_nofail(dev); + dev =3D qdev_new("milkymist-memcard"); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); =20 return dev; @@ -46,10 +47,10 @@ static inline DeviceState *milkymist_vgafb_create(hwadd= r base, { DeviceState *dev; =20 - dev =3D qdev_create(NULL, "milkymist-vgafb"); + dev =3D qdev_new("milkymist-vgafb"); qdev_prop_set_uint32(dev, "fb_offset", fb_offset); qdev_prop_set_uint32(dev, "fb_mask", fb_mask); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); =20 return dev; @@ -62,12 +63,12 @@ static inline DeviceState *milkymist_sysctl_create(hwad= dr base, { DeviceState *dev; =20 - dev =3D qdev_create(NULL, "milkymist-sysctl"); + dev =3D qdev_new("milkymist-sysctl"); qdev_prop_set_uint32(dev, "frequency", freq_hz); qdev_prop_set_uint32(dev, "systemid", system_id); qdev_prop_set_uint32(dev, "capabilities", capabilities); qdev_prop_set_uint32(dev, "gpio_strappings", gpio_strappings); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, gpio_irq); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, timer0_irq); @@ -81,8 +82,8 @@ static inline DeviceState *milkymist_pfpu_create(hwaddr b= ase, { DeviceState *dev; =20 - dev =3D qdev_create(NULL, "milkymist-pfpu"); - qdev_init_nofail(dev); + dev =3D qdev_new("milkymist-pfpu"); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); return dev; @@ -94,8 +95,8 @@ static inline DeviceState *milkymist_ac97_create(hwaddr b= ase, { DeviceState *dev; =20 - dev =3D qdev_create(NULL, "milkymist-ac97"); - qdev_init_nofail(dev); + dev =3D qdev_new("milkymist-ac97"); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, crrequest_irq); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, crreply_irq); @@ -111,9 +112,9 @@ static inline DeviceState *milkymist_minimac2_create(hw= addr base, DeviceState *dev; =20 qemu_check_nic_model(&nd_table[0], "minimac2"); - dev =3D qdev_create(NULL, "milkymist-minimac2"); + dev =3D qdev_new("milkymist-minimac2"); qdev_set_nic_properties(dev, &nd_table[0]); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, buffers_base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, rx_irq); @@ -128,10 +129,10 @@ static inline DeviceState *milkymist_softusb_create(h= waddr base, { DeviceState *dev; =20 - dev =3D qdev_create(NULL, "milkymist-softusb"); + dev =3D qdev_new("milkymist-softusb"); qdev_prop_set_uint32(dev, "pmem_size", pmem_size); qdev_prop_set_uint32(dev, "dmem_size", dmem_size); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, pmem_base); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, dmem_base); diff --git a/include/hw/char/cadence_uart.h b/include/hw/char/cadence_uart.h index 2a179a572f..af80b6083b 100644 --- a/include/hw/char/cadence_uart.h +++ b/include/hw/char/cadence_uart.h @@ -22,6 +22,7 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "chardev/char-fe.h" +#include "qapi/error.h" #include "qemu/timer.h" =20 #define CADENCE_UART_RX_FIFO_SIZE 16 @@ -59,10 +60,10 @@ static inline DeviceState *cadence_uart_create(hwaddr a= ddr, DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, TYPE_CADENCE_UART); + dev =3D qdev_new(TYPE_CADENCE_UART); s =3D SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); =20 diff --git a/include/hw/char/cmsdk-apb-uart.h b/include/hw/char/cmsdk-apb-u= art.h index 3c1b53db4e..a51471ff74 100644 --- a/include/hw/char/cmsdk-apb-uart.h +++ b/include/hw/char/cmsdk-apb-uart.h @@ -62,11 +62,11 @@ static inline DeviceState *cmsdk_apb_uart_create(hwaddr= addr, DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, TYPE_CMSDK_APB_UART); + dev =3D qdev_new(TYPE_CMSDK_APB_UART); s =3D SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); qdev_prop_set_uint32(dev, "pclk-frq", pclk_frq); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, txint); sysbus_connect_irq(s, 1, rxint); diff --git a/include/hw/char/pl011.h b/include/hw/char/pl011.h index 14187165c6..18e701b65d 100644 --- a/include/hw/char/pl011.h +++ b/include/hw/char/pl011.h @@ -18,6 +18,7 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "chardev/char-fe.h" +#include "qapi/error.h" =20 #define TYPE_PL011 "pl011" #define PL011(obj) OBJECT_CHECK(PL011State, (obj), TYPE_PL011) @@ -57,10 +58,10 @@ static inline DeviceState *pl011_create(hwaddr addr, DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, "pl011"); + dev =3D qdev_new("pl011"); s =3D SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); =20 @@ -74,10 +75,10 @@ static inline DeviceState *pl011_luminary_create(hwaddr= addr, DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, "pl011_luminary"); + dev =3D qdev_new("pl011_luminary"); s =3D SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); =20 diff --git a/include/hw/char/xilinx_uartlite.h b/include/hw/char/xilinx_uar= tlite.h index 194e2feafe..007b84575f 100644 --- a/include/hw/char/xilinx_uartlite.h +++ b/include/hw/char/xilinx_uartlite.h @@ -25,10 +25,10 @@ static inline DeviceState *xilinx_uartlite_create(hwadd= r addr, DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, "xlnx.xps-uartlite"); + dev =3D qdev_new("xlnx.xps-uartlite"); s =3D SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); =20 diff --git a/include/hw/cris/etraxfs.h b/include/hw/cris/etraxfs.h index 403e7f95e6..19b903facf 100644 --- a/include/hw/cris/etraxfs.h +++ b/include/hw/cris/etraxfs.h @@ -41,10 +41,10 @@ static inline DeviceState *etraxfs_ser_create(hwaddr ad= dr, DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, "etraxfs,serial"); + dev =3D qdev_new("etraxfs,serial"); s =3D SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, irq); return dev; diff --git a/include/hw/misc/unimp.h b/include/hw/misc/unimp.h index 44d87be903..e71ec17e13 100644 --- a/include/hw/misc/unimp.h +++ b/include/hw/misc/unimp.h @@ -10,6 +10,7 @@ =20 #include "hw/qdev-properties.h" #include "hw/sysbus.h" +#include "qapi/error.h" =20 #define TYPE_UNIMPLEMENTED_DEVICE "unimplemented-device" =20 @@ -40,11 +41,11 @@ static inline void create_unimplemented_device(const ch= ar *name, hwaddr base, hwaddr size) { - DeviceState *dev =3D qdev_create(NULL, TYPE_UNIMPLEMENTED_DEVICE); + DeviceState *dev =3D qdev_new(TYPE_UNIMPLEMENTED_DEVICE); =20 qdev_prop_set_string(dev, "name", name); qdev_prop_set_uint64(dev, "size", size); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(dev), 0, base, -1000); } diff --git a/include/hw/timer/cmsdk-apb-timer.h b/include/hw/timer/cmsdk-ap= b-timer.h index e93caccc3c..eee175eaa4 100644 --- a/include/hw/timer/cmsdk-apb-timer.h +++ b/include/hw/timer/cmsdk-apb-timer.h @@ -48,10 +48,10 @@ static inline DeviceState *cmsdk_apb_timer_create(hwadd= r addr, DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, TYPE_CMSDK_APB_TIMER); + dev =3D qdev_new(TYPE_CMSDK_APB_TIMER); s =3D SYS_BUS_DEVICE(dev); qdev_prop_set_uint32(dev, "pclk-frq", pclk_frq); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, addr); sysbus_connect_irq(s, 0, timerint); return dev; diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 1795e2f29d..480d866c77 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -826,7 +826,7 @@ PCIBus *typhoon_init(MemoryRegion *ram, ISABus **isa_bu= s, qemu_irq *p_rtc_irq, PCIBus *b; int i; =20 - dev =3D qdev_create(NULL, TYPE_TYPHOON_PCI_HOST_BRIDGE); + dev =3D qdev_new(TYPE_TYPHOON_PCI_HOST_BRIDGE); =20 s =3D TYPHOON_PCI_HOST_BRIDGE(dev); phb =3D PCI_HOST_BRIDGE(dev); @@ -889,7 +889,7 @@ PCIBus *typhoon_init(MemoryRegion *ram, ISABus **isa_bu= s, qemu_irq *p_rtc_irq, &s->pchip.reg_mem, &s->pchip.reg_io, 0, 64, TYPE_PCI_BUS); phb->bus =3D b; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 /* Host memory as seen from the PCI side, via the IOMMU. */ memory_region_init_iommu(&s->pchip.iommu, sizeof(s->pchip.iommu), diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index f8f3ef89d3..63a7105e8b 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -241,13 +241,14 @@ static void sdhci_attach_drive(SDHCIState *sdhci, Dri= veInfo *dinfo) { DeviceState *card; =20 - card =3D qdev_create(qdev_get_child_bus(DEVICE(sdhci), "sd-bus"), - TYPE_SD_CARD); + card =3D qdev_new(TYPE_SD_CARD); if (dinfo) { qdev_prop_set_drive(card, "drive", blk_by_legacy_dinfo(dinfo), &error_fatal); } - object_property_set_bool(OBJECT(card), true, "realized", &error_fa= tal); + qdev_realize_and_unref(card, + qdev_get_child_bus(DEVICE(sdhci), "sd-bus"), + &error_fatal); } =20 static void aspeed_machine_init(MachineState *machine) diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c index cd1b6d3e19..4bc4f08caf 100644 --- a/hw/arm/cubieboard.c +++ b/hw/arm/cubieboard.c @@ -92,9 +92,9 @@ static void cubieboard_init(MachineState *machine) bus =3D qdev_get_child_bus(DEVICE(a10), "sd-bus"); =20 /* Plug in SD card */ - carddev =3D qdev_create(bus, TYPE_SD_CARD); + carddev =3D qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, "realized", &error_fat= al); + qdev_realize_and_unref(carddev, bus, &error_fatal); =20 memory_region_add_subregion(get_system_memory(), AW_A10_SDRAM_BASE, machine->ram); diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 1f7253ef6f..9ff1a11f80 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -173,7 +173,7 @@ static DeviceState *pl330_create(uint32_t base, qemu_or= _irq *orgate, DeviceState *dev; int i; =20 - dev =3D qdev_create(NULL, "pl330"); + dev =3D qdev_new("pl330"); qdev_prop_set_uint8(dev, "num_events", nevents); qdev_prop_set_uint8(dev, "num_chnls", 8); qdev_prop_set_uint8(dev, "num_periph_req", nreq); @@ -184,7 +184,7 @@ static DeviceState *pl330_create(uint32_t base, qemu_or= _irq *orgate, qdev_prop_set_uint8(dev, "rd_q_dep", 8); qdev_prop_set_uint8(dev, "data_width", width); qdev_prop_set_uint16(dev, "data_buffer_dep", width); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, base); =20 @@ -232,9 +232,9 @@ static void exynos4210_realize(DeviceState *socdev, Err= or **errp) =20 /* IRQ Gate */ for (i =3D 0; i < EXYNOS4210_NCPUS; i++) { - dev =3D qdev_create(NULL, "exynos4210.irq_gate"); + dev =3D qdev_new("exynos4210.irq_gate"); qdev_prop_set_uint32(dev, "n_in", EXYNOS4210_IRQ_GATE_NINPUTS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); /* Get IRQ Gate input in gate_irq */ for (n =3D 0; n < EXYNOS4210_IRQ_GATE_NINPUTS; n++) { gate_irq[i][n] =3D qdev_get_gpio_in(dev, n); @@ -247,9 +247,9 @@ static void exynos4210_realize(DeviceState *socdev, Err= or **errp) } =20 /* Private memory region and Internal GIC */ - dev =3D qdev_create(NULL, TYPE_A9MPCORE_PRIV); + dev =3D qdev_new(TYPE_A9MPCORE_PRIV); qdev_prop_set_uint32(dev, "num-cpu", EXYNOS4210_NCPUS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, EXYNOS4210_SMP_PRIVATE_BASE_ADDR); for (n =3D 0; n < EXYNOS4210_NCPUS; n++) { @@ -263,9 +263,9 @@ static void exynos4210_realize(DeviceState *socdev, Err= or **errp) sysbus_create_simple("l2x0", EXYNOS4210_L2X0_BASE_ADDR, NULL); =20 /* External GIC */ - dev =3D qdev_create(NULL, "exynos4210.gic"); + dev =3D qdev_new("exynos4210.gic"); qdev_prop_set_uint32(dev, "num-cpu", EXYNOS4210_NCPUS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); /* Map CPU interface */ sysbus_mmio_map(busdev, 0, EXYNOS4210_EXT_GIC_CPU_BASE_ADDR); @@ -279,8 +279,8 @@ static void exynos4210_realize(DeviceState *socdev, Err= or **errp) } =20 /* Internal Interrupt Combiner */ - dev =3D qdev_create(NULL, "exynos4210.combiner"); - qdev_init_nofail(dev); + dev =3D qdev_new("exynos4210.combiner"); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); for (n =3D 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) { sysbus_connect_irq(busdev, n, s->irqs.int_gic_irq[n]); @@ -289,9 +289,9 @@ static void exynos4210_realize(DeviceState *socdev, Err= or **errp) sysbus_mmio_map(busdev, 0, EXYNOS4210_INT_COMBINER_BASE_ADDR); =20 /* External Interrupt Combiner */ - dev =3D qdev_create(NULL, "exynos4210.combiner"); + dev =3D qdev_new("exynos4210.combiner"); qdev_prop_set_uint32(dev, "external", 1); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); for (n =3D 0; n < EXYNOS4210_MAX_INT_COMBINER_OUT_IRQ; n++) { sysbus_connect_irq(busdev, n, s->irqs.ext_gic_irq[n]); @@ -353,8 +353,8 @@ static void exynos4210_realize(DeviceState *socdev, Err= or **errp) NULL); =20 /* Multi Core Timer */ - dev =3D qdev_create(NULL, "exynos4210.mct"); - qdev_init_nofail(dev); + dev =3D qdev_new("exynos4210.mct"); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); for (n =3D 0; n < 4; n++) { /* Connect global timer interrupts to Combiner gpio_in */ @@ -379,8 +379,8 @@ static void exynos4210_realize(DeviceState *socdev, Err= or **errp) i2c_irq =3D s->irq_table[exynos4210_get_irq(EXYNOS4210_HDMI_IN= TG, 1)]; } =20 - dev =3D qdev_create(NULL, "exynos4210.i2c"); - qdev_init_nofail(dev); + dev =3D qdev_new("exynos4210.i2c"); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(busdev, 0, i2c_irq); sysbus_mmio_map(busdev, 0, addr); @@ -423,9 +423,9 @@ static void exynos4210_realize(DeviceState *socdev, Err= or **errp) * public datasheet which is very similar (implementing * MMC Specification Version 4.0 being the only difference noted) */ - dev =3D qdev_create(NULL, TYPE_S3C_SDHCI); + dev =3D qdev_new(TYPE_S3C_SDHCI); qdev_prop_set_uint64(dev, "capareg", EXYNOS4210_SDHCI_CAPABILITIES= ); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 busdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, EXYNOS4210_SDHCI_ADDR(n)); @@ -433,9 +433,10 @@ static void exynos4210_realize(DeviceState *socdev, Er= ror **errp) =20 di =3D drive_get(IF_SD, 0, n); blk =3D di ? blk_by_legacy_dinfo(di) : NULL; - carddev =3D qdev_create(qdev_get_child_bus(dev, "sd-bus"), TYPE_SD= _CARD); + carddev =3D qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_abort); - qdev_init_nofail(carddev); + qdev_realize_and_unref(carddev, qdev_get_child_bus(dev, "sd-bus"), + &error_fatal); } =20 /*** Display controller (FIMD) ***/ diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index 09da52876d..d4fe9c6128 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -81,10 +81,10 @@ static void lan9215_init(uint32_t base, qemu_irq irq) /* This should be a 9215 but the 9118 is close enough */ if (nd_table[0].used) { qemu_check_nic_model(&nd_table[0], "lan9118"); - dev =3D qdev_create(NULL, TYPE_LAN9118); + dev =3D qdev_new(TYPE_LAN9118); qdev_set_nic_properties(dev, &nd_table[0]); qdev_prop_set_uint32(dev, "mode_16bit", 1); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, base); sysbus_connect_irq(s, 0, irq); diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c index b3ca82bafa..75076f2ea4 100644 --- a/hw/arm/imx25_pdk.c +++ b/hw/arm/imx25_pdk.c @@ -130,10 +130,9 @@ static void imx25_pdk_init(MachineState *machine) di =3D drive_get_next(IF_SD); blk =3D di ? blk_by_legacy_dinfo(di) : NULL; bus =3D qdev_get_child_bus(DEVICE(&s->soc.esdhc[i]), "sd-bus"); - carddev =3D qdev_create(bus, TYPE_SD_CARD); + carddev =3D qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, - "realized", &error_fatal); + qdev_realize_and_unref(carddev, bus, &error_fatal); } =20 /* diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index 5fb54e5aa7..45698307f1 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -620,9 +620,9 @@ static void integratorcp_init(MachineState *machine) 0, ram_size); memory_region_add_subregion(address_space_mem, 0x80000000, ram_alias); =20 - dev =3D qdev_create(NULL, TYPE_INTEGRATOR_CM); + dev =3D qdev_new(TYPE_INTEGRATOR_CM); qdev_prop_set_uint32(dev, "memsz", ram_size >> 20); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map((SysBusDevice *)dev, 0, 0x10000000); =20 dev =3D sysbus_create_varargs(TYPE_INTEGRATOR_PIC, 0x14000000, diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c index 5b5f23a6d4..769fe6d802 100644 --- a/hw/arm/mcimx6ul-evk.c +++ b/hw/arm/mcimx6ul-evk.c @@ -54,10 +54,9 @@ static void mcimx6ul_evk_init(MachineState *machine) di =3D drive_get_next(IF_SD); blk =3D di ? blk_by_legacy_dinfo(di) : NULL; bus =3D qdev_get_child_bus(DEVICE(&s->usdhc[i]), "sd-bus"); - carddev =3D qdev_create(bus, TYPE_SD_CARD); + carddev =3D qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, - "realized", &error_fatal); + qdev_realize_and_unref(carddev, bus, &error_fatal); } =20 if (!qtest_enabled()) { diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c index 3851cd9e3e..645ad5470f 100644 --- a/hw/arm/mcimx7d-sabre.c +++ b/hw/arm/mcimx7d-sabre.c @@ -56,10 +56,9 @@ static void mcimx7d_sabre_init(MachineState *machine) di =3D drive_get_next(IF_SD); blk =3D di ? blk_by_legacy_dinfo(di) : NULL; bus =3D qdev_get_child_bus(DEVICE(&s->usdhc[i]), "sd-bus"); - carddev =3D qdev_create(bus, TYPE_SD_CARD); + carddev =3D qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, - "realized", &error_fatal); + qdev_realize_and_unref(carddev, bus, &error_fatal); } =20 if (!qtest_enabled()) { diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 2c43041564..07d11e439f 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -246,9 +246,9 @@ static MemoryRegion *make_eth_dev(MPS2TZMachineState *m= ms, void *opaque, * except that it doesn't support the checksum-offload feature. */ qemu_check_nic_model(nd, "lan9118"); - mms->lan9118 =3D qdev_create(NULL, TYPE_LAN9118); + mms->lan9118 =3D qdev_new(TYPE_LAN9118); qdev_set_nic_properties(mms->lan9118, nd); - qdev_init_nofail(mms->lan9118); + qdev_realize_and_unref(mms->lan9118, NULL, &error_fatal); =20 s =3D SYS_BUS_DEVICE(mms->lan9118); sysbus_connect_irq(s, 0, get_sse_irq_in(mms, 16)); diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c index dbd35b6def..e398703742 100644 --- a/hw/arm/msf2-som.c +++ b/hw/arm/msf2-som.c @@ -61,7 +61,7 @@ static void emcraft_sf2_s2s010_init(MachineState *machine) &error_fatal); memory_region_add_subregion(sysmem, DDR_BASE_ADDRESS, ddr); =20 - dev =3D qdev_create(NULL, TYPE_MSF2_SOC); + dev =3D qdev_new(TYPE_MSF2_SOC); qdev_prop_set_string(dev, "part-name", "M2S010"); qdev_prop_set_string(dev, "cpu-type", mc->default_cpu_type); =20 @@ -77,7 +77,7 @@ static void emcraft_sf2_s2s010_init(MachineState *machine) qdev_prop_set_uint32(dev, "apb0div", 2); qdev_prop_set_uint32(dev, "apb1div", 2); =20 - object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 soc =3D MSF2_SOC(dev); =20 diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 92f33ed87e..d03351e5fa 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1651,9 +1651,9 @@ static void musicpal_init(MachineState *machine) sysbus_create_simple(TYPE_MV88W8618_FLASHCFG, MP_FLASHCFG_BASE, NULL); =20 qemu_check_nic_model(&nd_table[0], "mv88w8618"); - dev =3D qdev_create(NULL, TYPE_MV88W8618_ETH); + dev =3D qdev_new(TYPE_MV88W8618_ETH); qdev_set_nic_properties(dev, &nd_table[0]); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MP_ETH_BASE); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[MP_ETH_IRQ]); =20 @@ -1688,11 +1688,11 @@ static void musicpal_init(MachineState *machine) } =20 wm8750_dev =3D i2c_create_slave(i2c, TYPE_WM8750, MP_WM_ADDR); - dev =3D qdev_create(NULL, TYPE_MV88W8618_AUDIO); + dev =3D qdev_new(TYPE_MV88W8618_AUDIO); s =3D SYS_BUS_DEVICE(dev); object_property_set_link(OBJECT(dev), OBJECT(wm8750_dev), "wm8750", NULL); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(s, 0, MP_AUDIO_BASE); sysbus_connect_irq(s, 0, pic[MP_AUDIO_IRQ]); =20 diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c index e770d9cac8..6bd8e4e197 100644 --- a/hw/arm/netduino2.c +++ b/hw/arm/netduino2.c @@ -34,9 +34,9 @@ static void netduino2_init(MachineState *machine) { DeviceState *dev; =20 - dev =3D qdev_create(NULL, TYPE_STM32F205_SOC); + dev =3D qdev_new(TYPE_STM32F205_SOC); qdev_prop_set_string(dev, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3")); - object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, FLASH_SIZE); diff --git a/hw/arm/netduinoplus2.c b/hw/arm/netduinoplus2.c index e5e247edbe..8d4b3d7c43 100644 --- a/hw/arm/netduinoplus2.c +++ b/hw/arm/netduinoplus2.c @@ -34,9 +34,9 @@ static void netduinoplus2_init(MachineState *machine) { DeviceState *dev; =20 - dev =3D qdev_create(NULL, TYPE_STM32F405_SOC); + dev =3D qdev_new(TYPE_STM32F405_SOC); qdev_prop_set_string(dev, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m4")); - object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c index eae800b5c1..856fa565a4 100644 --- a/hw/arm/nseries.c +++ b/hw/arm/nseries.c @@ -174,7 +174,7 @@ static void n8x0_nand_setup(struct n800_s *s) char *otp_region; DriveInfo *dinfo; =20 - s->nand =3D qdev_create(NULL, "onenand"); + s->nand =3D qdev_new("onenand"); qdev_prop_set_uint16(s->nand, "manufacturer_id", NAND_MFR_SAMSUNG); /* Either 0x40 or 0x48 are OK for the device ID */ qdev_prop_set_uint16(s->nand, "device_id", 0x48); @@ -185,7 +185,7 @@ static void n8x0_nand_setup(struct n800_s *s) qdev_prop_set_drive(s->nand, "drive", blk_by_legacy_dinfo(dinfo), &error_fatal); } - qdev_init_nofail(s->nand); + qdev_realize_and_unref(s->nand, NULL, &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(s->nand), 0, qdev_get_gpio_in(s->mpu->gpio, N8X0_ONENAND_GPIO)); omap_gpmc_attach(s->mpu->gpmc, N8X0_ONENAND_CS, @@ -802,9 +802,9 @@ static void n8x0_uart_setup(struct n800_s *s) static void n8x0_usb_setup(struct n800_s *s) { SysBusDevice *dev; - s->usb =3D qdev_create(NULL, "tusb6010"); + s->usb =3D qdev_new("tusb6010"); dev =3D SYS_BUS_DEVICE(s->usb); - qdev_init_nofail(s->usb); + qdev_realize_and_unref(s->usb, NULL, &error_fatal); sysbus_connect_irq(dev, 0, qdev_get_gpio_in(s->mpu->gpio, N8X0_TUSB_INT_GPIO)); /* Using the NOR interface */ diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 761cc17ea9..c11d6da9d5 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -3887,20 +3887,20 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryReg= ion *dram, =20 omap_clkm_init(system_memory, 0xfffece00, 0xe1008000, s); =20 - s->ih[0] =3D qdev_create(NULL, "omap-intc"); + s->ih[0] =3D qdev_new("omap-intc"); qdev_prop_set_uint32(s->ih[0], "size", 0x100); omap_intc_set_iclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "arminth_ck")); - qdev_init_nofail(s->ih[0]); + qdev_realize_and_unref(s->ih[0], NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(s->ih[0]); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ)); sysbus_connect_irq(busdev, 1, qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_FIQ)); sysbus_mmio_map(busdev, 0, 0xfffecb00); - s->ih[1] =3D qdev_create(NULL, "omap-intc"); + s->ih[1] =3D qdev_new("omap-intc"); qdev_prop_set_uint32(s->ih[1], "size", 0x800); omap_intc_set_iclk(OMAP_INTC(s->ih[1]), omap_findclk(s, "arminth_ck")); - qdev_init_nofail(s->ih[1]); + qdev_realize_and_unref(s->ih[1], NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(s->ih[1]); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_15XX_IH2_IRQ)); @@ -4010,10 +4010,10 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryReg= ion *dram, qdev_get_gpio_in(s->ih[1], OMAP_INT_MPUIO), s->wakeup, omap_findclk(s, "clk32-kHz")); =20 - s->gpio =3D qdev_create(NULL, "omap-gpio"); + s->gpio =3D qdev_new("omap-gpio"); qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model); omap_gpio_set_clk(OMAP1_GPIO(s->gpio), omap_findclk(s, "arm_gpio_ck")); - qdev_init_nofail(s->gpio); + qdev_realize_and_unref(s->gpio, NULL, &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(s->gpio), 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_GPIO_BANK1)); sysbus_mmio_map(SYS_BUS_DEVICE(s->gpio), 0, 0xfffce000); @@ -4028,10 +4028,10 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryReg= ion *dram, s->pwt =3D omap_pwt_init(system_memory, 0xfffb6000, omap_findclk(s, "armxor_ck")); =20 - s->i2c[0] =3D qdev_create(NULL, "omap_i2c"); + s->i2c[0] =3D qdev_new("omap_i2c"); qdev_prop_set_uint8(s->i2c[0], "revision", 0x11); omap_i2c_set_fclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "mpuper_ck")); - qdev_init_nofail(s->i2c[0]); + qdev_realize_and_unref(s->i2c[0], NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(s->i2c[0]); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[1], OMAP_INT_I2C)= ); sysbus_connect_irq(busdev, 1, s->drq[OMAP_DMA_I2C_TX]); diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index e1c11de5ce..b45ed5c9ec 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -2306,11 +2306,11 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRe= gion *sdram, s->l4 =3D omap_l4_init(sysmem, OMAP2_L4_BASE, 54); =20 /* Actually mapped at any 2K boundary in the ARM11 private-peripheral = if */ - s->ih[0] =3D qdev_create(NULL, "omap2-intc"); + s->ih[0] =3D qdev_new("omap2-intc"); qdev_prop_set_uint8(s->ih[0], "revision", 0x21); omap_intc_set_fclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "mpu_intc_fclk= ")); omap_intc_set_iclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "mpu_intc_iclk= ")); - qdev_init_nofail(s->ih[0]); + qdev_realize_and_unref(s->ih[0], NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(s->ih[0]); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ)); @@ -2423,11 +2423,11 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRe= gion *sdram, omap_findclk(s, "clk32-kHz"), omap_findclk(s, "core_l4_iclk")); =20 - s->i2c[0] =3D qdev_create(NULL, "omap_i2c"); + s->i2c[0] =3D qdev_new("omap_i2c"); qdev_prop_set_uint8(s->i2c[0], "revision", 0x34); omap_i2c_set_iclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "i2c1.iclk")); omap_i2c_set_fclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "i2c1.fclk")); - qdev_init_nofail(s->i2c[0]); + qdev_realize_and_unref(s->i2c[0], NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(s->i2c[0]); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_I2C1_IRQ)); @@ -2435,11 +2435,11 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRe= gion *sdram, sysbus_connect_irq(busdev, 2, s->drq[OMAP24XX_DMA_I2C1_RX]); sysbus_mmio_map(busdev, 0, omap_l4_region_base(omap_l4tao(s->l4, 5), 0= )); =20 - s->i2c[1] =3D qdev_create(NULL, "omap_i2c"); + s->i2c[1] =3D qdev_new("omap_i2c"); qdev_prop_set_uint8(s->i2c[1], "revision", 0x34); omap_i2c_set_iclk(OMAP_I2C(s->i2c[1]), omap_findclk(s, "i2c2.iclk")); omap_i2c_set_fclk(OMAP_I2C(s->i2c[1]), omap_findclk(s, "i2c2.fclk")); - qdev_init_nofail(s->i2c[1]); + qdev_realize_and_unref(s->i2c[1], NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(s->i2c[1]); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_I2C2_IRQ)); @@ -2447,7 +2447,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegi= on *sdram, sysbus_connect_irq(busdev, 2, s->drq[OMAP24XX_DMA_I2C2_RX]); sysbus_mmio_map(busdev, 0, omap_l4_region_base(omap_l4tao(s->l4, 6), 0= )); =20 - s->gpio =3D qdev_create(NULL, "omap2-gpio"); + s->gpio =3D qdev_new("omap2-gpio"); qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model); omap2_gpio_set_iclk(OMAP2_GPIO(s->gpio), omap_findclk(s, "gpio_iclk")); omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 0, omap_findclk(s, "gpio1_dbc= lk")); @@ -2458,7 +2458,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegi= on *sdram, omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 4, omap_findclk(s, "gpio5_dbclk")); } - qdev_init_nofail(s->gpio); + qdev_realize_and_unref(s->gpio, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(s->gpio); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_GPIO_BANK1= )); diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index b291715f27..44a333a6eb 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -94,9 +94,9 @@ static void orangepi_init(MachineState *machine) bus =3D qdev_get_child_bus(DEVICE(h3), "sd-bus"); =20 /* Plug in SD card */ - carddev =3D qdev_create(bus, TYPE_SD_CARD); + carddev =3D qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, "realized", &error_fat= al); + qdev_realize_and_unref(carddev, bus, &error_fatal); =20 /* SDRAM */ memory_region_add_subregion(get_system_memory(), h3->memmap[AW_H3_SDRA= M], diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index e649f8930c..e21ba1af3e 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -1510,10 +1510,10 @@ PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base, PXA2xxI2CState *s; I2CBus *i2cbus; =20 - dev =3D qdev_create(NULL, TYPE_PXA2XX_I2C); + dev =3D qdev_new(TYPE_PXA2XX_I2C); qdev_prop_set_uint32(dev, "size", region_size + 1); qdev_prop_set_uint32(dev, "offset", base & region_size); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 i2c_dev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(i2c_dev, 0, base & ~region_size); @@ -2073,9 +2073,9 @@ static PXA2xxFIrState *pxa2xx_fir_init(MemoryRegion *= sysmem, DeviceState *dev; SysBusDevice *sbd; =20 - dev =3D qdev_create(NULL, TYPE_PXA2XX_FIR); + dev =3D qdev_new(TYPE_PXA2XX_FIR); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sbd =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(sbd, 0, base); sysbus_connect_irq(sbd, 0, irq); diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c index a01db54a51..27199af43c 100644 --- a/hw/arm/pxa2xx_gpio.c +++ b/hw/arm/pxa2xx_gpio.c @@ -14,6 +14,7 @@ #include "hw/sysbus.h" #include "migration/vmstate.h" #include "hw/arm/pxa.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" =20 @@ -269,10 +270,10 @@ DeviceState *pxa2xx_gpio_init(hwaddr base, CPUState *cs =3D CPU(cpu); DeviceState *dev; =20 - dev =3D qdev_create(NULL, TYPE_PXA2XX_GPIO); + dev =3D qdev_new(TYPE_PXA2XX_GPIO); qdev_prop_set_int32(dev, "lines", lines); qdev_prop_set_int32(dev, "ncpu", cs->cpu_index); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c index 203d4d28af..4c451cf540 100644 --- a/hw/arm/pxa2xx_pic.c +++ b/hw/arm/pxa2xx_pic.c @@ -9,6 +9,7 @@ */ =20 #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/module.h" #include "cpu.h" #include "hw/arm/pxa.h" @@ -267,7 +268,7 @@ static int pxa2xx_pic_post_load(void *opaque, int versi= on_id) =20 DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu) { - DeviceState *dev =3D qdev_create(NULL, TYPE_PXA2XX_PIC); + DeviceState *dev =3D qdev_new(TYPE_PXA2XX_PIC); PXA2xxPICState *s =3D PXA2XX_PIC(dev); =20 s->cpu =3D cpu; @@ -279,7 +280,7 @@ DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu) s->is_fiq[0] =3D 0; s->is_fiq[1] =3D 0; =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 qdev_init_gpio_in(dev, pxa2xx_pic_set_irq, PXA2XX_PIC_SRCS); =20 diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index a2efe0b94d..a8e26a70bb 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -297,9 +297,9 @@ static void raspi_machine_init(MachineState *machine) error_report("No SD bus found in SOC object"); exit(1); } - carddev =3D qdev_create(bus, TYPE_SD_CARD); + carddev =3D qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, "realized", &error_fat= al); + qdev_realize_and_unref(carddev, bus, &error_fatal); =20 vcram_size =3D object_property_get_uint(OBJECT(&s->soc), "vcram-size", &error_abort); diff --git a/hw/arm/realview.c b/hw/arm/realview.c index 8fcdf75a2b..128146448c 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -161,16 +161,16 @@ static void realview_init(MachineState *machine, } =20 sys_id =3D is_pb ? 0x01780500 : 0xc1400400; - sysctl =3D qdev_create(NULL, "realview_sysctl"); + sysctl =3D qdev_new("realview_sysctl"); qdev_prop_set_uint32(sysctl, "sys_id", sys_id); qdev_prop_set_uint32(sysctl, "proc_id", proc_id); - qdev_init_nofail(sysctl); + qdev_realize_and_unref(sysctl, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000); =20 if (is_mpcore) { - dev =3D qdev_create(NULL, is_pb ? TYPE_A9MPCORE_PRIV : "realview_m= pcore"); + dev =3D qdev_new(is_pb ? TYPE_A9MPCORE_PRIV : "realview_mpcore"); qdev_prop_set_uint32(dev, "num-cpu", smp_cpus); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, periphbase); for (n =3D 0; n < smp_cpus; n++) { @@ -188,9 +188,9 @@ static void realview_init(MachineState *machine, pic[n] =3D qdev_get_gpio_in(dev, n); } =20 - pl041 =3D qdev_create(NULL, "pl041"); + pl041 =3D qdev_new("pl041"); qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512); - qdev_init_nofail(pl041); + qdev_realize_and_unref(pl041, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000); sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, pic[19]); =20 @@ -203,10 +203,10 @@ static void realview_init(MachineState *machine, pl011_create(0x1000c000, pic[15], serial_hd(3)); =20 /* DMA controller is optional, apparently. */ - dev =3D qdev_create(NULL, "pl081"); + dev =3D qdev_new("pl081"); object_property_set_link(OBJECT(dev), OBJECT(sysmem), "downstream", &error_fatal); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, 0x10030000); sysbus_connect_irq(busdev, 0, pic[24]); @@ -239,9 +239,9 @@ static void realview_init(MachineState *machine, sysbus_create_simple("pl031", 0x10017000, pic[10]); =20 if (!is_pb) { - dev =3D qdev_create(NULL, "realview_pci"); + dev =3D qdev_new("realview_pci"); busdev =3D SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(busdev, 0, 0x10019000); /* PCI controller register= s */ sysbus_mmio_map(busdev, 1, 0x60000000); /* PCI self-config */ sysbus_mmio_map(busdev, 2, 0x61000000); /* PCI config */ diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 6a0221a681..d68c5d87af 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -339,7 +339,7 @@ static void create_gic(SBSAMachineState *sms) =20 gictype =3D gicv3_class_name(); =20 - sms->gic =3D qdev_create(NULL, gictype); + sms->gic =3D qdev_new(gictype); qdev_prop_set_uint32(sms->gic, "revision", 3); qdev_prop_set_uint32(sms->gic, "num-cpu", smp_cpus); /* @@ -356,7 +356,7 @@ static void create_gic(SBSAMachineState *sms) qdev_prop_set_uint32(sms->gic, "len-redist-region-count", 1); qdev_prop_set_uint32(sms->gic, "redist-region-count[0]", redist0_count= ); =20 - qdev_init_nofail(sms->gic); + qdev_realize_and_unref(sms->gic, NULL, &error_fatal); gicbusdev =3D SYS_BUS_DEVICE(sms->gic); sysbus_mmio_map(gicbusdev, 0, sbsa_ref_memmap[SBSA_GIC_DIST].base); sysbus_mmio_map(gicbusdev, 1, sbsa_ref_memmap[SBSA_GIC_REDIST].base); @@ -409,11 +409,11 @@ static void create_uart(const SBSAMachineState *sms, = int uart, { hwaddr base =3D sbsa_ref_memmap[uart].base; int irq =3D sbsa_ref_irqmap[uart]; - DeviceState *dev =3D qdev_create(NULL, TYPE_PL011); + DeviceState *dev =3D qdev_new(TYPE_PL011); SysBusDevice *s =3D SYS_BUS_DEVICE(dev); =20 qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); memory_region_add_subregion(mem, base, sysbus_mmio_get_region(s, 0)); sysbus_connect_irq(s, 0, qdev_get_gpio_in(sms->gic, irq)); @@ -464,9 +464,9 @@ static void create_ahci(const SBSAMachineState *sms) AHCIState *ahci; int i; =20 - dev =3D qdev_create(NULL, "sysbus-ahci"); + dev =3D qdev_new("sysbus-ahci"); qdev_prop_set_uint32(dev, "num-ports", NUM_SATA_PORTS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(sms->gic, = irq)); =20 @@ -497,11 +497,11 @@ static void create_smmu(const SBSAMachineState *sms, = PCIBus *bus) DeviceState *dev; int i; =20 - dev =3D qdev_create(NULL, "arm-smmuv3"); + dev =3D qdev_new("arm-smmuv3"); =20 object_property_set_link(OBJECT(dev), OBJECT(bus), "primary-bus", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); for (i =3D 0; i < NUM_SMMU_IRQS; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, @@ -525,8 +525,8 @@ static void create_pcie(SBSAMachineState *sms) PCIHostState *pci; int i; =20 - dev =3D qdev_create(NULL, TYPE_GPEX_HOST); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_GPEX_HOST); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 /* Map ECAM space */ ecam_alias =3D g_new0(MemoryRegion, 1); diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index c28d9b5ed7..edae6bf8be 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -155,7 +155,7 @@ static void sl_flash_register(PXA2xxState *cpu, int siz= e) { DeviceState *dev; =20 - dev =3D qdev_create(NULL, TYPE_SL_NAND); + dev =3D qdev_new(TYPE_SL_NAND); =20 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG); if (size =3D=3D FLASH_128M) @@ -163,7 +163,7 @@ static void sl_flash_register(PXA2xxState *cpu, int siz= e) else if (size =3D=3D FLASH_1024M) qdev_prop_set_uint8(dev, "chip_id", 0xf1); =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE); } =20 diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index d136ba1a92..f824cbd498 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -1308,14 +1308,14 @@ static void stellaris_init(MachineState *ms, stella= ris_board_info *board) &error_fatal); memory_region_add_subregion(system_memory, 0x20000000, sram); =20 - nvic =3D qdev_create(NULL, TYPE_ARMV7M); + nvic =3D qdev_new(TYPE_ARMV7M); qdev_prop_set_uint32(nvic, "num-irq", NUM_IRQ_LINES); qdev_prop_set_string(nvic, "cpu-type", ms->cpu_type); qdev_prop_set_bit(nvic, "enable-bitband", true); object_property_set_link(OBJECT(nvic), OBJECT(get_system_memory()), "memory", &error_abort); /* This will exit with an error if the user passed us a bad cpu_type */ - qdev_init_nofail(nvic); + qdev_realize_and_unref(nvic, NULL, &error_fatal); =20 qdev_connect_gpio_out_named(nvic, "SYSRESETREQ", 0, qemu_allocate_irq(&do_sys_reset, NULL, 0)); @@ -1347,13 +1347,13 @@ static void stellaris_init(MachineState *ms, stella= ris_board_info *board) =20 =20 if (board->dc1 & (1 << 3)) { /* watchdog present */ - dev =3D qdev_create(NULL, TYPE_LUMINARY_WATCHDOG); + dev =3D qdev_new(TYPE_LUMINARY_WATCHDOG); =20 /* system_clock_scale is valid now */ uint32_t mainclk =3D NANOSECONDS_PER_SECOND / system_clock_scale; qdev_prop_set_uint32(dev, "wdogclk-frq", mainclk); =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x40000000u); @@ -1425,9 +1425,9 @@ static void stellaris_init(MachineState *ms, stellari= s_board_info *board) =20 qemu_check_nic_model(&nd_table[0], "stellaris"); =20 - enet =3D qdev_create(NULL, "stellaris_enet"); + enet =3D qdev_new("stellaris_enet"); qdev_set_nic_properties(enet, &nd_table[0]); - qdev_init_nofail(enet); + qdev_realize_and_unref(enet, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(enet), 0, 0x40048000); sysbus_connect_irq(SYS_BUS_DEVICE(enet), 0, qdev_get_gpio_in(nvic,= 42)); } diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 3010d765bb..108ed8d147 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -42,6 +42,7 @@ #include "chardev/char-serial.h" #include "sysemu/sysemu.h" #include "hw/ssi/ssi.h" +#include "qapi/error.h" #include "qemu/cutils.h" #include "qemu/log.h" =20 @@ -644,8 +645,8 @@ static DeviceState *strongarm_gpio_init(hwaddr base, DeviceState *dev; int i; =20 - dev =3D qdev_create(NULL, TYPE_STRONGARM_GPIO); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_STRONGARM_GPIO); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); for (i =3D 0; i < 12; i++) @@ -1626,9 +1627,9 @@ StrongARMState *sa1110_init(const char *cpu_type) s->ppc =3D sysbus_create_varargs(TYPE_STRONGARM_PPC, 0x90060000, NULL); =20 for (i =3D 0; sa_serial[i].io_base; i++) { - DeviceState *dev =3D qdev_create(NULL, TYPE_STRONGARM_UART); + DeviceState *dev =3D qdev_new(TYPE_STRONGARM_UART); qdev_prop_set_chr(dev, "chardev", serial_hd(i)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, sa_serial[i].io_base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index f3c4a50b19..154fa72f33 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -223,10 +223,10 @@ static void versatile_init(MachineState *machine, int= board_id) /* SDRAM at address zero. */ memory_region_add_subregion(sysmem, 0, machine->ram); =20 - sysctl =3D qdev_create(NULL, "realview_sysctl"); + sysctl =3D qdev_new("realview_sysctl"); qdev_prop_set_uint32(sysctl, "sys_id", 0x41007004); qdev_prop_set_uint32(sysctl, "proc_id", 0x02000000); - qdev_init_nofail(sysctl); + qdev_realize_and_unref(sysctl, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000); =20 dev =3D sysbus_create_varargs("pl190", 0x10140000, @@ -245,9 +245,9 @@ static void versatile_init(MachineState *machine, int b= oard_id) sysbus_create_simple("pl050_keyboard", 0x10006000, sic[3]); sysbus_create_simple("pl050_mouse", 0x10007000, sic[4]); =20 - dev =3D qdev_create(NULL, "versatile_pci"); + dev =3D qdev_new("versatile_pci"); busdev =3D SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(busdev, 0, 0x10001000); /* PCI controller regs */ sysbus_mmio_map(busdev, 1, 0x41000000); /* PCI self-config */ sysbus_mmio_map(busdev, 2, 0x42000000); /* PCI config */ @@ -286,10 +286,10 @@ static void versatile_init(MachineState *machine, int= board_id) pl011_create(0x101f3000, pic[14], serial_hd(2)); pl011_create(0x10009000, sic[6], serial_hd(3)); =20 - dev =3D qdev_create(NULL, "pl080"); + dev =3D qdev_new("pl080"); object_property_set_link(OBJECT(dev), OBJECT(sysmem), "downstream", &error_fatal); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, 0x10130000); sysbus_connect_irq(busdev, 0, pic[17]); @@ -319,9 +319,9 @@ static void versatile_init(MachineState *machine, int b= oard_id) i2c_create_slave(i2c, "ds1338", 0x68); =20 /* Add PL041 AACI Interface to the LM4549 codec */ - pl041 =3D qdev_create(NULL, "pl041"); + pl041 =3D qdev_new("pl041"); qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512); - qdev_init_nofail(pl041); + qdev_realize_and_unref(pl041, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000); sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, sic[24]); =20 diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index 69ee4988f9..ef29e9f5ae 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -236,9 +236,9 @@ static void init_cpus(MachineState *ms, const char *cpu= _type, * this must happen after the CPUs are created because a15mpcore_priv * wires itself up to the CPU's generic_timer gpio out lines. */ - dev =3D qdev_create(NULL, privdev); + dev =3D qdev_new(privdev); qdev_prop_set_uint32(dev, "num-cpu", smp_cpus); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, periphbase); =20 @@ -514,7 +514,7 @@ static void vexpress_modify_dtb(const struct arm_boot_i= nfo *info, void *fdt) static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr base, const char *name, DriveInfo *di) { - DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); + DeviceState *dev =3D qdev_new(TYPE_PFLASH_CFI01); =20 if (di) { qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(di), @@ -532,7 +532,7 @@ static PFlashCFI01 *ve_pflash_cfi01_register(hwaddr bas= e, const char *name, qdev_prop_set_uint16(dev, "id2", 0x00); qdev_prop_set_uint16(dev, "id3", 0x00); qdev_prop_set_string(dev, "name", name); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return PFLASH_CFI01(dev); @@ -593,7 +593,7 @@ static void vexpress_common_init(MachineState *machine) =20 sys_id =3D 0x1190f500; =20 - sysctl =3D qdev_create(NULL, "realview_sysctl"); + sysctl =3D qdev_new("realview_sysctl"); qdev_prop_set_uint32(sysctl, "sys_id", sys_id); qdev_prop_set_uint32(sysctl, "proc_id", daughterboard->proc_id); qdev_prop_set_uint32(sysctl, "len-db-voltage", @@ -610,15 +610,15 @@ static void vexpress_common_init(MachineState *machin= e) qdev_prop_set_uint32(sysctl, propname, daughterboard->clocks[i]); g_free(propname); } - qdev_init_nofail(sysctl); + qdev_realize_and_unref(sysctl, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, map[VE_SYSREGS]); =20 /* VE_SP810: not modelled */ /* VE_SERIALPCI: not modelled */ =20 - pl041 =3D qdev_create(NULL, "pl041"); + pl041 =3D qdev_new("pl041"); qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512); - qdev_init_nofail(pl041); + qdev_realize_and_unref(pl041, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, map[VE_PL041]); sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, pic[11]); =20 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 37462a6f78..154cd24731 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -572,14 +572,14 @@ static inline DeviceState *create_acpi_ged(VirtMachin= eState *vms) event |=3D ACPI_GED_NVDIMM_HOTPLUG_EVT; } =20 - dev =3D qdev_create(NULL, TYPE_ACPI_GED); + dev =3D qdev_new(TYPE_ACPI_GED); qdev_prop_set_uint32(dev, "ged-event", event); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].bas= e); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, vms->memmap[VIRT_PCDIMM_ACPI].= base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(vms->gic, = irq)); =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 return dev; } @@ -594,11 +594,11 @@ static void create_its(VirtMachineState *vms) return; } =20 - dev =3D qdev_create(NULL, itsclass); + dev =3D qdev_new(itsclass); =20 object_property_set_link(OBJECT(dev), OBJECT(vms->gic), "parent-gicv3", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_GIC_ITS].base= ); =20 fdt_add_its_gic_node(vms); @@ -610,11 +610,11 @@ static void create_v2m(VirtMachineState *vms) int irq =3D vms->irqmap[VIRT_GIC_V2M]; DeviceState *dev; =20 - dev =3D qdev_create(NULL, "arm-gicv2m"); + dev =3D qdev_new("arm-gicv2m"); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_GIC_V2M].base= ); qdev_prop_set_uint32(dev, "base-spi", irq); qdev_prop_set_uint32(dev, "num-spi", NUM_GICV2M_SPIS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 for (i =3D 0; i < NUM_GICV2M_SPIS; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, @@ -636,7 +636,7 @@ static void create_gic(VirtMachineState *vms) =20 gictype =3D (type =3D=3D 3) ? gicv3_class_name() : gic_class_name(); =20 - vms->gic =3D qdev_create(NULL, gictype); + vms->gic =3D qdev_new(gictype); qdev_prop_set_uint32(vms->gic, "revision", type); qdev_prop_set_uint32(vms->gic, "num-cpu", smp_cpus); /* Note that the num-irq property counts both internal and external @@ -671,7 +671,7 @@ static void create_gic(VirtMachineState *vms) vms->virt); } } - qdev_init_nofail(vms->gic); + qdev_realize_and_unref(vms->gic, NULL, &error_fatal); gicbusdev =3D SYS_BUS_DEVICE(vms->gic); sysbus_mmio_map(gicbusdev, 0, vms->memmap[VIRT_GIC_DIST].base); if (type =3D=3D 3) { @@ -754,11 +754,11 @@ static void create_uart(const VirtMachineState *vms, = int uart, int irq =3D vms->irqmap[uart]; const char compat[] =3D "arm,pl011\0arm,primecell"; const char clocknames[] =3D "uartclk\0apb_pclk"; - DeviceState *dev =3D qdev_create(NULL, TYPE_PL011); + DeviceState *dev =3D qdev_new(TYPE_PL011); SysBusDevice *s =3D SYS_BUS_DEVICE(dev); =20 qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); memory_region_add_subregion(mem, base, sysbus_mmio_get_region(s, 0)); sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq)); @@ -1173,11 +1173,11 @@ static void create_smmu(const VirtMachineState *vms, return; } =20 - dev =3D qdev_create(NULL, "arm-smmuv3"); + dev =3D qdev_new("arm-smmuv3"); =20 object_property_set_link(OBJECT(dev), OBJECT(bus), "primary-bus", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); for (i =3D 0; i < NUM_SMMU_IRQS; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, @@ -1253,8 +1253,8 @@ static void create_pcie(VirtMachineState *vms) int i, ecam_id; PCIHostState *pci; =20 - dev =3D qdev_create(NULL, TYPE_GPEX_HOST); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_GPEX_HOST); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 ecam_id =3D VIRT_ECAM_ID(vms->highmem_ecam); base_ecam =3D vms->memmap[ecam_id].base; @@ -1372,11 +1372,11 @@ static void create_platform_bus(VirtMachineState *v= ms) int i; MemoryRegion *sysmem =3D get_system_memory(); =20 - dev =3D qdev_create(NULL, TYPE_PLATFORM_BUS_DEVICE); + dev =3D qdev_new(TYPE_PLATFORM_BUS_DEVICE); dev->id =3D TYPE_PLATFORM_BUS_DEVICE; qdev_prop_set_uint32(dev, "num_irqs", PLATFORM_BUS_NUM_IRQS); qdev_prop_set_uint32(dev, "mmio_size", vms->memmap[VIRT_PLATFORM_BUS].= size); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); vms->platform_bus_dev =3D dev; =20 s =3D SYS_BUS_DEVICE(dev); diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index cb933efb49..5fbd2b2e31 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -114,12 +114,12 @@ static void gem_init(NICInfo *nd, uint32_t base, qemu= _irq irq) DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, TYPE_CADENCE_GEM); + dev =3D qdev_new(TYPE_CADENCE_GEM); if (nd->used) { qemu_check_nic_model(nd, TYPE_CADENCE_GEM); qdev_set_nic_properties(dev, nd); } - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, base); sysbus_connect_irq(s, 0, irq); @@ -136,11 +136,11 @@ static inline void zynq_init_spi_flashes(uint32_t bas= e_addr, qemu_irq irq, int num_busses =3D is_qspi ? NUM_QSPI_BUSSES : 1; int num_ss =3D is_qspi ? NUM_QSPI_FLASHES : NUM_SPI_FLASHES; =20 - dev =3D qdev_create(NULL, is_qspi ? "xlnx.ps7-qspi" : "xlnx.ps7-spi"); + dev =3D qdev_new(is_qspi ? "xlnx.ps7-qspi" : "xlnx.ps7-spi"); qdev_prop_set_uint8(dev, "num-txrx-bytes", is_qspi ? 4 : 1); qdev_prop_set_uint8(dev, "num-ss-bits", num_ss); qdev_prop_set_uint8(dev, "num-busses", num_busses); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, base_addr); if (is_qspi) { @@ -222,8 +222,8 @@ static void zynq_init(MachineState *machine) 0); =20 /* Create slcr, keep a pointer to connect clocks */ - slcr =3D qdev_create(NULL, "xilinx,zynq_slcr"); - qdev_init_nofail(slcr); + slcr =3D qdev_new("xilinx,zynq_slcr"); + qdev_realize_and_unref(slcr, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(slcr), 0, 0xF8000000); =20 /* Create the main clock source, and feed slcr with it */ @@ -234,9 +234,9 @@ static void zynq_init(MachineState *machine) clock_set_hz(zynq_machine->ps_clk, PS_CLK_FREQUENCY); qdev_connect_clock_in(slcr, "ps_clk", zynq_machine->ps_clk); =20 - dev =3D qdev_create(NULL, TYPE_A9MPCORE_PRIV); + dev =3D qdev_new(TYPE_A9MPCORE_PRIV); qdev_prop_set_uint32(dev, "num-cpu", 1); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, MPCORE_PERIPHBASE); sysbus_connect_irq(busdev, 0, @@ -280,27 +280,27 @@ static void zynq_init(MachineState *machine) * - SDIO Specification Version 2.0 * - MMC Specification Version 3.31 */ - dev =3D qdev_create(NULL, TYPE_SYSBUS_SDHCI); + dev =3D qdev_new(TYPE_SYSBUS_SDHCI); qdev_prop_set_uint8(dev, "sd-spec-version", 2); qdev_prop_set_uint64(dev, "capareg", ZYNQ_SDHCI_CAPABILITIES); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, hci_addr); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[hci_irq - IRQ_OFFSE= T]); =20 di =3D drive_get_next(IF_SD); blk =3D di ? blk_by_legacy_dinfo(di) : NULL; - carddev =3D qdev_create(qdev_get_child_bus(dev, "sd-bus"), TYPE_SD= _CARD); + carddev =3D qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, "realized", - &error_fatal); + qdev_realize_and_unref(carddev, qdev_get_child_bus(dev, "sd-bus"), + &error_fatal); } =20 - dev =3D qdev_create(NULL, TYPE_ZYNQ_XADC); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_ZYNQ_XADC); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xF8007100); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[39-IRQ_OFFSET]); =20 - dev =3D qdev_create(NULL, "pl330"); + dev =3D qdev_new("pl330"); qdev_prop_set_uint8(dev, "num_chnls", 8); qdev_prop_set_uint8(dev, "num_periph_req", 4); qdev_prop_set_uint8(dev, "num_events", 16); @@ -312,7 +312,7 @@ static void zynq_init(MachineState *machine) qdev_prop_set_uint8(dev, "rd_q_dep", 16); qdev_prop_set_uint16(dev, "data_buffer_dep", 256); =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, 0xF8003000); sysbus_connect_irq(busdev, 0, pic[45-IRQ_OFFSET]); /* abort irq line */ @@ -320,8 +320,8 @@ static void zynq_init(MachineState *machine) sysbus_connect_irq(busdev, n + 1, pic[dma_irqs[n] - IRQ_OFFSET]); } =20 - dev =3D qdev_create(NULL, "xlnx.ps7-dev-cfg"); - qdev_init_nofail(dev); + dev =3D qdev_new("xlnx.ps7-dev-cfg"); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(busdev, 0, pic[40 - IRQ_OFFSET]); sysbus_mmio_map(busdev, 0, 0xF8007000); diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 43a71e2eea..fb37b235fe 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -432,9 +432,9 @@ static void create_virtio_regions(VersalVirt *s) qemu_irq pic_irq; =20 pic_irq =3D qdev_get_gpio_in(DEVICE(&s->soc.fpd.apu.gic), irq); - dev =3D qdev_create(NULL, "virtio-mmio"); + dev =3D qdev_new("virtio-mmio"); object_property_add_child(OBJECT(&s->soc), name, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic_irq); mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion(&s->soc.mr_ps, base, mr); @@ -463,10 +463,11 @@ static void sd_plugin_card(SDHCIState *sd, DriveInfo = *di) BlockBackend *blk =3D di ? blk_by_legacy_dinfo(di) : NULL; DeviceState *card; =20 - card =3D qdev_create(qdev_get_child_bus(DEVICE(sd), "sd-bus"), TYPE_SD= _CARD); + card =3D qdev_new(TYPE_SD_CARD); object_property_add_child(OBJECT(sd), "card[*]", OBJECT(card)); qdev_prop_set_drive(card, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(card), true, "realized", &error_fatal); + qdev_realize_and_unref(card, qdev_get_child_bus(DEVICE(sd), "sd-bus"), + &error_fatal); } =20 static void versal_virt_init(MachineState *machine) diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 809a31390f..c3d47bb9e9 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -304,13 +304,13 @@ static void versal_unimp_area(Versal *s, const char *= name, MemoryRegion *mr, hwaddr base, hwaddr size) { - DeviceState *dev =3D qdev_create(NULL, TYPE_UNIMPLEMENTED_DEVICE); + DeviceState *dev =3D qdev_new(TYPE_UNIMPLEMENTED_DEVICE); MemoryRegion *mr_dev; =20 qdev_prop_set_string(dev, "name", name); qdev_prop_set_uint64(dev, "size", size); object_property_add_child(OBJECT(s), name, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 mr_dev =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion(mr, base, mr_dev); diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index b01e575b58..4229b2d936 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -143,10 +143,9 @@ static void xlnx_zcu102_init(MachineState *machine) error_report("No SD bus found for SD card %d", i); exit(1); } - carddev =3D qdev_create(bus, TYPE_SD_CARD); + carddev =3D qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(carddev), true, "realized", - &error_fatal); + qdev_realize_and_unref(carddev, bus, &error_fatal); } =20 for (i =3D 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) { diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c index 4696ae0d9a..f673b8317a 100644 --- a/hw/audio/intel-hda.c +++ b/hw/audio/intel-hda.c @@ -1309,8 +1309,8 @@ static int intel_hda_and_codec_init(PCIBus *bus) =20 controller =3D DEVICE(pci_create_simple(bus, -1, "intel-hda")); hdabus =3D QLIST_FIRST(&controller->child_bus); - codec =3D qdev_create(hdabus, "hda-duplex"); - qdev_init_nofail(codec); + codec =3D qdev_new("hda-duplex"); + qdev_realize_and_unref(codec, hdabus, &error_fatal); return 0; } =20 diff --git a/hw/block/fdc.c b/hw/block/fdc.c index c5fb9d6ece..1feb398875 100644 --- a/hw/block/fdc.c +++ b/hw/block/fdc.c @@ -2516,7 +2516,7 @@ static void fdctrl_connect_drives(FDCtrl *fdctrl, Dev= iceState *fdc_dev, continue; } =20 - dev =3D qdev_create(&fdctrl->bus.bus, "floppy"); + dev =3D qdev_new("floppy"); qdev_prop_set_uint32(dev, "unit", i); qdev_prop_set_enum(dev, "drive-type", fdctrl->qdev_for_drives[i].t= ype); =20 @@ -2531,7 +2531,7 @@ static void fdctrl_connect_drives(FDCtrl *fdctrl, Dev= iceState *fdc_dev, return; } =20 - object_property_set_bool(OBJECT(dev), true, "realized", &local_err= ); + qdev_realize_and_unref(dev, &fdctrl->bus.bus, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -2571,7 +2571,7 @@ void fdctrl_init_sysbus(qemu_irq irq, int dma_chann, SysBusDevice *sbd; FDCtrlSysBus *sys; =20 - dev =3D qdev_create(NULL, "sysbus-fdc"); + dev =3D qdev_new("sysbus-fdc"); sys =3D SYSBUS_FDC(dev); fdctrl =3D &sys->state; fdctrl->dma_chann =3D dma_chann; /* FIXME */ @@ -2583,7 +2583,7 @@ void fdctrl_init_sysbus(qemu_irq irq, int dma_chann, qdev_prop_set_drive(dev, "driveB", blk_by_legacy_dinfo(fds[1]), &error_fatal); } - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sbd =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(sbd, 0, irq); sysbus_mmio_map(sbd, 0, mmio_base); @@ -2595,12 +2595,12 @@ void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base, DeviceState *dev; FDCtrlSysBus *sys; =20 - dev =3D qdev_create(NULL, "SUNW,fdtwo"); + dev =3D qdev_new("SUNW,fdtwo"); if (fds[0]) { qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(fds[0]), &error_fatal); } - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sys =3D SYSBUS_FDC(dev); sysbus_connect_irq(SYS_BUS_DEVICE(sys), 0, irq); sysbus_mmio_map(SYS_BUS_DEVICE(sys), 0, io_base); diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 11922c0f96..d2a647d2b8 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -959,7 +959,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, uint16_t id2, uint16_t id3, int be) { - DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); + DeviceState *dev =3D qdev_new(TYPE_PFLASH_CFI01); =20 if (blk) { qdev_prop_set_drive(dev, "drive", blk, &error_abort); @@ -974,7 +974,7 @@ PFlashCFI01 *pflash_cfi01_register(hwaddr base, qdev_prop_set_uint16(dev, "id2", id2); qdev_prop_set_uint16(dev, "id3", id3); qdev_prop_set_string(dev, "name", name); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return PFLASH_CFI01(dev); diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index ac7e34ecbf..ed9e9eef0c 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -998,7 +998,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, uint16_t unlock_addr1, int be) { - DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI02); + DeviceState *dev =3D qdev_new(TYPE_PFLASH_CFI02); =20 if (blk) { qdev_prop_set_drive(dev, "drive", blk, &error_abort); @@ -1016,7 +1016,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, qdev_prop_set_uint16(dev, "unlock-addr0", unlock_addr0); qdev_prop_set_uint16(dev, "unlock-addr1", unlock_addr1); qdev_prop_set_string(dev, "name", name); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); return PFLASH_CFI02(dev); diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c index 96d5180e3e..b86bd7b2e6 100644 --- a/hw/char/exynos4210_uart.c +++ b/hw/char/exynos4210_uart.c @@ -22,6 +22,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qapi/error.h" #include "qemu/error-report.h" #include "qemu/module.h" #include "qemu/timer.h" @@ -652,7 +653,7 @@ DeviceState *exynos4210_uart_create(hwaddr addr, DeviceState *dev; SysBusDevice *bus; =20 - dev =3D qdev_create(NULL, TYPE_EXYNOS4210_UART); + dev =3D qdev_new(TYPE_EXYNOS4210_UART); =20 qdev_prop_set_chr(dev, "chardev", chr); qdev_prop_set_uint32(dev, "channel", channel); @@ -660,7 +661,7 @@ DeviceState *exynos4210_uart_create(hwaddr addr, qdev_prop_set_uint32(dev, "tx-size", fifo_size); =20 bus =3D SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); if (addr !=3D (hwaddr)-1) { sysbus_mmio_map(bus, 0, addr); } diff --git a/hw/char/mcf_uart.c b/hw/char/mcf_uart.c index 97e4bbc31a..2ac0a195f3 100644 --- a/hw/char/mcf_uart.c +++ b/hw/char/mcf_uart.c @@ -10,6 +10,7 @@ #include "hw/irq.h" #include "hw/sysbus.h" #include "qemu/module.h" +#include "qapi/error.h" #include "hw/m68k/mcf.h" #include "hw/qdev-properties.h" #include "chardev/char-fe.h" @@ -343,11 +344,11 @@ void *mcf_uart_init(qemu_irq irq, Chardev *chrdrv) { DeviceState *dev; =20 - dev =3D qdev_create(NULL, TYPE_MCF_UART); + dev =3D qdev_new(TYPE_MCF_UART); if (chrdrv) { qdev_prop_set_chr(dev, "chardev", chrdrv); } - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); =20 diff --git a/hw/char/spapr_vty.c b/hw/char/spapr_vty.c index ecb94f5673..464a52342a 100644 --- a/hw/char/spapr_vty.c +++ b/hw/char/spapr_vty.c @@ -158,9 +158,9 @@ void spapr_vty_create(SpaprVioBus *bus, Chardev *charde= v) { DeviceState *dev; =20 - dev =3D qdev_create(&bus->bus, "spapr-vty"); + dev =3D qdev_new("spapr-vty"); qdev_prop_set_chr(dev, "chardev", chardev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, &bus->bus, &error_fatal); } =20 static Property spapr_vty_properties[] =3D { diff --git a/hw/core/empty_slot.c b/hw/core/empty_slot.c index 3ba450e1ca..725e5fd998 100644 --- a/hw/core/empty_slot.c +++ b/hw/core/empty_slot.c @@ -11,6 +11,7 @@ =20 #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qapi/error.h" #include "qemu/module.h" #include "hw/empty_slot.h" =20 @@ -60,12 +61,12 @@ void empty_slot_init(hwaddr addr, uint64_t slot_size) SysBusDevice *s; EmptySlot *e; =20 - dev =3D qdev_create(NULL, TYPE_EMPTY_SLOT); + dev =3D qdev_new(TYPE_EMPTY_SLOT); s =3D SYS_BUS_DEVICE(dev); e =3D EMPTY_SLOT(dev); e->size =3D slot_size; =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus_mmio_map(s, 0, addr); } diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index 08b0311c5f..b5db0d179f 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -230,9 +230,9 @@ DeviceState *sysbus_create_varargs(const char *name, qemu_irq irq; int n; =20 - dev =3D qdev_create(NULL, name); + dev =3D qdev_new(name); s =3D SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); if (addr !=3D (hwaddr)-1) { sysbus_mmio_map(s, 0, addr); } diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c index 75e5c993b5..5db667d518 100644 --- a/hw/cris/axis_dev88.c +++ b/hw/cris/axis_dev88.c @@ -289,8 +289,8 @@ void axisdev88_init(MachineState *machine) &gpio_state.iomem); =20 =20 - dev =3D qdev_create(NULL, "etraxfs,pic"); - qdev_init_nofail(dev); + dev =3D qdev_new("etraxfs,pic"); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, 0x3001c000); sysbus_connect_irq(s, 0, qdev_get_gpio_in(DEVICE(cpu), CRIS_CPU_IRQ)); diff --git a/hw/display/milkymist-tmu2.c b/hw/display/milkymist-tmu2.c index 513c0d5bab..e54fd85777 100644 --- a/hw/display/milkymist-tmu2.c +++ b/hw/display/milkymist-tmu2.c @@ -543,8 +543,8 @@ DeviceState *milkymist_tmu2_create(hwaddr base, qemu_ir= q irq) XFree(configs); XCloseDisplay(d); =20 - dev =3D qdev_create(NULL, TYPE_MILKYMIST_TMU2); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_MILKYMIST_TMU2); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); =20 diff --git a/hw/display/sm501.c b/hw/display/sm501.c index fa23a78164..7ff14fd474 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1969,10 +1969,10 @@ static void sm501_realize_sysbus(DeviceState *dev, = Error **errp) sysbus_init_mmio(sbd, &s->state.mmio_region); =20 /* bridge to usb host emulation module */ - usb_dev =3D qdev_create(NULL, "sysbus-ohci"); + usb_dev =3D qdev_new("sysbus-ohci"); qdev_prop_set_uint32(usb_dev, "num-ports", 2); qdev_prop_set_uint64(usb_dev, "dma-offset", s->base); - qdev_init_nofail(usb_dev); + qdev_realize_and_unref(usb_dev, NULL, &error_fatal); memory_region_add_subregion(&s->state.mmio_region, SM501_USB_HOST, sysbus_mmio_get_region(SYS_BUS_DEVICE(usb_dev), 0)); sysbus_pass_irq(sbd, SYS_BUS_DEVICE(usb_dev)); diff --git a/hw/dma/pxa2xx_dma.c b/hw/dma/pxa2xx_dma.c index 8a2eeb32bc..6b761af701 100644 --- a/hw/dma/pxa2xx_dma.c +++ b/hw/dma/pxa2xx_dma.c @@ -495,9 +495,9 @@ DeviceState *pxa27x_dma_init(hwaddr base, qemu_irq irq) { DeviceState *dev; =20 - dev =3D qdev_create(NULL, "pxa2xx-dma"); + dev =3D qdev_new("pxa2xx-dma"); qdev_prop_set_int32(dev, "channels", PXA27X_DMA_NUM_CHANNELS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); @@ -509,9 +509,9 @@ DeviceState *pxa255_dma_init(hwaddr base, qemu_irq irq) { DeviceState *dev; =20 - dev =3D qdev_create(NULL, "pxa2xx-dma"); + dev =3D qdev_new("pxa2xx-dma"); qdev_prop_set_int32(dev, "channels", PXA27X_DMA_NUM_CHANNELS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index eefbabd758..21c9706bf3 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -28,6 +28,7 @@ #include "hw/mips/mips.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qapi/error.h" #include "qemu/timer.h" #include "qemu/log.h" #include "qemu/module.h" @@ -744,8 +745,8 @@ DeviceState *rc4030_init(rc4030_dma **dmas, IOMMUMemory= Region **dma_mr) { DeviceState *dev; =20 - dev =3D qdev_create(NULL, TYPE_RC4030); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_RC4030); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 *dmas =3D rc4030_allocate_dmas(dev, 4); *dma_mr =3D &RC4030(dev)->dma_mr; diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index 84b9c5dc77..77cf41e591 100644 --- a/hw/dma/sparc32_dma.c +++ b/hw/dma/sparc32_dma.c @@ -301,7 +301,7 @@ static void sparc32_espdma_device_realize(DeviceState *= dev, Error **errp) SysBusESPState *sysbus; ESPState *esp; =20 - d =3D qdev_create(NULL, TYPE_ESP); + d =3D qdev_new(TYPE_ESP); object_property_add_child(OBJECT(dev), "esp", OBJECT(d)); sysbus =3D ESP_STATE(d); esp =3D &sysbus->esp; @@ -310,7 +310,7 @@ static void sparc32_espdma_device_realize(DeviceState *= dev, Error **errp) esp->dma_opaque =3D SPARC32_DMA_DEVICE(dev); sysbus->it_shift =3D 2; esp->dma_enabled =3D 1; - qdev_init_nofail(d); + qdev_realize_and_unref(d, NULL, &error_fatal); } =20 static void sparc32_espdma_device_class_init(ObjectClass *klass, void *dat= a) @@ -343,11 +343,11 @@ static void sparc32_ledma_device_realize(DeviceState = *dev, Error **errp) =20 qemu_check_nic_model(nd, TYPE_LANCE); =20 - d =3D qdev_create(NULL, TYPE_LANCE); + d =3D qdev_new(TYPE_LANCE); object_property_add_child(OBJECT(dev), "lance", OBJECT(d)); qdev_set_nic_properties(d, nd); object_property_set_link(OBJECT(d), OBJECT(dev), "dma", errp); - qdev_init_nofail(d); + qdev_realize_and_unref(d, NULL, &error_fatal); } =20 static void sparc32_ledma_device_class_init(ObjectClass *klass, void *data) @@ -378,10 +378,10 @@ static void sparc32_dma_realize(DeviceState *dev, Err= or **errp) return; } =20 - espdma =3D qdev_create(NULL, TYPE_SPARC32_ESPDMA_DEVICE); + espdma =3D qdev_new(TYPE_SPARC32_ESPDMA_DEVICE); object_property_set_link(OBJECT(espdma), iommu, "iommu", errp); object_property_add_child(OBJECT(s), "espdma", OBJECT(espdma)); - qdev_init_nofail(espdma); + qdev_realize_and_unref(espdma, NULL, &error_fatal); =20 esp =3D DEVICE(object_resolve_path_component(OBJECT(espdma), "esp")); sbd =3D SYS_BUS_DEVICE(esp); @@ -393,10 +393,10 @@ static void sparc32_dma_realize(DeviceState *dev, Err= or **errp) memory_region_add_subregion(&s->dmamem, 0x0, sysbus_mmio_get_region(sbd, 0)); =20 - ledma =3D qdev_create(NULL, TYPE_SPARC32_LEDMA_DEVICE); + ledma =3D qdev_new(TYPE_SPARC32_LEDMA_DEVICE); object_property_set_link(OBJECT(ledma), iommu, "iommu", errp); object_property_add_child(OBJECT(s), "ledma", OBJECT(ledma)); - qdev_init_nofail(ledma); + qdev_realize_and_unref(ledma, NULL, &error_fatal); =20 lance =3D DEVICE(object_resolve_path_component(OBJECT(ledma), "lance")= ); sbd =3D SYS_BUS_DEVICE(lance); diff --git a/hw/hppa/dino.c b/hw/hppa/dino.c index 2b1b38c58a..50ba26737b 100644 --- a/hw/hppa/dino.c +++ b/hw/hppa/dino.c @@ -521,7 +521,7 @@ PCIBus *dino_init(MemoryRegion *addr_space, PCIBus *b; int i; =20 - dev =3D qdev_create(NULL, TYPE_DINO_PCI_HOST_BRIDGE); + dev =3D qdev_new(TYPE_DINO_PCI_HOST_BRIDGE); s =3D DINO_PCI_HOST_BRIDGE(dev); s->iar0 =3D s->iar1 =3D CPU_HPA + 3; s->toc_addr =3D 0xFFFA0030; /* IO_COMMAND of CPU */ @@ -548,7 +548,7 @@ PCIBus *dino_init(MemoryRegion *addr_space, &s->pci_mem, get_system_io(), PCI_DEVFN(0, 0), 32, TYPE_PCI_BUS); s->parent_obj.bus =3D b; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 /* Set up windows into PCI bus memory. */ for (i =3D 1; i < 31; i++) { diff --git a/hw/hppa/lasi.c b/hw/hppa/lasi.c index d8d03f95c0..4539022c5b 100644 --- a/hw/hppa/lasi.c +++ b/hw/hppa/lasi.c @@ -300,7 +300,7 @@ DeviceState *lasi_init(MemoryRegion *address_space) DeviceState *dev; LasiState *s; =20 - dev =3D qdev_create(NULL, TYPE_LASI_CHIP); + dev =3D qdev_new(TYPE_LASI_CHIP); s =3D LASI_CHIP(dev); s->iar =3D CPU_HPA + 3; =20 @@ -309,7 +309,7 @@ DeviceState *lasi_init(MemoryRegion *address_space) s, "lasi", 0x100000); memory_region_add_subregion(address_space, LASI_HPA, &s->this_mem); =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 /* LAN */ if (enable_lasi_lan()) { diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index 00dd9f58d6..d828b4fb94 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -124,8 +124,8 @@ static void machine_hppa_init(MachineState *machine) =20 /* Graphics setup. */ if (machine->enable_graphics && vga_interface_type !=3D VGA_NONE) { - dev =3D qdev_create(NULL, "artist"); - qdev_init_nofail(dev); + dev =3D qdev_new("artist"); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, LASI_GFX_HPA); sysbus_mmio_map(s, 1, ARTIST_FB_ADDR); diff --git a/hw/i2c/core.c b/hw/i2c/core.c index d413a192ed..1aac457a2a 100644 --- a/hw/i2c/core.c +++ b/hw/i2c/core.c @@ -11,6 +11,7 @@ #include "hw/i2c/i2c.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qapi/error.h" #include "qemu/module.h" #include "trace.h" =20 @@ -270,9 +271,9 @@ DeviceState *i2c_create_slave(I2CBus *bus, const char *= name, uint8_t addr) { DeviceState *dev; =20 - dev =3D qdev_create(&bus->qbus, name); + dev =3D qdev_new(name); qdev_prop_set_uint8(dev, "address", addr); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, &bus->qbus, &error_fatal); return dev; } =20 diff --git a/hw/i2c/smbus_eeprom.c b/hw/i2c/smbus_eeprom.c index e199fc8678..b7def9eeb8 100644 --- a/hw/i2c/smbus_eeprom.c +++ b/hw/i2c/smbus_eeprom.c @@ -169,11 +169,11 @@ void smbus_eeprom_init_one(I2CBus *smbus, uint8_t add= ress, uint8_t *eeprom_buf) { DeviceState *dev; =20 - dev =3D qdev_create((BusState *) smbus, TYPE_SMBUS_EEPROM); + dev =3D qdev_new(TYPE_SMBUS_EEPROM); qdev_prop_set_uint8(dev, "address", address); /* FIXME: use an array of byte or block backend property? */ SMBUS_EEPROM(dev)->init_data =3D eeprom_buf; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, (BusState *)smbus, &error_fatal); } =20 void smbus_eeprom_init(I2CBus *smbus, int nb_eeprom, diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 4ba8ac8774..a2e7faccbc 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -212,7 +212,7 @@ static void pc_q35_init(MachineState *machine) } =20 /* create pci host bus */ - q35_host =3D Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE)); + q35_host =3D Q35_HOST_DEVICE(qdev_new(TYPE_Q35_HOST_DEVICE)); =20 object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host)); object_property_set_link(OBJECT(q35_host), OBJECT(ram_memory), @@ -228,7 +228,7 @@ static void pc_q35_init(MachineState *machine) object_property_set_int(OBJECT(q35_host), x86ms->above_4g_mem_size, PCI_HOST_ABOVE_4G_MEM_SIZE, NULL); /* pci */ - qdev_init_nofail(DEVICE(q35_host)); + qdev_realize_and_unref(DEVICE(q35_host), NULL, &error_fatal); phb =3D PCI_HOST_BRIDGE(q35_host); host_bus =3D phb->bus; /* create ISA bus */ diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 7a3bc7ab66..85ab52b316 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -345,13 +345,13 @@ void ioapic_init_gsi(GSIState *gsi_state, const char = *parent_name) =20 assert(parent_name); if (kvm_ioapic_in_kernel()) { - dev =3D qdev_create(NULL, TYPE_KVM_IOAPIC); + dev =3D qdev_new(TYPE_KVM_IOAPIC); } else { - dev =3D qdev_create(NULL, TYPE_IOAPIC); + dev =3D qdev_new(TYPE_IOAPIC); } object_property_add_child(object_resolve_path(parent_name, NULL), "ioapic", OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); d =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(d, 0, IO_APIC_DEFAULT_ADDRESS); =20 diff --git a/hw/ide/qdev.c b/hw/ide/qdev.c index 06b11583f5..caa88526f5 100644 --- a/hw/ide/qdev.c +++ b/hw/ide/qdev.c @@ -127,11 +127,11 @@ IDEDevice *ide_create_drive(IDEBus *bus, int unit, Dr= iveInfo *drive) { DeviceState *dev; =20 - dev =3D qdev_create(&bus->qbus, drive->media_cd ? "ide-cd" : "ide-hd"); + dev =3D qdev_new(drive->media_cd ? "ide-cd" : "ide-hd"); qdev_prop_set_uint32(dev, "unit", unit); qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(drive), &error_fatal); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, &bus->qbus, &error_fatal); return DO_UPCAST(IDEDevice, qdev, dev); } =20 diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c index 82c8f4192c..a261ab2401 100644 --- a/hw/intc/exynos4210_gic.c +++ b/hw/intc/exynos4210_gic.c @@ -23,6 +23,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "qapi/error.h" #include "qemu/module.h" #include "hw/irq.h" #include "hw/qdev-properties.h" @@ -296,10 +297,10 @@ static void exynos4210_gic_realize(DeviceState *dev, = Error **errp) uint32_t n =3D s->num_cpu; uint32_t i; =20 - s->gic =3D qdev_create(NULL, "arm_gic"); + s->gic =3D qdev_new("arm_gic"); qdev_prop_set_uint32(s->gic, "num-cpu", s->num_cpu); qdev_prop_set_uint32(s->gic, "num-irq", EXYNOS4210_GIC_NIRQ); - qdev_init_nofail(s->gic); + qdev_realize_and_unref(s->gic, NULL, &error_fatal); gicbusdev =3D SYS_BUS_DEVICE(s->gic); =20 /* Pass through outbound IRQ lines from the GIC */ diff --git a/hw/intc/s390_flic.c b/hw/intc/s390_flic.c index baca4d8a2d..b2a247dd15 100644 --- a/hw/intc/s390_flic.c +++ b/hw/intc/s390_flic.c @@ -63,15 +63,15 @@ void s390_flic_init(void) DeviceState *dev; =20 if (kvm_enabled()) { - dev =3D qdev_create(NULL, TYPE_KVM_S390_FLIC); + dev =3D qdev_new(TYPE_KVM_S390_FLIC); object_property_add_child(qdev_get_machine(), TYPE_KVM_S390_FLIC, OBJECT(dev)); } else { - dev =3D qdev_create(NULL, TYPE_QEMU_S390_FLIC); + dev =3D qdev_new(TYPE_QEMU_S390_FLIC); object_property_add_child(qdev_get_machine(), TYPE_QEMU_S390_FLIC, OBJECT(dev)); } - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); } =20 static int qemu_s390_register_io_adapter(S390FLICState *fs, uint32_t id, diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index 1f2189f4d5..1c9d7e19ab 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -61,8 +61,8 @@ ISABus *isa_bus_new(DeviceState *dev, MemoryRegion* addre= ss_space, return NULL; } if (!dev) { - dev =3D qdev_create(NULL, "isabus-bridge"); - qdev_init_nofail(dev); + dev =3D qdev_new("isabus-bridge"); + qdev_realize_and_unref(dev, NULL, &error_fatal); } =20 isabus =3D ISA_BUS(qbus_create(TYPE_ISA_BUS, dev, NULL)); diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c index 2ab9701ad6..666561d716 100644 --- a/hw/m68k/mcf5208.c +++ b/hw/m68k/mcf5208.c @@ -214,9 +214,9 @@ static void mcf_fec_init(MemoryRegion *sysmem, NICInfo = *nd, hwaddr base, int i; =20 qemu_check_nic_model(nd, TYPE_MCF_FEC_NET); - dev =3D qdev_create(NULL, TYPE_MCF_FEC_NET); + dev =3D qdev_new(TYPE_MCF_FEC_NET); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 s =3D SYS_BUS_DEVICE(dev); for (i =3D 0; i < FEC_NUM_IRQ; i++) { diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c index bc20742d9a..75d6e24719 100644 --- a/hw/m68k/mcf_intc.c +++ b/hw/m68k/mcf_intc.c @@ -7,6 +7,7 @@ */ =20 #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/module.h" #include "qemu/log.h" #include "cpu.h" @@ -204,8 +205,8 @@ qemu_irq *mcf_intc_init(MemoryRegion *sysmem, DeviceState *dev; mcf_intc_state *s; =20 - dev =3D qdev_create(NULL, TYPE_MCF_INTC); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_MCF_INTC); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 s =3D MCF_INTC(dev); s->cpu =3D cpu; diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 14b99ed25d..e1e16bf9af 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -839,7 +839,7 @@ static void next_escc_init(M68kCPU *cpu) DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, TYPE_ESCC); + dev =3D qdev_new(TYPE_ESCC); qdev_prop_set_uint32(dev, "disabled", 0); qdev_prop_set_uint32(dev, "frequency", 9600 * 384); qdev_prop_set_uint32(dev, "it_shift", 0); @@ -848,7 +848,7 @@ static void next_escc_init(M68kCPU *cpu) qdev_prop_set_chr(dev, "chrA", serial_hd(0)); qdev_prop_set_uint32(dev, "chnBtype", escc_serial); qdev_prop_set_uint32(dev, "chnAtype", escc_serial); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 s =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, ser_irq[0]); @@ -895,8 +895,8 @@ static void next_cube_init(MachineState *machine) memory_region_add_subregion(sysmem, 0x04000000, machine->ram); =20 /* Framebuffer */ - dev =3D qdev_create(NULL, TYPE_NEXTFB); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_NEXTFB); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x0B000000); =20 /* MMIO */ @@ -918,8 +918,8 @@ static void next_cube_init(MachineState *machine) memory_region_add_subregion(sysmem, 0x02100000, scrmem); =20 /* KBD */ - dev =3D qdev_create(NULL, TYPE_NEXTKBD); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_NEXTKBD); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x0200e000); =20 /* Load ROM here */ diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 81749e7ec6..15b7eb719a 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -218,13 +218,13 @@ static void q800_init(MachineState *machine) =20 /* VIA */ =20 - via_dev =3D qdev_create(NULL, TYPE_MAC_VIA); + via_dev =3D qdev_new(TYPE_MAC_VIA); dinfo =3D drive_get(IF_MTD, 0, 0); if (dinfo) { qdev_prop_set_drive(via_dev, "drive", blk_by_legacy_dinfo(dinfo), &error_abort); } - qdev_init_nofail(via_dev); + qdev_realize_and_unref(via_dev, NULL, &error_fatal); sysbus =3D SYS_BUS_DEVICE(via_dev); sysbus_mmio_map(sysbus, 0, VIA_BASE); qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, pic[0]); @@ -232,10 +232,10 @@ static void q800_init(MachineState *machine) =20 =20 adb_bus =3D qdev_get_child_bus(via_dev, "adb.0"); - dev =3D qdev_create(adb_bus, TYPE_ADB_KEYBOARD); - qdev_init_nofail(dev); - dev =3D qdev_create(adb_bus, TYPE_ADB_MOUSE); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_ADB_KEYBOARD); + qdev_realize_and_unref(dev, adb_bus, &error_fatal); + dev =3D qdev_new(TYPE_ADB_MOUSE); + qdev_realize_and_unref(dev, adb_bus, &error_fatal); =20 /* MACSONIC */ =20 @@ -259,13 +259,13 @@ static void q800_init(MachineState *machine) nd_table[0].macaddr.a[1] =3D 0x00; nd_table[0].macaddr.a[2] =3D 0x07; =20 - dev =3D qdev_create(NULL, "dp8393x"); + dev =3D qdev_new("dp8393x"); qdev_set_nic_properties(dev, &nd_table[0]); qdev_prop_set_uint8(dev, "it_shift", 2); qdev_prop_set_bit(dev, "big_endian", true); object_property_set_link(OBJECT(dev), OBJECT(get_system_memory()), "dma_mr", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(sysbus, 0, SONIC_BASE); sysbus_mmio_map(sysbus, 1, SONIC_PROM_BASE); @@ -273,7 +273,7 @@ static void q800_init(MachineState *machine) =20 /* SCC */ =20 - dev =3D qdev_create(NULL, TYPE_ESCC); + dev =3D qdev_new(TYPE_ESCC); qdev_prop_set_uint32(dev, "disabled", 0); qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK); qdev_prop_set_uint32(dev, "it_shift", 1); @@ -282,7 +282,7 @@ static void q800_init(MachineState *machine) qdev_prop_set_chr(dev, "chrB", serial_hd(1)); qdev_prop_set_uint32(dev, "chnBtype", 0); qdev_prop_set_uint32(dev, "chnAtype", 0); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(sysbus, 0, pic[3]); sysbus_connect_irq(sysbus, 1, pic[3]); @@ -290,7 +290,7 @@ static void q800_init(MachineState *machine) =20 /* SCSI */ =20 - dev =3D qdev_create(NULL, TYPE_ESP); + dev =3D qdev_new(TYPE_ESP); sysbus_esp =3D ESP_STATE(dev); esp =3D &sysbus_esp->esp; esp->dma_memory_read =3D NULL; @@ -298,7 +298,7 @@ static void q800_init(MachineState *machine) esp->dma_opaque =3D NULL; sysbus_esp->it_shift =3D 4; esp->dma_enabled =3D 1; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in_named(via_dev, @@ -314,14 +314,14 @@ static void q800_init(MachineState *machine) =20 /* SWIM floppy controller */ =20 - dev =3D qdev_create(NULL, TYPE_SWIM); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_SWIM); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE); =20 /* NuBus */ =20 - dev =3D qdev_create(NULL, TYPE_MAC_NUBUS_BRIDGE); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_MAC_NUBUS_BRIDGE); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, NUBUS_SUPER_SLOT_BASE); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE); =20 @@ -329,11 +329,11 @@ static void q800_init(MachineState *machine) =20 /* framebuffer in nubus slot #9 */ =20 - dev =3D qdev_create(BUS(nubus), TYPE_NUBUS_MACFB); + dev =3D qdev_new(TYPE_NUBUS_MACFB); qdev_prop_set_uint32(dev, "width", graphic_width); qdev_prop_set_uint32(dev, "height", graphic_height); qdev_prop_set_uint8(dev, "depth", graphic_depth); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, BUS(nubus), &error_fatal); =20 cs =3D CPU(cpu); if (linux_boot) { diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_= ml605_mmu.c index 05a5614a04..2e7a3fa119 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -110,9 +110,9 @@ petalogix_ml605_init(MachineState *machine) 64 * KiB, 2, 0x89, 0x18, 0x0000, 0x0, 0); =20 =20 - dev =3D qdev_create(NULL, "xlnx.xps-intc"); + dev =3D qdev_new("xlnx.xps-intc"); qdev_prop_set_uint32(dev, "kind-of-intr", 1 << TIMER_IRQ); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ)); @@ -125,17 +125,17 @@ petalogix_ml605_init(MachineState *machine) DEVICE_LITTLE_ENDIAN); =20 /* 2 timers at irq 2 @ 100 Mhz. */ - dev =3D qdev_create(NULL, "xlnx.xps-timer"); + dev =3D qdev_new("xlnx.xps-timer"); qdev_prop_set_uint32(dev, "one-timer-only", 0); qdev_prop_set_uint32(dev, "clock-frequency", 100 * 1000000); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]); =20 /* axi ethernet and dma initialization. */ qemu_check_nic_model(&nd_table[0], "xlnx.axi-ethernet"); - eth0 =3D qdev_create(NULL, "xlnx.axi-ethernet"); - dma =3D qdev_create(NULL, "xlnx.axi-dma"); + eth0 =3D qdev_new("xlnx.axi-ethernet"); + dma =3D qdev_new("xlnx.axi-dma"); =20 /* FIXME: attach to the sysbus instead */ object_property_add_child(qdev_get_machine(), "xilinx-eth", OBJECT(eth= 0)); @@ -152,7 +152,7 @@ petalogix_ml605_init(MachineState *machine) "axistream-connected", &error_abort); object_property_set_link(OBJECT(eth0), cs, "axistream-control-connected", &error_abort); - qdev_init_nofail(eth0); + qdev_realize_and_unref(eth0, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(eth0), 0, AXIENET_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(eth0), 0, irq[AXIENET_IRQ]); =20 @@ -165,7 +165,7 @@ petalogix_ml605_init(MachineState *machine) "axistream-connected", &error_abort); object_property_set_link(OBJECT(dma), cs, "axistream-control-connected", &error_abort); - qdev_init_nofail(dma); + qdev_realize_and_unref(dma, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, AXIDMA_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dma), 0, irq[AXIDMA_IRQ0]); sysbus_connect_irq(SYS_BUS_DEVICE(dma), 1, irq[AXIDMA_IRQ1]); @@ -173,9 +173,9 @@ petalogix_ml605_init(MachineState *machine) { SSIBus *spi; =20 - dev =3D qdev_create(NULL, "xlnx.xps-spi"); + dev =3D qdev_new("xlnx.xps-spi"); qdev_prop_set_uint8(dev, "num-ss-bits", NUM_SPI_FLASHES); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, SPI_BASEADDR); sysbus_connect_irq(busdev, 0, irq[SPI_IRQ]); diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petal= ogix_s3adsp1800_mmu.c index 0bb6cdea8d..aecee2f5f3 100644 --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c @@ -89,10 +89,10 @@ petalogix_s3adsp1800_init(MachineState *machine) dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); =20 - dev =3D qdev_create(NULL, "xlnx.xps-intc"); + dev =3D qdev_new("xlnx.xps-intc"); qdev_prop_set_uint32(dev, "kind-of-intr", 1 << ETHLITE_IRQ | 1 << UARTLITE_IRQ); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ)); @@ -104,19 +104,19 @@ petalogix_s3adsp1800_init(MachineState *machine) serial_hd(0)); =20 /* 2 timers at irq 2 @ 62 Mhz. */ - dev =3D qdev_create(NULL, "xlnx.xps-timer"); + dev =3D qdev_new("xlnx.xps-timer"); qdev_prop_set_uint32(dev, "one-timer-only", 0); qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]); =20 qemu_check_nic_model(&nd_table[0], "xlnx.xps-ethernetlite"); - dev =3D qdev_create(NULL, "xlnx.xps-ethernetlite"); + dev =3D qdev_new("xlnx.xps-ethernetlite"); qdev_set_nic_properties(dev, &nd_table[0]); qdev_prop_set_uint32(dev, "tx-ping-pong", 0); qdev_prop_set_uint32(dev, "rx-ping-pong", 0); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, ETHLITE_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[ETHLITE_IRQ]); =20 diff --git a/hw/mips/boston.c b/hw/mips/boston.c index a896056be1..a34ccdf616 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -400,7 +400,7 @@ xilinx_pcie_init(MemoryRegion *sys_mem, uint32_t bus_nr, DeviceState *dev; MemoryRegion *cfg, *mmio; =20 - dev =3D qdev_create(NULL, TYPE_XILINX_PCIE_HOST); + dev =3D qdev_new(TYPE_XILINX_PCIE_HOST); =20 qdev_prop_set_uint32(dev, "bus_nr", bus_nr); qdev_prop_set_uint64(dev, "cfg_base", cfg_base); @@ -409,7 +409,7 @@ xilinx_pcie_init(MemoryRegion *sys_mem, uint32_t bus_nr, qdev_prop_set_uint64(dev, "mmio_size", mmio_size); qdev_prop_set_bit(dev, "link_up", link_up); =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 cfg =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); memory_region_add_subregion_overlap(sys_mem, cfg_base, cfg, 0); @@ -441,8 +441,8 @@ static void boston_mach_init(MachineState *machine) exit(1); } =20 - dev =3D qdev_create(NULL, TYPE_MIPS_BOSTON); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_MIPS_BOSTON); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 s =3D BOSTON(dev); s->mach =3D machine; diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index b2ea13f09d..37750b8037 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -23,6 +23,7 @@ */ =20 #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/units.h" #include "qemu/log.h" #include "hw/mips/mips.h" @@ -1201,7 +1202,7 @@ PCIBus *gt64120_register(qemu_irq *pic) PCIHostState *phb; DeviceState *dev; =20 - dev =3D qdev_create(NULL, TYPE_GT64120_PCI_HOST_BRIDGE); + dev =3D qdev_new(TYPE_GT64120_PCI_HOST_BRIDGE); d =3D GT64120_PCI_HOST_BRIDGE(dev); phb =3D PCI_HOST_BRIDGE(dev); memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", 4 * GiB); @@ -1212,7 +1213,7 @@ PCIBus *gt64120_register(qemu_irq *pic) &d->pci0_mem, get_system_io(), PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, "isd-mem", 0x1000); =20 diff --git a/hw/mips/jazz.c b/hw/mips/jazz.c index afea52b41b..fb975bd1c7 100644 --- a/hw/mips/jazz.c +++ b/hw/mips/jazz.c @@ -255,8 +255,8 @@ static void mips_jazz_init(MachineState *machine, /* Video card */ switch (jazz_model) { case JAZZ_MAGNUM: - dev =3D qdev_create(NULL, "sysbus-g364"); - qdev_init_nofail(dev); + dev =3D qdev_new("sysbus-g364"); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(sysbus, 0, 0x60080000); sysbus_mmio_map(sysbus, 1, 0x40000000); @@ -287,12 +287,12 @@ static void mips_jazz_init(MachineState *machine, if (strcmp(nd->model, "dp83932") =3D=3D 0) { qemu_check_nic_model(nd, "dp83932"); =20 - dev =3D qdev_create(NULL, "dp8393x"); + dev =3D qdev_new("dp8393x"); qdev_set_nic_properties(dev, nd); qdev_prop_set_uint8(dev, "it_shift", 2); object_property_set_link(OBJECT(dev), OBJECT(rc4030_dma_mr), "dma_mr", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(sysbus, 0, 0x80001000); sysbus_mmio_map(sysbus, 1, 0x8000b000); @@ -308,7 +308,7 @@ static void mips_jazz_init(MachineState *machine, } =20 /* SCSI adapter */ - dev =3D qdev_create(NULL, TYPE_ESP); + dev =3D qdev_new(TYPE_ESP); sysbus_esp =3D ESP_STATE(dev); esp =3D &sysbus_esp->esp; esp->dma_memory_read =3D rc4030_dma_read; @@ -317,7 +317,7 @@ static void mips_jazz_init(MachineState *machine, sysbus_esp->it_shift =3D 0; /* XXX for now until rc4030 has been changed to use DMA enable signal = */ esp->dma_enabled =3D 1; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(rc4030, 5)); @@ -362,8 +362,8 @@ static void mips_jazz_init(MachineState *machine, /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */ =20 /* NVRAM */ - dev =3D qdev_create(NULL, "ds1225y"); - qdev_init_nofail(dev); + dev =3D qdev_new("ds1225y"); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(sysbus, 0, 0x80009000); =20 diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 636c95d1fe..d03e1c3e49 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1233,7 +1233,7 @@ void mips_malta_init(MachineState *machine) int fl_idx =3D 0; int be; =20 - DeviceState *dev =3D qdev_create(NULL, TYPE_MIPS_MALTA); + DeviceState *dev =3D qdev_new(TYPE_MIPS_MALTA); MaltaState *s =3D MIPS_MALTA(dev); =20 /* @@ -1243,7 +1243,7 @@ void mips_malta_init(MachineState *machine) */ empty_slot_init(0, 0x20000000); =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 /* create CPU */ mips_create_cpu(machine, s, &cbus_irq, &i8259_irq); diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c index d220318939..72b1e846af 100644 --- a/hw/mips/mipssim.c +++ b/hw/mips/mipssim.c @@ -129,9 +129,9 @@ static void mipsnet_init(int base, qemu_irq irq, NICInf= o *nd) DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, "mipsnet"); + dev =3D qdev_new("mipsnet"); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 s =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, irq); @@ -216,11 +216,11 @@ mips_mipssim_init(MachineState *machine) * MIPS CPU INT2, which is interrupt 4. */ if (serial_hd(0)) { - DeviceState *dev =3D qdev_create(NULL, TYPE_SERIAL_IO); + DeviceState *dev =3D qdev_new(TYPE_SERIAL_IO); =20 qdev_prop_set_chr(dev, "chardev", serial_hd(0)); qdev_set_legacy_instance_id(dev, 0x3f8, 2); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]); sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); diff --git a/hw/net/etraxfs_eth.c b/hw/net/etraxfs_eth.c index 27fd069b96..7e98cbda87 100644 --- a/hw/net/etraxfs_eth.c +++ b/hw/net/etraxfs_eth.c @@ -654,7 +654,7 @@ etraxfs_eth_init(NICInfo *nd, hwaddr base, int phyaddr, DeviceState *dev; qemu_check_nic_model(nd, "fseth"); =20 - dev =3D qdev_create(NULL, "etraxfs-eth"); + dev =3D qdev_new("etraxfs-eth"); qdev_set_nic_properties(dev, nd); qdev_prop_set_uint32(dev, "phyaddr", phyaddr); =20 @@ -668,7 +668,7 @@ etraxfs_eth_init(NICInfo *nd, hwaddr base, int phyaddr, */ ETRAX_FS_ETH(dev)->dma_out =3D dma_out; ETRAX_FS_ETH(dev)->dma_in =3D dma_in; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); =20 return dev; diff --git a/hw/net/fsl_etsec/etsec.c b/hw/net/fsl_etsec/etsec.c index 475f3c887a..d0e9ff57ca 100644 --- a/hw/net/fsl_etsec/etsec.c +++ b/hw/net/fsl_etsec/etsec.c @@ -33,6 +33,7 @@ #include "hw/qdev-properties.h" #include "etsec.h" #include "registers.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" =20 @@ -452,9 +453,9 @@ DeviceState *etsec_create(hwaddr base, { DeviceState *dev; =20 - dev =3D qdev_create(NULL, "eTSEC"); + dev =3D qdev_new("eTSEC"); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, tx_irq); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, rx_irq); diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c index da7e0bb0e8..81c32c8107 100644 --- a/hw/net/lan9118.c +++ b/hw/net/lan9118.c @@ -20,6 +20,7 @@ #include "hw/net/lan9118.h" #include "hw/ptimer.h" #include "hw/qdev-properties.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" /* For crc32 */ @@ -1394,9 +1395,9 @@ void lan9118_init(NICInfo *nd, uint32_t base, qemu_ir= q irq) SysBusDevice *s; =20 qemu_check_nic_model(nd, "lan9118"); - dev =3D qdev_create(NULL, TYPE_LAN9118); + dev =3D qdev_new(TYPE_LAN9118); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, base); sysbus_connect_irq(s, 0, irq); diff --git a/hw/net/lasi_i82596.c b/hw/net/lasi_i82596.c index 5e0fd69763..1870507727 100644 --- a/hw/net/lasi_i82596.c +++ b/hw/net/lasi_i82596.c @@ -11,6 +11,7 @@ */ =20 #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/timer.h" #include "hw/sysbus.h" #include "net/eth.h" @@ -126,11 +127,11 @@ SysBusI82596State *lasi_82596_init(MemoryRegion *addr= _space, .a =3D { 0x08, 0x00, 0x09, 0xef, 0x34, 0xf6 } }; =20 qemu_check_nic_model(&nd_table[0], TYPE_LASI_82596); - dev =3D qdev_create(NULL, TYPE_LASI_82596); + dev =3D qdev_new(TYPE_LASI_82596); s =3D SYSBUS_I82596(dev); s->state.irq =3D lan_irq; qdev_set_nic_properties(dev, &nd_table[0]); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s->state.conf.macaddr =3D HP_MAC; /* set HP MAC prefix */ =20 /* LASI 82596 ports in main memory. */ diff --git a/hw/net/smc91c111.c b/hw/net/smc91c111.c index b3240b9335..9b616fe62a 100644 --- a/hw/net/smc91c111.c +++ b/hw/net/smc91c111.c @@ -14,6 +14,7 @@ #include "hw/irq.h" #include "hw/net/smc91c111.h" #include "hw/qdev-properties.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" /* For crc32 */ @@ -821,9 +822,9 @@ void smc91c111_init(NICInfo *nd, uint32_t base, qemu_ir= q irq) SysBusDevice *s; =20 qemu_check_nic_model(nd, "smc91c111"); - dev =3D qdev_create(NULL, TYPE_SMC91C111); + dev =3D qdev_new(TYPE_SMC91C111); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, base); sysbus_connect_irq(s, 0, irq); diff --git a/hw/net/spapr_llan.c b/hw/net/spapr_llan.c index 968a1ce78e..4cd02dda01 100644 --- a/hw/net/spapr_llan.c +++ b/hw/net/spapr_llan.c @@ -372,11 +372,11 @@ void spapr_vlan_create(SpaprVioBus *bus, NICInfo *nd) { DeviceState *dev; =20 - dev =3D qdev_create(&bus->bus, "spapr-vlan"); + dev =3D qdev_new("spapr-vlan"); =20 qdev_set_nic_properties(dev, nd); =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, &bus->bus, &error_fatal); } =20 static int spapr_vlan_devnode(SpaprVioDevice *dev, void *fdt, int node_off) diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c index 4c60a27fb7..3d304d724a 100644 --- a/hw/nios2/10m50_devboard.c +++ b/hw/nios2/10m50_devboard.c @@ -80,9 +80,9 @@ static void nios2_10m50_ghrd_init(MachineState *machine) cpu_irq =3D nios2_cpu_pic_init(cpu); =20 /* Register: Internal Interrupt Controller (IIC) */ - dev =3D qdev_create(NULL, "altera,iic"); + dev =3D qdev_new("altera,iic"); object_property_add_const_link(OBJECT(dev), "cpu", OBJECT(cpu)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irq[0]); for (i =3D 0; i < 32; i++) { irq[i] =3D qdev_get_gpio_in(dev, i); @@ -93,16 +93,16 @@ static void nios2_10m50_ghrd_init(MachineState *machine) serial_hd(0), DEVICE_NATIVE_ENDIAN); =20 /* Register: Timer sys_clk_timer */ - dev =3D qdev_create(NULL, "ALTR.timer"); + dev =3D qdev_new("ALTR.timer"); qdev_prop_set_uint32(dev, "clock-frequency", 75 * 1000000); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xf8001440); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[0]); =20 /* Register: Timer sys_clk_timer_1 */ - dev =3D qdev_create(NULL, "ALTR.timer"); + dev =3D qdev_new("ALTR.timer"); qdev_prop_set_uint32(dev, "clock-frequency", 75 * 1000000); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xe0000880); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[5]); =20 diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 8dd50c2c72..fbcaf66002 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -1099,14 +1099,14 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uin= t32_t dma_iobase, FWCfgState *s; bool dma_requested =3D dma_iobase && dma_as; =20 - dev =3D qdev_create(NULL, TYPE_FW_CFG_IO); + dev =3D qdev_new(TYPE_FW_CFG_IO); if (!dma_requested) { qdev_prop_set_bit(dev, "dma_enabled", false); } =20 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sbd =3D SYS_BUS_DEVICE(dev); ios =3D FW_CFG_IO(dev); @@ -1138,7 +1138,7 @@ FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, FWCfgState *s; bool dma_requested =3D dma_addr && dma_as; =20 - dev =3D qdev_create(NULL, TYPE_FW_CFG_MEM); + dev =3D qdev_new(TYPE_FW_CFG_MEM); qdev_prop_set_uint32(dev, "data_width", data_width); if (!dma_requested) { qdev_prop_set_bit(dev, "dma_enabled", false); @@ -1146,7 +1146,7 @@ FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, =20 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sbd =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(sbd, 0, ctl_addr); diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index 02f5259e5e..ba1a11442f 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -59,9 +59,9 @@ static void openrisc_sim_net_init(hwaddr base, hwaddr des= criptors, SysBusDevice *s; int i; =20 - dev =3D qdev_create(NULL, "open_eth"); + dev =3D qdev_new("open_eth"); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 s =3D SYS_BUS_DEVICE(dev); for (i =3D 0; i < num_cpus; i++) { @@ -78,9 +78,9 @@ static void openrisc_sim_ompic_init(hwaddr base, int num_= cpus, SysBusDevice *s; int i; =20 - dev =3D qdev_create(NULL, "or1k-ompic"); + dev =3D qdev_new("or1k-ompic"); qdev_prop_set_uint32(dev, "num-cpus", num_cpus); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 s =3D SYS_BUS_DEVICE(dev); for (i =3D 0; i < num_cpus; i++) { diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expand= er_bridge.c index 47aaaf8fd1..5da0d21061 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -231,7 +231,7 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool= pcie, Error **errp) dev_name =3D dev->qdev.id; } =20 - ds =3D qdev_create(NULL, TYPE_PXB_HOST); + ds =3D qdev_new(TYPE_PXB_HOST); if (pcie) { bus =3D pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCI= E_BUS); } else { @@ -255,7 +255,7 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool= pcie, Error **errp) goto err_register_bus; } =20 - qdev_init_nofail(ds); + qdev_realize_and_unref(ds, NULL, &error_fatal); if (bds) { qdev_init_nofail(bds); } diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index f9697dcc43..546ac84cf4 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -40,6 +40,7 @@ =20 #include "qemu/osdep.h" #include "qemu/units.h" +#include "qapi/error.h" #include "qemu/error-report.h" #include "hw/pci/pci.h" #include "hw/irq.h" @@ -743,11 +744,11 @@ PCIBus *bonito_init(qemu_irq *pic) PCIBonitoState *s; PCIDevice *d; =20 - dev =3D qdev_create(NULL, TYPE_BONITO_PCI_HOST_BRIDGE); + dev =3D qdev_new(TYPE_BONITO_PCI_HOST_BRIDGE); phb =3D PCI_HOST_BRIDGE(dev); pcihost =3D BONITO_PCI_HOST_BRIDGE(dev); pcihost->pic =3D pic; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 d =3D pci_create(phb->bus, PCI_DEVFN(0, 0), TYPE_PCI_BONITO); s =3D PCI_BONITO(d); diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 0adbd77553..873d334637 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -270,13 +270,13 @@ PCIBus *i440fx_init(const char *host_type, const char= *pci_type, unsigned i; I440FXState *i440fx; =20 - dev =3D qdev_create(NULL, host_type); + dev =3D qdev_new(host_type); s =3D PCI_HOST_BRIDGE(dev); b =3D pci_root_bus_new(dev, NULL, pci_address_space, address_space_io, 0, TYPE_PCI_BUS); s->bus =3D b; object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 d =3D pci_create_simple(b, 0, pci_type); *pi440fx_state =3D I440FX_PCI_DEVICE(d); diff --git a/hw/pcmcia/pxa2xx.c b/hw/pcmcia/pxa2xx.c index 8667244df4..90f540209d 100644 --- a/hw/pcmcia/pxa2xx.c +++ b/hw/pcmcia/pxa2xx.c @@ -13,6 +13,7 @@ #include "qemu/osdep.h" #include "hw/irq.h" #include "hw/sysbus.h" +#include "qapi/error.h" #include "qemu/module.h" #include "hw/pcmcia.h" #include "hw/arm/pxa.h" @@ -147,11 +148,11 @@ PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *s= ysmem, DeviceState *dev; PXA2xxPCMCIAState *s; =20 - dev =3D qdev_create(NULL, TYPE_PXA2XX_PCMCIA); + dev =3D qdev_new(TYPE_PXA2XX_PCMCIA); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); s =3D PXA2XX_PCMCIA(dev); =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 return s; } diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 2a0b66a152..06f4a38266 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -743,12 +743,12 @@ static DeviceState *ppce500_init_mpic_qemu(PPCE500Mac= hineState *pms, unsigned int smp_cpus =3D machine->smp.cpus; const PPCE500MachineClass *pmc =3D PPCE500_MACHINE_GET_CLASS(pms); =20 - dev =3D qdev_create(NULL, TYPE_OPENPIC); + dev =3D qdev_new(TYPE_OPENPIC); object_property_add_child(OBJECT(machine), "pic", OBJECT(dev)); qdev_prop_set_uint32(dev, "model", pmc->mpic_version); qdev_prop_set_uint32(dev, "nb_cpus", smp_cpus); =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); =20 k =3D 0; @@ -768,10 +768,10 @@ static DeviceState *ppce500_init_mpic_kvm(const PPCE5= 00MachineClass *pmc, DeviceState *dev; CPUState *cs; =20 - dev =3D qdev_create(NULL, TYPE_KVM_OPENPIC); + dev =3D qdev_new(TYPE_KVM_OPENPIC); qdev_prop_set_uint32(dev, "model", pmc->mpic_version); =20 - object_property_set_bool(OBJECT(dev), true, "realized", &err); + qdev_realize_and_unref(dev, NULL, &err); if (err) { error_propagate(errp, err); object_unparent(OBJECT(dev)); @@ -913,10 +913,10 @@ void ppce500_init(MachineState *machine) /* Register Memory */ memory_region_add_subregion(address_space_mem, 0, machine->ram); =20 - dev =3D qdev_create(NULL, "e500-ccsr"); + dev =3D qdev_new("e500-ccsr"); object_property_add_child(qdev_get_machine(), "e500-ccsr", OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); ccsr =3D CCSR(dev); ccsr_addr_space =3D &ccsr->ccsr_space; memory_region_add_subregion(address_space_mem, pmc->ccsrbar_base, @@ -937,9 +937,9 @@ void ppce500_init(MachineState *machine) serial_hd(1), DEVICE_BIG_ENDIAN); } /* I2C */ - dev =3D qdev_create(NULL, "mpc-i2c"); + dev =3D qdev_new("mpc-i2c"); s =3D SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC8544_I2C_IRQ)); memory_region_add_subregion(ccsr_addr_space, MPC8544_I2C_REGS_OFFSET, sysbus_mmio_get_region(s, 0)); @@ -948,18 +948,18 @@ void ppce500_init(MachineState *machine) =20 =20 /* General Utility device */ - dev =3D qdev_create(NULL, "mpc8544-guts"); - qdev_init_nofail(dev); + dev =3D qdev_new("mpc8544-guts"); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); memory_region_add_subregion(ccsr_addr_space, MPC8544_UTIL_OFFSET, sysbus_mmio_get_region(s, 0)); =20 /* PCI */ - dev =3D qdev_create(NULL, "e500-pcihost"); + dev =3D qdev_new("e500-pcihost"); object_property_add_child(qdev_get_machine(), "pci-host", OBJECT(dev)); qdev_prop_set_uint32(dev, "first_slot", pmc->pci_first_slot); qdev_prop_set_uint32(dev, "first_pin_irq", pci_irq_nrs[0]); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); for (i =3D 0; i < PCI_NUM_PINS; i++) { sysbus_connect_irq(s, i, qdev_get_gpio_in(mpicdev, pci_irq_nrs[i])= ); @@ -985,9 +985,9 @@ void ppce500_init(MachineState *machine) if (pmc->has_mpc8xxx_gpio) { qemu_irq poweroff_irq; =20 - dev =3D qdev_create(NULL, "mpc8xxx_gpio"); + dev =3D qdev_new("mpc8xxx_gpio"); s =3D SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC8XXX_GPIO_IR= Q)); memory_region_add_subregion(ccsr_addr_space, MPC8XXX_GPIO_OFFSET, sysbus_mmio_get_region(s, 0)); @@ -999,11 +999,11 @@ void ppce500_init(MachineState *machine) =20 /* Platform Bus Device */ if (pmc->has_platform_bus) { - dev =3D qdev_create(NULL, TYPE_PLATFORM_BUS_DEVICE); + dev =3D qdev_new(TYPE_PLATFORM_BUS_DEVICE); dev->id =3D TYPE_PLATFORM_BUS_DEVICE; qdev_prop_set_uint32(dev, "num_irqs", pmc->platform_bus_num_irqs); qdev_prop_set_uint32(dev, "mmio_size", pmc->platform_bus_size); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); pms->pbus_dev =3D PLATFORM_BUS_DEVICE(dev); =20 s =3D SYS_BUS_DEVICE(pms->pbus_dev); diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 3507f26f6e..69281d7834 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -242,8 +242,8 @@ static void ppc_core99_init(MachineState *machine) } =20 /* UniN init */ - dev =3D qdev_create(NULL, TYPE_UNI_NORTH); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_UNI_NORTH); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); memory_region_add_subregion(get_system_memory(), 0xf8000000, sysbus_mmio_get_region(s, 0)); @@ -288,9 +288,9 @@ static void ppc_core99_init(MachineState *machine) } } =20 - pic_dev =3D qdev_create(NULL, TYPE_OPENPIC); + pic_dev =3D qdev_new(TYPE_OPENPIC); qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO); - qdev_init_nofail(pic_dev); + qdev_realize_and_unref(pic_dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(pic_dev); k =3D 0; for (i =3D 0; i < smp_cpus; i++) { @@ -303,10 +303,10 @@ static void ppc_core99_init(MachineState *machine) if (PPC_INPUT(env) =3D=3D PPC_FLAGS_INPUT_970) { /* 970 gets a U3 bus */ /* Uninorth AGP bus */ - dev =3D qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE); + dev =3D qdev_new(TYPE_U3_AGP_HOST_BRIDGE); object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); uninorth_pci =3D U3_AGP_HOST_BRIDGE(dev); s =3D SYS_BUS_DEVICE(dev); /* PCI hole */ @@ -322,29 +322,29 @@ static void ppc_core99_init(MachineState *machine) } else { /* Use values found on a real PowerMac */ /* Uninorth AGP bus */ - dev =3D qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE); + dev =3D qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE); object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, 0xf0800000); sysbus_mmio_map(s, 1, 0xf0c00000); =20 /* Uninorth internal bus */ - dev =3D qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE); + dev =3D qdev_new(TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE); object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, 0xf4800000); sysbus_mmio_map(s, 1, 0xf4c00000); =20 /* Uninorth main bus */ - dev =3D qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE); + dev =3D qdev_new(TYPE_UNI_NORTH_PCI_HOST_BRIDGE); qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000); object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); uninorth_pci =3D UNI_NORTH_PCI_HOST_BRIDGE(dev); s =3D SYS_BUS_DEVICE(dev); /* PCI hole */ @@ -403,13 +403,13 @@ static void ppc_core99_init(MachineState *machine) } =20 adb_bus =3D qdev_get_child_bus(dev, "adb.0"); - dev =3D qdev_create(adb_bus, TYPE_ADB_KEYBOARD); + dev =3D qdev_new(TYPE_ADB_KEYBOARD); qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, adb_bus, &error_fatal); =20 - dev =3D qdev_create(adb_bus, TYPE_ADB_MOUSE); + dev =3D qdev_new(TYPE_ADB_MOUSE); qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, adb_bus, &error_fatal); } =20 if (machine->usb) { @@ -441,22 +441,22 @@ static void ppc_core99_init(MachineState *machine) move the NVRAM out of ROM again for KVM */ nvram_addr =3D 0xFFE00000; } - dev =3D qdev_create(NULL, TYPE_MACIO_NVRAM); + dev =3D qdev_new(TYPE_MACIO_NVRAM); qdev_prop_set_uint32(dev, "size", 0x2000); qdev_prop_set_uint32(dev, "it_shift", 1); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr); nvr =3D MACIO_NVRAM(dev); pmac_format_nvram_partition(nvr, 0x2000); /* No PCI init: the BIOS will do it */ =20 - dev =3D qdev_create(NULL, TYPE_FW_CFG_MEM); + dev =3D qdev_new(TYPE_FW_CFG_MEM); fw_cfg =3D FW_CFG(dev); qdev_prop_set_uint32(dev, "data_width", 1); qdev_prop_set_bit(dev, "dma_enabled", false); object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(fw_cfg)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, CFG_ADDR); sysbus_mmio_map(s, 1, CFG_ADDR + 2); diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 0b4c1c6373..cfc2eae1d9 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -222,8 +222,8 @@ static void ppc_heathrow_init(MachineState *machine) } =20 /* XXX: we register only 1 output pin for heathrow PIC */ - pic_dev =3D qdev_create(NULL, TYPE_HEATHROW); - qdev_init_nofail(pic_dev); + pic_dev =3D qdev_new(TYPE_HEATHROW); + qdev_realize_and_unref(pic_dev, NULL, &error_fatal); =20 /* Connect the heathrow PIC outputs to the 6xx bus */ for (i =3D 0; i < smp_cpus; i++) { @@ -252,11 +252,11 @@ static void ppc_heathrow_init(MachineState *machine) } =20 /* Grackle PCI host bridge */ - dev =3D qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE); + dev =3D qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE); qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000); object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, GRACKLE_BASE); sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000); @@ -295,10 +295,10 @@ static void ppc_heathrow_init(MachineState *machine) =20 dev =3D DEVICE(object_resolve_path_component(OBJECT(macio), "cuda")); adb_bus =3D qdev_get_child_bus(dev, "adb.0"); - dev =3D qdev_create(adb_bus, TYPE_ADB_KEYBOARD); - qdev_init_nofail(dev); - dev =3D qdev_create(adb_bus, TYPE_ADB_MOUSE); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_ADB_KEYBOARD); + qdev_realize_and_unref(dev, adb_bus, &error_fatal); + dev =3D qdev_new(TYPE_ADB_MOUSE); + qdev_realize_and_unref(dev, adb_bus, &error_fatal); =20 if (machine_usb(machine)) { pci_create_simple(pci_bus, -1, "pci-ohci"); @@ -309,13 +309,13 @@ static void ppc_heathrow_init(MachineState *machine) =20 /* No PCI init: the BIOS will do it */ =20 - dev =3D qdev_create(NULL, TYPE_FW_CFG_MEM); + dev =3D qdev_new(TYPE_FW_CFG_MEM); fw_cfg =3D FW_CFG(dev); qdev_prop_set_uint32(dev, "data_width", 1); qdev_prop_set_bit(dev, "dma_enabled", false); object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(fw_cfg)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, CFG_ADDR); sysbus_mmio_map(s, 1, CFG_ADDR + 2); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 9d1a11adb7..e3b6f0b884 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -729,12 +729,12 @@ static void pnv_init(MachineState *machine) /* * Create our simple PNOR device */ - dev =3D qdev_create(NULL, TYPE_PNV_PNOR); + dev =3D qdev_new(TYPE_PNV_PNOR); if (pnor) { qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(pnor), &error_abort); } - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); pnv->pnor =3D PNV_PNOR(dev); =20 /* load skiboot firmware */ diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index dc318c7aa7..c1cf8d0f46 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -1367,13 +1367,13 @@ void ppc460ex_pcie_init(CPUPPCState *env) { DeviceState *dev; =20 - dev =3D qdev_create(NULL, TYPE_PPC460EX_PCIE_HOST); + dev =3D qdev_new(TYPE_PPC460EX_PCIE_HOST); qdev_prop_set_int32(dev, "dcrn-base", DCRN_PCIE0_BASE); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); ppc460ex_pcie_register_dcrs(PPC460EX_PCIE_HOST(dev), env); =20 - dev =3D qdev_create(NULL, TYPE_PPC460EX_PCIE_HOST); + dev =3D qdev_new(TYPE_PPC460EX_PCIE_HOST); qdev_prop_set_int32(dev, "dcrn-base", DCRN_PCIE1_BASE); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); ppc460ex_pcie_register_dcrs(PPC460EX_PCIE_HOST(dev), env); } diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index 9266453dd9..c7af0e16c3 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -35,6 +35,7 @@ #include "hw/pci/pci_host.h" #include "hw/ppc/ppc.h" #include "hw/boards.h" +#include "qapi/error.h" #include "qemu/error-report.h" #include "qemu/log.h" #include "hw/irq.h" @@ -268,7 +269,7 @@ static void ibm_40p_init(MachineState *machine) qemu_register_reset(ppc_prep_reset, cpu); =20 /* PCI host */ - dev =3D qdev_create(NULL, "raven-pcihost"); + dev =3D qdev_new("raven-pcihost"); if (!bios_name) { bios_name =3D "openbios-ppc"; } @@ -276,7 +277,7 @@ static void ibm_40p_init(MachineState *machine) qdev_prop_set_uint32(dev, "elf-machine", PPC_ELF_MACHINE); pcihost =3D SYS_BUS_DEVICE(dev); object_property_add_child(qdev_get_machine(), "raven", OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); pci_bus =3D PCI_BUS(qdev_get_child_bus(dev, "pci.0")); if (!pci_bus) { error_report("could not create PCI host controller"); @@ -338,13 +339,13 @@ static void ibm_40p_init(MachineState *machine) } =20 /* Prepare firmware configuration for OpenBIOS */ - dev =3D qdev_create(NULL, TYPE_FW_CFG_MEM); + dev =3D qdev_new(TYPE_FW_CFG_MEM); fw_cfg =3D FW_CFG(dev); qdev_prop_set_uint32(dev, "data_width", 1); qdev_prop_set_bit(dev, "dma_enabled", false); object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(fw_cfg)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, CFG_ADDR); sysbus_mmio_map(s, 1, CFG_ADDR + 2); diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index 42a8c9fb7f..503bd21728 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -370,10 +370,10 @@ static void sam460ex_init(MachineState *machine) =20 /* USB */ sysbus_create_simple(TYPE_PPC4xx_EHCI, 0x4bffd0400, uic[2][29]); - dev =3D qdev_create(NULL, "sysbus-ohci"); + dev =3D qdev_new("sysbus-ohci"); qdev_prop_set_string(dev, "masterbus", "usb-bus.0"); qdev_prop_set_uint32(dev, "num-ports", 6); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sbdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(sbdev, 0, 0x4bffd0000); sysbus_connect_irq(sbdev, 0, uic[2][30]); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 6a315c0dc8..1228aeb4b0 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1712,7 +1712,7 @@ static void spapr_machine_reset(MachineState *machine) =20 static void spapr_create_nvram(SpaprMachineState *spapr) { - DeviceState *dev =3D qdev_create(&spapr->vio_bus->bus, "spapr-nvram"); + DeviceState *dev =3D qdev_new("spapr-nvram"); DriveInfo *dinfo =3D drive_get(IF_PFLASH, 0, 0); =20 if (dinfo) { @@ -1720,7 +1720,7 @@ static void spapr_create_nvram(SpaprMachineState *spa= pr) &error_fatal); } =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, &spapr->vio_bus->bus, &error_fatal); =20 spapr->nvram =3D (struct SpaprNvram *)dev; } @@ -2640,9 +2640,9 @@ static PCIHostState *spapr_create_default_phb(void) { DeviceState *dev; =20 - dev =3D qdev_create(NULL, TYPE_SPAPR_PCI_HOST_BRIDGE); + dev =3D qdev_new(TYPE_SPAPR_PCI_HOST_BRIDGE); qdev_prop_set_uint32(dev, "index", 0); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 return PCI_HOST_BRIDGE(dev); } diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index 0c594aa72e..f2ade64e7d 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -325,7 +325,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **e= rrp) DeviceState *dev; int i; =20 - dev =3D qdev_create(NULL, TYPE_SPAPR_XIVE); + dev =3D qdev_new(TYPE_SPAPR_XIVE); qdev_prop_set_uint32(dev, "nr-irqs", smc->nr_xirqs + SPAPR_XIRQ_BA= SE); /* * 8 XIVE END structures per CPU. One for each available @@ -334,7 +334,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **e= rrp) qdev_prop_set_uint32(dev, "nr-ends", nr_servers << 3); object_property_set_link(OBJECT(dev), OBJECT(spapr), "xive-fabric", &error_abort); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 spapr->xive =3D SPAPR_XIVE(dev); =20 diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c index 0b085eabe4..61558db1bf 100644 --- a/hw/ppc/spapr_vio.c +++ b/hw/ppc/spapr_vio.c @@ -576,8 +576,8 @@ SpaprVioBus *spapr_vio_bus_init(void) DeviceState *dev; =20 /* Create bridge device */ - dev =3D qdev_create(NULL, TYPE_SPAPR_VIO_BRIDGE); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_SPAPR_VIO_BRIDGE); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 /* Create bus on bridge device */ qbus =3D qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio"); diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index 0dacfcd236..f28a69c0f9 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -36,6 +36,7 @@ #include "sysemu/device_tree.h" #include "hw/loader.h" #include "elf.h" +#include "qapi/error.h" #include "qemu/error-report.h" #include "qemu/log.h" #include "qemu/option.h" @@ -228,9 +229,9 @@ static void virtex_init(MachineState *machine) 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); =20 cpu_irq =3D (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT]; - dev =3D qdev_create(NULL, "xlnx.xps-intc"); + dev =3D qdev_new("xlnx.xps-intc"); qdev_prop_set_uint32(dev, "kind-of-intr", 0); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irq[0]); for (i =3D 0; i < 32; i++) { @@ -241,10 +242,10 @@ static void virtex_init(MachineState *machine) 115200, serial_hd(0), DEVICE_LITTLE_ENDIAN); =20 /* 2 timers at irq 2 @ 62 Mhz. */ - dev =3D qdev_create(NULL, "xlnx.xps-timer"); + dev =3D qdev_new("xlnx.xps-timer"); qdev_prop_set_uint32(dev, "one-timer-only", 0); qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]); =20 diff --git a/hw/riscv/sifive_clint.c b/hw/riscv/sifive_clint.c index e933d35092..729fce0a58 100644 --- a/hw/riscv/sifive_clint.c +++ b/hw/riscv/sifive_clint.c @@ -20,6 +20,7 @@ */ =20 #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/error-report.h" #include "qemu/module.h" #include "hw/sysbus.h" @@ -245,13 +246,13 @@ DeviceState *sifive_clint_create(hwaddr addr, hwaddr = size, uint32_t num_harts, env->timecmp =3D 0; } =20 - DeviceState *dev =3D qdev_create(NULL, TYPE_SIFIVE_CLINT); + DeviceState *dev =3D qdev_new(TYPE_SIFIVE_CLINT); qdev_prop_set_uint32(dev, "num-harts", num_harts); qdev_prop_set_uint32(dev, "sip-base", sip_base); qdev_prop_set_uint32(dev, "timecmp-base", timecmp_base); qdev_prop_set_uint32(dev, "time-base", time_base); qdev_prop_set_uint32(dev, "aperture-size", size); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); return dev; } diff --git a/hw/riscv/sifive_e_prci.c b/hw/riscv/sifive_e_prci.c index a1c0d44f18..423af22ecc 100644 --- a/hw/riscv/sifive_e_prci.c +++ b/hw/riscv/sifive_e_prci.c @@ -20,6 +20,7 @@ =20 #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" #include "hw/hw.h" @@ -117,8 +118,8 @@ type_init(sifive_e_prci_register_types) */ DeviceState *sifive_e_prci_create(hwaddr addr) { - DeviceState *dev =3D qdev_create(NULL, TYPE_SIFIVE_E_PRCI); - qdev_init_nofail(dev); + DeviceState *dev =3D qdev_new(TYPE_SIFIVE_E_PRCI); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); return dev; } diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c index c1e04cbb98..203fec8e48 100644 --- a/hw/riscv/sifive_plic.c +++ b/hw/riscv/sifive_plic.c @@ -19,6 +19,7 @@ */ =20 #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" #include "qemu/error-report.h" @@ -494,7 +495,7 @@ DeviceState *sifive_plic_create(hwaddr addr, char *hart= _config, uint32_t context_base, uint32_t context_stride, uint32_t aperture_size) { - DeviceState *dev =3D qdev_create(NULL, TYPE_SIFIVE_PLIC); + DeviceState *dev =3D qdev_new(TYPE_SIFIVE_PLIC); assert(enable_stride =3D=3D (enable_stride & -enable_stride)); assert(context_stride =3D=3D (context_stride & -context_stride)); qdev_prop_set_string(dev, "hart-config", hart_config); @@ -507,7 +508,7 @@ DeviceState *sifive_plic_create(hwaddr addr, char *hart= _config, qdev_prop_set_uint32(dev, "context-base", context_base); qdev_prop_set_uint32(dev, "context-stride", context_stride); qdev_prop_set_uint32(dev, "aperture-size", aperture_size); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); return dev; } diff --git a/hw/riscv/sifive_test.c b/hw/riscv/sifive_test.c index 339195c6ff..596757f714 100644 --- a/hw/riscv/sifive_test.c +++ b/hw/riscv/sifive_test.c @@ -20,6 +20,7 @@ =20 #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" #include "sysemu/runstate.h" @@ -92,8 +93,8 @@ type_init(sifive_test_register_types) */ DeviceState *sifive_test_create(hwaddr addr) { - DeviceState *dev =3D qdev_create(NULL, TYPE_SIFIVE_TEST); - qdev_init_nofail(dev); + DeviceState *dev =3D qdev_new(TYPE_SIFIVE_TEST); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); return dev; } diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index d569b38d1b..fa88e9118c 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -443,9 +443,9 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion = *sys_mem, qemu_irq irq; int i; =20 - dev =3D qdev_create(NULL, TYPE_GPEX_HOST); + dev =3D qdev_new(TYPE_GPEX_HOST); =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 ecam_alias =3D g_new0(MemoryRegion, 1); ecam_reg =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); diff --git a/hw/rtc/m48t59.c b/hw/rtc/m48t59.c index 47d48054fd..f6acf416ff 100644 --- a/hw/rtc/m48t59.c +++ b/hw/rtc/m48t59.c @@ -33,6 +33,7 @@ #include "sysemu/sysemu.h" #include "hw/sysbus.h" #include "exec/address-spaces.h" +#include "qapi/error.h" #include "qemu/bcd.h" #include "qemu/module.h" #include "trace.h" @@ -579,9 +580,9 @@ Nvram *m48t59_init(qemu_irq IRQ, hwaddr mem_base, continue; } =20 - dev =3D qdev_create(NULL, m48txx_sysbus_info[i].bus_name); + dev =3D qdev_new(m48txx_sysbus_info[i].bus_name); qdev_prop_set_int32(dev, "base-year", base_year); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, IRQ); if (io_base !=3D 0) { diff --git a/hw/rtc/sun4v-rtc.c b/hw/rtc/sun4v-rtc.c index ada01b5774..ed1c10832f 100644 --- a/hw/rtc/sun4v-rtc.c +++ b/hw/rtc/sun4v-rtc.c @@ -11,6 +11,7 @@ =20 #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qapi/error.h" #include "qemu/module.h" #include "qemu/timer.h" #include "hw/rtc/sun4v-rtc.h" @@ -55,10 +56,10 @@ void sun4v_rtc_init(hwaddr addr) DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, TYPE_SUN4V_RTC); + dev =3D qdev_new(TYPE_SUN4V_RTC); s =3D SYS_BUS_DEVICE(dev); =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus_mmio_map(s, 0, addr); } diff --git a/hw/s390x/ap-bridge.c b/hw/s390x/ap-bridge.c index d0dbd0f1b6..974c97f454 100644 --- a/hw/s390x/ap-bridge.c +++ b/hw/s390x/ap-bridge.c @@ -49,10 +49,10 @@ void s390_init_ap(void) } =20 /* Create bridge device */ - dev =3D qdev_create(NULL, TYPE_AP_BRIDGE); + dev =3D qdev_new(TYPE_AP_BRIDGE); object_property_add_child(qdev_get_machine(), TYPE_AP_BRIDGE, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 /* Create bus on bridge device */ bus =3D qbus_create(TYPE_AP_BUS, dev, TYPE_AP_BUS); diff --git a/hw/s390x/css-bridge.c b/hw/s390x/css-bridge.c index 813bfc768a..a0dd2da0b8 100644 --- a/hw/s390x/css-bridge.c +++ b/hw/s390x/css-bridge.c @@ -101,10 +101,10 @@ VirtualCssBus *virtual_css_bus_init(void) DeviceState *dev; =20 /* Create bridge device */ - dev =3D qdev_create(NULL, TYPE_VIRTUAL_CSS_BRIDGE); + dev =3D qdev_new(TYPE_VIRTUAL_CSS_BRIDGE); object_property_add_child(qdev_get_machine(), TYPE_VIRTUAL_CSS_BRIDGE, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 /* Create bus on bridge device */ bus =3D qbus_create(TYPE_VIRTUAL_CSS_BUS, dev, "virtual-css"); diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index 60b16fef77..fb68c5a437 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -227,9 +227,9 @@ static void s390_create_virtio_net(BusState *bus, const= char *name) =20 qemu_check_nic_model(nd, "virtio"); =20 - dev =3D qdev_create(bus, name); + dev =3D qdev_new(name); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, bus, &error_fatal); } } =20 @@ -237,9 +237,9 @@ static void s390_create_sclpconsole(const char *type, C= hardev *chardev) { DeviceState *dev; =20 - dev =3D qdev_create(sclp_get_event_facility_bus(), type); + dev =3D qdev_new(type); qdev_prop_set_chr(dev, "chardev", chardev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, sclp_get_event_facility_bus(), &error_fata= l); } =20 static void ccw_init(MachineState *machine) @@ -269,10 +269,10 @@ static void ccw_init(MachineState *machine) machine->initrd_filename, "s390-ccw.img", "s390-netboot.img", true); =20 - dev =3D qdev_create(NULL, TYPE_S390_PCI_HOST_BRIDGE); + dev =3D qdev_new(TYPE_S390_PCI_HOST_BRIDGE); object_property_add_child(qdev_get_machine(), TYPE_S390_PCI_HOST_BRIDG= E, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 /* register hypercalls */ virtio_ccw_register_hcalls(); diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c index 2836f807a0..1a7320c0af 100644 --- a/hw/scsi/scsi-bus.c +++ b/hw/scsi/scsi-bus.c @@ -261,7 +261,7 @@ SCSIDevice *scsi_bus_legacy_add_drive(SCSIBus *bus, Blo= ckBackend *blk, driver =3D "scsi-hd"; } } - dev =3D qdev_create(&bus->qbus, driver); + dev =3D qdev_new(driver); name =3D g_strdup_printf("legacy[%d]", unit); object_property_add_child(OBJECT(bus), name, OBJECT(dev)); g_free(name); @@ -293,7 +293,7 @@ SCSIDevice *scsi_bus_legacy_add_drive(SCSIBus *bus, Blo= ckBackend *blk, qdev_prop_set_enum(dev, "rerror", rerror); qdev_prop_set_enum(dev, "werror", werror); =20 - object_property_set_bool(OBJECT(dev), true, "realized", &err); + qdev_realize_and_unref(dev, &bus->qbus, &err); if (err !=3D NULL) { error_propagate(errp, err); object_unparent(OBJECT(dev)); diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c index 923488beb2..d17dc03c73 100644 --- a/hw/scsi/spapr_vscsi.c +++ b/hw/scsi/spapr_vscsi.c @@ -1225,9 +1225,9 @@ void spapr_vscsi_create(SpaprVioBus *bus) { DeviceState *dev; =20 - dev =3D qdev_create(&bus->bus, "spapr-vscsi"); + dev =3D qdev_new("spapr-vscsi"); =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, &bus->bus, &error_fatal); scsi_bus_legacy_handle_cmdline(&VIO_SPAPR_VSCSI_DEVICE(dev)->bus); } =20 diff --git a/hw/sd/milkymist-memcard.c b/hw/sd/milkymist-memcard.c index 926e1af475..4cfdf7b64c 100644 --- a/hw/sd/milkymist-memcard.c +++ b/hw/sd/milkymist-memcard.c @@ -278,9 +278,9 @@ static void milkymist_memcard_realize(DeviceState *dev,= Error **errp) /* FIXME use a qdev drive property instead of drive_get_next() */ dinfo =3D drive_get_next(IF_SD); blk =3D dinfo ? blk_by_legacy_dinfo(dinfo) : NULL; - carddev =3D qdev_create(BUS(&s->sdbus), TYPE_SD_CARD); + carddev =3D qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &err); - object_property_set_bool(OBJECT(carddev), true, "realized", &err); + qdev_realize_and_unref(carddev, BUS(&s->sdbus), &err); if (err) { error_setg(errp, "failed to init SD card: %s", error_get_pretty(er= r)); return; diff --git a/hw/sd/pxa2xx_mmci.c b/hw/sd/pxa2xx_mmci.c index c32df1b8f9..89784407b9 100644 --- a/hw/sd/pxa2xx_mmci.c +++ b/hw/sd/pxa2xx_mmci.c @@ -485,23 +485,23 @@ PXA2xxMMCIState *pxa2xx_mmci_init(MemoryRegion *sysme= m, PXA2xxMMCIState *s; Error *err =3D NULL; =20 - dev =3D qdev_create(NULL, TYPE_PXA2XX_MMCI); + dev =3D qdev_new(TYPE_PXA2XX_MMCI); s =3D PXA2XX_MMCI(dev); sbd =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(sbd, 0, base); sysbus_connect_irq(sbd, 0, irq); qdev_connect_gpio_out_named(dev, "rx-dma", 0, rx_dma); qdev_connect_gpio_out_named(dev, "tx-dma", 0, tx_dma); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 /* Create and plug in the sd card */ - carddev =3D qdev_create(qdev_get_child_bus(dev, "sd-bus"), TYPE_SD_CAR= D); + carddev =3D qdev_new(TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &err); if (err) { error_reportf_err(err, "failed to init SD card: "); return NULL; } - object_property_set_bool(OBJECT(carddev), true, "realized", &err); + qdev_realize_and_unref(carddev, qdev_get_child_bus(dev, "sd-bus"), &er= r); if (err) { error_reportf_err(err, "failed to init SD card: "); return NULL; diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c index 829797b597..f98a6f3ae1 100644 --- a/hw/sd/ssi-sd.c +++ b/hw/sd/ssi-sd.c @@ -252,7 +252,7 @@ static void ssi_sd_realize(SSISlave *d, Error **errp) /* Create and plug in the sd card */ /* FIXME use a qdev drive property instead of drive_get_next() */ dinfo =3D drive_get_next(IF_SD); - carddev =3D qdev_create(BUS(&s->sdbus), TYPE_SD_CARD); + carddev =3D qdev_new(TYPE_SD_CARD); if (dinfo) { qdev_prop_set_drive(carddev, "drive", blk_by_legacy_dinfo(dinfo), = &err); if (err) { @@ -265,7 +265,7 @@ static void ssi_sd_realize(SSISlave *d, Error **errp) goto fail; } =20 - object_property_set_bool(OBJECT(carddev), true, "realized", &err); + qdev_realize_and_unref(carddev, BUS(&s->sdbus), &err); if (err) { goto fail; } diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index 72bb5285cc..d9592280bc 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -257,9 +257,9 @@ static void r2d_init(MachineState *machine) s =3D sh7750_init(cpu, address_space_mem); irq =3D r2d_fpga_init(address_space_mem, 0x04000000, sh7750_irl(s)); =20 - dev =3D qdev_create(NULL, "sh_pci"); + dev =3D qdev_new("sh_pci"); busdev =3D SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); pci_bus =3D PCI_BUS(qdev_get_child_bus(dev, "pci")); sysbus_mmio_map(busdev, 0, P4ADDR(0x1e200000)); sysbus_mmio_map(busdev, 1, A7ADDR(0x1e200000)); @@ -268,23 +268,23 @@ static void r2d_init(MachineState *machine) sysbus_connect_irq(busdev, 2, irq[PCI_INTC]); sysbus_connect_irq(busdev, 3, irq[PCI_INTD]); =20 - dev =3D qdev_create(NULL, "sysbus-sm501"); + dev =3D qdev_new("sysbus-sm501"); busdev =3D SYS_BUS_DEVICE(dev); qdev_prop_set_uint32(dev, "vram-size", SM501_VRAM_SIZE); qdev_prop_set_uint32(dev, "base", 0x10000000); qdev_prop_set_chr(dev, "chardev", serial_hd(2)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(busdev, 0, 0x10000000); sysbus_mmio_map(busdev, 1, 0x13e00000); sysbus_connect_irq(busdev, 0, irq[SM501]); =20 /* onboard CF (True IDE mode, Master only). */ dinfo =3D drive_get(IF_IDE, 0, 0); - dev =3D qdev_create(NULL, "mmio-ide"); + dev =3D qdev_new("mmio-ide"); busdev =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(busdev, 0, irq[CF_IDE]); qdev_prop_set_uint32(dev, "shift", 1); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(busdev, 0, 0x14001000); sysbus_mmio_map(busdev, 1, 0x1400080c); mmio_ide_init_drives(dev, dinfo, NULL); diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 3facb8c2ae..52c0229574 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -228,12 +228,12 @@ static void leon3_generic_hw_init(MachineState *machi= ne) GRLIB_AHB_SLAVE, GRLIB_AHBMEM_AREA); =20 /* Allocate IRQ manager */ - dev =3D qdev_create(NULL, TYPE_GRLIB_IRQMP); + dev =3D qdev_new(TYPE_GRLIB_IRQMP); qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, env, "pil", 1); qdev_connect_gpio_out_named(dev, "grlib-irq", 0, qdev_get_gpio_in_named(DEVICE(cpu), "pil",= 0)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); env->irq_manager =3D dev; env->qemu_irq_ack =3D leon3_irq_manager; @@ -322,11 +322,11 @@ static void leon3_generic_hw_init(MachineState *machi= ne) } =20 /* Allocate timers */ - dev =3D qdev_create(NULL, TYPE_GRLIB_GPTIMER); + dev =3D qdev_new(TYPE_GRLIB_GPTIMER); qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT); qdev_prop_set_uint32(dev, "frequency", CPU_CLK); qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET); for (i =3D 0; i < LEON3_TIMER_COUNT; i++) { @@ -340,9 +340,9 @@ static void leon3_generic_hw_init(MachineState *machine) =20 /* Allocate uart */ if (serial_hd(0)) { - dev =3D qdev_create(NULL, TYPE_GRLIB_APB_UART); + dev =3D qdev_new(TYPE_GRLIB_APB_UART); qdev_prop_set_chr(dev, "chrdev", serial_hd(0)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irqs[LEON3_UART_IRQ= ]); grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF, diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 8dda3f7292..61356946e9 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -315,9 +315,9 @@ static void *iommu_init(hwaddr addr, uint32_t version, = qemu_irq irq) DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, TYPE_SUN4M_IOMMU); + dev =3D qdev_new(TYPE_SUN4M_IOMMU); qdev_prop_set_uint32(dev, "version", version); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, irq); sysbus_mmio_map(s, 0, addr); @@ -335,8 +335,8 @@ static void *sparc32_dma_init(hwaddr dma_base, SysBusESPState *esp; SysBusPCNetState *lance; =20 - dma =3D qdev_create(NULL, TYPE_SPARC32_DMA); - qdev_init_nofail(dma); + dma =3D qdev_new(TYPE_SPARC32_DMA); + qdev_realize_and_unref(dma, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, dma_base); =20 espdma =3D SPARC32_ESPDMA_DEVICE(object_resolve_path_component( @@ -366,8 +366,8 @@ static DeviceState *slavio_intctl_init(hwaddr addr, SysBusDevice *s; unsigned int i, j; =20 - dev =3D qdev_create(NULL, "slavio_intctl"); - qdev_init_nofail(dev); + dev =3D qdev_new("slavio_intctl"); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 s =3D SYS_BUS_DEVICE(dev); =20 @@ -394,9 +394,9 @@ static void slavio_timer_init_all(hwaddr addr, qemu_irq= master_irq, SysBusDevice *s; unsigned int i; =20 - dev =3D qdev_create(NULL, "slavio_timer"); + dev =3D qdev_new("slavio_timer"); qdev_prop_set_uint32(dev, "num_cpus", num_cpus); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, master_irq); sysbus_mmio_map(s, 0, addr + SYS_TIMER_OFFSET); @@ -432,8 +432,8 @@ static void slavio_misc_init(hwaddr base, DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, "slavio_misc"); - qdev_init_nofail(dev); + dev =3D qdev_new("slavio_misc"); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); if (base) { /* 8 bit registers */ @@ -469,9 +469,9 @@ static void ecc_init(hwaddr base, qemu_irq irq, uint32_= t version) DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, "eccmemctl"); + dev =3D qdev_new("eccmemctl"); qdev_prop_set_uint32(dev, "version", version); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, irq); sysbus_mmio_map(s, 0, base); @@ -485,8 +485,8 @@ static void apc_init(hwaddr power_base, qemu_irq cpu_ha= lt) DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, "apc"); - qdev_init_nofail(dev); + dev =3D qdev_new("apc"); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); /* Power management (APC) XXX: not a Slavio device */ sysbus_mmio_map(s, 0, power_base); @@ -499,12 +499,12 @@ static void tcx_init(hwaddr addr, qemu_irq irq, int v= ram_size, int width, DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, "SUNW,tcx"); + dev =3D qdev_new("SUNW,tcx"); qdev_prop_set_uint32(dev, "vram_size", vram_size); qdev_prop_set_uint16(dev, "width", width); qdev_prop_set_uint16(dev, "height", height); qdev_prop_set_uint16(dev, "depth", depth); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); =20 /* 10/ROM : FCode ROM */ @@ -551,12 +551,12 @@ static void cg3_init(hwaddr addr, qemu_irq irq, int v= ram_size, int width, DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, "cgthree"); + dev =3D qdev_new("cgthree"); qdev_prop_set_uint32(dev, "vram-size", vram_size); qdev_prop_set_uint16(dev, "width", width); qdev_prop_set_uint16(dev, "height", height); qdev_prop_set_uint16(dev, "depth", depth); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); =20 /* FCode ROM */ @@ -580,8 +580,8 @@ static void idreg_init(hwaddr addr) DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, TYPE_MACIO_ID_REGISTER); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_MACIO_ID_REGISTER); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); =20 sysbus_mmio_map(s, 0, addr); @@ -646,8 +646,8 @@ static void afx_init(hwaddr addr) DeviceState *dev; SysBusDevice *s; =20 - dev =3D qdev_create(NULL, TYPE_TCX_AFX); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_TCX_AFX); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); =20 sysbus_mmio_map(s, 0, addr); @@ -707,8 +707,8 @@ static void prom_init(hwaddr addr, const char *bios_nam= e) char *filename; int ret; =20 - dev =3D qdev_create(NULL, TYPE_OPENPROM); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_OPENPROM); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); =20 sysbus_mmio_map(s, 0, addr); @@ -876,9 +876,9 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwd= ef, cpu_irqs[i] =3D qemu_allocate_irqs(dummy_cpu_set_irq, NULL, MAX_PI= LS); =20 /* Create and map RAM frontend */ - dev =3D qdev_create(NULL, "memory"); + dev =3D qdev_new("memory"); object_property_set_link(OBJECT(dev), ram_memdev, "memdev", &error_fat= al); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0); =20 /* models without ECC don't trap when missing ram is accessed */ @@ -977,7 +977,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwd= ef, =20 /* Slavio TTYA (base+4, Linux ttyS0) is the first QEMU serial device Slavio TTYB (base+0, Linux ttyS1) is the second QEMU serial device = */ - dev =3D qdev_create(NULL, TYPE_ESCC); + dev =3D qdev_new(TYPE_ESCC); qdev_prop_set_uint32(dev, "disabled", !machine->enable_graphics); qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK); qdev_prop_set_uint32(dev, "it_shift", 1); @@ -985,13 +985,13 @@ static void sun4m_hw_init(const struct sun4m_hwdef *h= wdef, qdev_prop_set_chr(dev, "chrA", NULL); qdev_prop_set_uint32(dev, "chnBtype", escc_mouse); qdev_prop_set_uint32(dev, "chnAtype", escc_kbd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, slavio_irq[14]); sysbus_connect_irq(s, 1, slavio_irq[14]); sysbus_mmio_map(s, 0, hwdef->ms_kb_base); =20 - dev =3D qdev_create(NULL, TYPE_ESCC); + dev =3D qdev_new(TYPE_ESCC); qdev_prop_set_uint32(dev, "disabled", 0); qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK); qdev_prop_set_uint32(dev, "it_shift", 1); @@ -999,7 +999,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwd= ef, qdev_prop_set_chr(dev, "chrA", serial_hd(0)); qdev_prop_set_uint32(dev, "chnBtype", escc_serial); qdev_prop_set_uint32(dev, "chnAtype", escc_serial); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 s =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, slavio_irq[15]); @@ -1055,13 +1055,13 @@ static void sun4m_hw_init(const struct sun4m_hwdef = *hwdef, ecc_init(hwdef->ecc_base, slavio_irq[28], hwdef->ecc_version); =20 - dev =3D qdev_create(NULL, TYPE_FW_CFG_MEM); + dev =3D qdev_new(TYPE_FW_CFG_MEM); fw_cfg =3D FW_CFG(dev); qdev_prop_set_uint32(dev, "data_width", 1); qdev_prop_set_bit(dev, "dma_enabled", false); object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, OBJECT(fw_cfg)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, CFG_ADDR); sysbus_mmio_map(s, 1, CFG_ADDR + 2); diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 3a757ec42e..ade9c22825 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -351,8 +351,8 @@ static void ebus_realize(PCIDevice *pci_dev, Error **er= rp) qdev_init_nofail(dev); =20 /* Power */ - dev =3D qdev_create(NULL, TYPE_SUN4U_POWER); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_SUN4U_POWER); + qdev_realize_and_unref(dev, NULL, &error_fatal); sbd =3D SYS_BUS_DEVICE(dev); memory_region_add_subregion(pci_address_space_io(pci_dev), 0x7240, sysbus_mmio_get_region(sbd, 0)); @@ -426,8 +426,8 @@ static void prom_init(hwaddr addr, const char *bios_nam= e) char *filename; int ret; =20 - dev =3D qdev_create(NULL, TYPE_OPENPROM); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_OPENPROM); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); =20 sysbus_mmio_map(s, 0, addr); @@ -520,12 +520,12 @@ static void ram_init(hwaddr addr, ram_addr_t RAM_size) RamDevice *d; =20 /* allocate RAM */ - dev =3D qdev_create(NULL, TYPE_SUN4U_MEMORY); + dev =3D qdev_new(TYPE_SUN4U_MEMORY); s =3D SYS_BUS_DEVICE(dev); =20 d =3D SUN4U_RAM(dev); d->size =3D RAM_size; - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 sysbus_mmio_map(s, 0, addr); } @@ -572,8 +572,8 @@ static void sun4uv_init(MemoryRegion *address_space_mem, cpu =3D sparc64_cpu_devinit(machine->cpu_type, hwdef->prom_addr); =20 /* IOMMU */ - iommu =3D qdev_create(NULL, TYPE_SUN4U_IOMMU); - qdev_init_nofail(iommu); + iommu =3D qdev_new(TYPE_SUN4U_IOMMU); + qdev_realize_and_unref(iommu, NULL, &error_fatal); =20 /* set up devices */ ram_init(0, machine->ram_size); @@ -581,12 +581,12 @@ static void sun4uv_init(MemoryRegion *address_space_m= em, prom_init(hwdef->prom_addr, bios_name); =20 /* Init sabre (PCI host bridge) */ - sabre =3D SABRE_DEVICE(qdev_create(NULL, TYPE_SABRE)); + sabre =3D SABRE_DEVICE(qdev_new(TYPE_SABRE)); qdev_prop_set_uint64(DEVICE(sabre), "special-base", PBM_SPECIAL_BASE); qdev_prop_set_uint64(DEVICE(sabre), "mem-base", PBM_MEM_BASE); object_property_set_link(OBJECT(sabre), OBJECT(iommu), "iommu", &error_abort); - qdev_init_nofail(DEVICE(sabre)); + qdev_realize_and_unref(DEVICE(sabre), NULL, &error_fatal); =20 /* Wire up PCI interrupts to CPU */ for (i =3D 0; i < IVEC_MAX; i++) { @@ -689,10 +689,10 @@ static void sun4uv_init(MemoryRegion *address_space_m= em, graphic_width, graphic_height, graphic_depth, (uint8_t *)&macaddr); =20 - dev =3D qdev_create(NULL, TYPE_FW_CFG_IO); + dev =3D qdev_new(TYPE_FW_CFG_IO); qdev_prop_set_bit(dev, "dma_enabled", false); object_property_add_child(OBJECT(ebus), TYPE_FW_CFG, OBJECT(dev)); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); memory_region_add_subregion(pci_address_space_io(ebus), BIOS_CFG_IOPOR= T, &FW_CFG_IO(dev)->comb_iomem); =20 diff --git a/hw/xen/xen-bus.c b/hw/xen/xen-bus.c index 32dd4461be..532f73661b 100644 --- a/hw/xen/xen-bus.c +++ b/hw/xen/xen-bus.c @@ -1387,9 +1387,9 @@ type_init(xen_register_types) =20 void xen_bus_init(void) { - DeviceState *dev =3D qdev_create(NULL, TYPE_XEN_BRIDGE); + DeviceState *dev =3D qdev_new(TYPE_XEN_BRIDGE); BusState *bus =3D qbus_create(TYPE_XEN_BUS, dev, NULL); =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); qbus_set_bus_hotplug_handler(bus, &error_abort); } diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c index f9d013811a..1c25373852 100644 --- a/hw/xen/xen-legacy-backend.c +++ b/hw/xen/xen-legacy-backend.c @@ -703,8 +703,8 @@ int xen_be_init(void) xengnttab_close(gnttabdev); } =20 - xen_sysdev =3D qdev_create(NULL, TYPE_XENSYSDEV); - qdev_init_nofail(xen_sysdev); + xen_sysdev =3D qdev_new(TYPE_XENSYSDEV); + qdev_realize_and_unref(xen_sysdev, NULL, &error_fatal); xen_sysbus =3D qbus_create(TYPE_XENSYSBUS, xen_sysdev, "xen-sysbus"); qbus_set_bus_hotplug_handler(xen_sysbus, &error_abort); =20 diff --git a/hw/xtensa/virt.c b/hw/xtensa/virt.c index b22dcf938a..4dbc1a1614 100644 --- a/hw/xtensa/virt.c +++ b/hw/xtensa/virt.c @@ -62,8 +62,8 @@ static void create_pcie(CPUXtensaState *env, int irq_base= , hwaddr addr_base) qemu_irq *extints; int i; =20 - dev =3D qdev_create(NULL, TYPE_GPEX_HOST); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_GPEX_HOST); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 /* Map only the first size_ecam bytes of ECAM space. */ ecam_alias =3D g_new0(MemoryRegion, 1); diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index 60ccc74f5f..eab5c8062e 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -148,9 +148,9 @@ static void xtfpga_net_init(MemoryRegion *address_space, SysBusDevice *s; MemoryRegion *ram; =20 - dev =3D qdev_create(NULL, "open_eth"); + dev =3D qdev_new("open_eth"); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 s =3D SYS_BUS_DEVICE(dev); sysbus_connect_irq(s, 0, irq); @@ -171,7 +171,7 @@ static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *add= ress_space, DriveInfo *dinfo, int be) { SysBusDevice *s; - DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); + DeviceState *dev =3D qdev_new(TYPE_PFLASH_CFI01); =20 qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo), &error_abort); @@ -181,7 +181,7 @@ static PFlashCFI01 *xtfpga_flash_init(MemoryRegion *add= ress_space, qdev_prop_set_uint8(dev, "width", 2); qdev_prop_set_bit(dev, "big-endian", be); qdev_prop_set_string(dev, "name", "xtfpga.io.flash"); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); s =3D SYS_BUS_DEVICE(dev); memory_region_add_subregion(address_space, board->flash->base, sysbus_mmio_get_region(s, 0)); --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591721743; cv=none; d=zohomail.com; s=zohoarc; b=ChlmqX0iebCPgz6Z31lOTfmT/Od3p1pmIor2KkELMLOD6XBq93IUKYpSXpq3LV2OxA1vtw71RYD0372Jx9TEWo9J2T78/OgGCqYWOHlV1FF/5jmuEUubLrgdql1D40Kd2wa1UKCXsrwHsH39pYbtwA99lcQZi/8gC5izDFOsPqw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591721743; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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charset="utf-8" Same transformation as in the previous commit. Manual, because convincing Coccinelle to transform these cases is somewhere between not worthwhile and infeasible (at least for me). Signed-off-by: Markus Armbruster Reviewed-by: Paolo Bonzini --- hw/arm/highbank.c | 26 +++++++++++++------------- hw/arm/sbsa-ref.c | 4 ++-- hw/arm/virt.c | 4 ++-- hw/block/xen-block.c | 4 ++-- hw/char/serial.c | 4 ++-- hw/display/ati.c | 5 ++--- hw/display/sm501.c | 5 ++--- hw/display/xlnx_dp.c | 5 +++-- hw/i386/pc.c | 4 ++-- hw/i386/pc_sysfw.c | 4 ++-- hw/pci-bridge/pci_expander_bridge.c | 4 ++-- hw/ppc/pnv.c | 4 ++-- hw/riscv/virt.c | 4 ++-- hw/s390x/s390-pci-bus.c | 4 ++-- hw/sparc/leon3.c | 8 ++++---- hw/usb/bus.c | 8 ++++---- 16 files changed, 48 insertions(+), 49 deletions(-) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index ac9de9411e..1bed540011 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -311,20 +311,20 @@ static void calxeda_init(MachineState *machine, enum = cxmachines machine_id) =20 switch (machine_id) { case CALXEDA_HIGHBANK: - dev =3D qdev_create(NULL, "l2x0"); - qdev_init_nofail(dev); + dev =3D qdev_new("l2x0"); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, 0xfff12000); =20 - dev =3D qdev_create(NULL, TYPE_A9MPCORE_PRIV); + dev =3D qdev_new(TYPE_A9MPCORE_PRIV); break; case CALXEDA_MIDWAY: - dev =3D qdev_create(NULL, TYPE_A15MPCORE_PRIV); + dev =3D qdev_new(TYPE_A15MPCORE_PRIV); break; } qdev_prop_set_uint32(dev, "num-cpu", smp_cpus); qdev_prop_set_uint32(dev, "num-irq", NIRQ_GIC); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, MPCORE_PERIPHBASE); for (n =3D 0; n < smp_cpus; n++) { @@ -338,17 +338,17 @@ static void calxeda_init(MachineState *machine, enum = cxmachines machine_id) pic[n] =3D qdev_get_gpio_in(dev, n); } =20 - dev =3D qdev_create(NULL, "sp804"); + dev =3D qdev_new("sp804"); qdev_prop_set_uint32(dev, "freq0", 150000000); qdev_prop_set_uint32(dev, "freq1", 150000000); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, 0xfff34000); sysbus_connect_irq(busdev, 0, pic[18]); pl011_create(0xfff36000, pic[20], serial_hd(0)); =20 - dev =3D qdev_create(NULL, TYPE_HIGHBANK_REGISTERS); - qdev_init_nofail(dev); + dev =3D qdev_new(TYPE_HIGHBANK_REGISTERS); + qdev_realize_and_unref(dev, NULL, &error_fatal); busdev =3D SYS_BUS_DEVICE(dev); sysbus_mmio_map(busdev, 0, 0xfff3c000); =20 @@ -363,18 +363,18 @@ static void calxeda_init(MachineState *machine, enum = cxmachines machine_id) =20 if (nd_table[0].used) { qemu_check_nic_model(&nd_table[0], "xgmac"); - dev =3D qdev_create(NULL, "xgmac"); + dev =3D qdev_new("xgmac"); qdev_set_nic_properties(dev, &nd_table[0]); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xfff50000); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[77]); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, pic[78]); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, pic[79]); =20 qemu_check_nic_model(&nd_table[1], "xgmac"); - dev =3D qdev_create(NULL, "xgmac"); + dev =3D qdev_new("xgmac"); qdev_set_nic_properties(dev, &nd_table[1]); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xfff51000); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[80]); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, pic[81]); diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index d68c5d87af..fe24567333 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -211,7 +211,7 @@ static PFlashCFI01 *sbsa_flash_create1(SBSAMachineState= *sms, * Create a single flash device. We use the same parameters as * the flash devices on the Versatile Express board. */ - DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); + DeviceState *dev =3D qdev_new(TYPE_PFLASH_CFI01); =20 qdev_prop_set_uint64(dev, "sector-length", SBSA_FLASH_SECTOR_SIZE); qdev_prop_set_uint8(dev, "width", 4); @@ -243,7 +243,7 @@ static void sbsa_flash_map1(PFlashCFI01 *flash, assert(QEMU_IS_ALIGNED(size, SBSA_FLASH_SECTOR_SIZE)); assert(size / SBSA_FLASH_SECTOR_SIZE <=3D UINT32_MAX); qdev_prop_set_uint32(dev, "num-blocks", size / SBSA_FLASH_SECTOR_SIZE); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 memory_region_add_subregion(sysmem, base, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 154cd24731..ca151435ae 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -948,7 +948,7 @@ static PFlashCFI01 *virt_flash_create1(VirtMachineState= *vms, * Create a single flash device. We use the same parameters as * the flash devices on the Versatile Express board. */ - DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); + DeviceState *dev =3D qdev_new(TYPE_PFLASH_CFI01); =20 qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE); qdev_prop_set_uint8(dev, "width", 4); @@ -980,7 +980,7 @@ static void virt_flash_map1(PFlashCFI01 *flash, assert(QEMU_IS_ALIGNED(size, VIRT_FLASH_SECTOR_SIZE)); assert(size / VIRT_FLASH_SECTOR_SIZE <=3D UINT32_MAX); qdev_prop_set_uint32(dev, "num-blocks", size / VIRT_FLASH_SECTOR_SIZE); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 memory_region_add_subregion(sysmem, base, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), diff --git a/hw/block/xen-block.c b/hw/block/xen-block.c index 570489d6d9..2827c90ac7 100644 --- a/hw/block/xen-block.c +++ b/hw/block/xen-block.c @@ -937,7 +937,7 @@ static void xen_block_device_create(XenBackendInstance = *backend, goto fail; } =20 - xendev =3D XEN_DEVICE(qdev_create(BUS(xenbus), type)); + xendev =3D XEN_DEVICE(qdev_new(type)); blockdev =3D XEN_BLOCK_DEVICE(xendev); =20 object_property_set_str(OBJECT(xendev), vdev, "vdev", &local_err); @@ -965,7 +965,7 @@ static void xen_block_device_create(XenBackendInstance = *backend, blockdev->iothread =3D iothread; blockdev->drive =3D drive; =20 - object_property_set_bool(OBJECT(xendev), true, "realized", &local_err); + qdev_realize_and_unref(DEVICE(xendev), BUS(xenbus), &local_err); if (local_err) { error_propagate_prepend(errp, local_err, "realization of device %s failed: ", diff --git a/hw/char/serial.c b/hw/char/serial.c index 7d74694587..a0cab38fb0 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1127,7 +1127,7 @@ SerialMM *serial_mm_init(MemoryRegion *address_space, qemu_irq irq, int baudbase, Chardev *chr, enum device_endian end) { - SerialMM *smm =3D SERIAL_MM(qdev_create(NULL, TYPE_SERIAL_MM)); + SerialMM *smm =3D SERIAL_MM(qdev_new(TYPE_SERIAL_MM)); MemoryRegion *mr; =20 qdev_prop_set_uint8(DEVICE(smm), "regshift", regshift); @@ -1135,7 +1135,7 @@ SerialMM *serial_mm_init(MemoryRegion *address_space, qdev_prop_set_chr(DEVICE(smm), "chardev", chr); qdev_set_legacy_instance_id(DEVICE(smm), base, 2); qdev_prop_set_uint8(DEVICE(smm), "endianness", end); - qdev_init_nofail(DEVICE(smm)); + qdev_realize_and_unref(DEVICE(smm), NULL, &error_fatal); =20 sysbus_connect_irq(SYS_BUS_DEVICE(smm), 0, irq); mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(smm), 0); diff --git a/hw/display/ati.c b/hw/display/ati.c index 1d9df92b96..7216f7e08f 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -933,10 +933,9 @@ static void ati_vga_realize(PCIDevice *dev, Error **er= rp) /* ddc, edid */ I2CBus *i2cbus =3D i2c_init_bus(DEVICE(s), "ati-vga.ddc"); bitbang_i2c_init(&s->bbi2c, i2cbus); - I2CSlave *i2cddc =3D I2C_SLAVE(qdev_create(BUS(i2cbus), TYPE_I2CDDC)); + I2CSlave *i2cddc =3D I2C_SLAVE(qdev_new(TYPE_I2CDDC)); i2c_set_slave_address(i2cddc, 0x50); - object_property_set_bool(OBJECT(i2cddc), true, "realized", - &error_abort); + qdev_realize_and_unref(DEVICE(i2cddc), BUS(i2cbus), &error_abort); =20 /* mmio register space */ memory_region_init_io(&s->mm, OBJECT(s), &ati_mm_ops, s, diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 7ff14fd474..3e62eca3de 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1831,10 +1831,9 @@ static void sm501_init(SM501State *s, DeviceState *d= ev, /* i2c */ s->i2c_bus =3D i2c_init_bus(dev, "sm501.i2c"); /* ddc */ - I2CDDCState *ddc =3D I2CDDC(qdev_create(BUS(s->i2c_bus), TYPE_I2CDDC)); + I2CDDCState *ddc =3D I2CDDC(qdev_new(TYPE_I2CDDC)); i2c_set_slave_address(I2C_SLAVE(ddc), 0x50); - object_property_set_bool(OBJECT(ddc), true, "realized", - &error_abort); + qdev_realize_and_unref(DEVICE(ddc), BUS(s->i2c_bus), &error_abort); =20 /* mmio */ memory_region_init(&s->mmio_region, OBJECT(dev), "sm501.mmio", MMIO_SI= ZE); diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index 5210412e55..6e9793584a 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -1252,7 +1252,7 @@ static void xlnx_dp_init(Object *obj) s->dpcd =3D DPCD(aux_create_slave(s->aux_bus, "dpcd")); object_property_add_child(OBJECT(s), "dpcd", OBJECT(s->dpcd)); =20 - s->edid =3D I2CDDC(qdev_create(BUS(aux_get_i2c_bus(s->aux_bus)), "i2c-= ddc")); + s->edid =3D I2CDDC(qdev_new("i2c-ddc")); i2c_set_slave_address(I2C_SLAVE(s->edid), 0x50); object_property_add_child(OBJECT(s), "edid", OBJECT(s->edid)); =20 @@ -1271,7 +1271,8 @@ static void xlnx_dp_realize(DeviceState *dev, Error *= *errp) qdev_init_nofail(DEVICE(s->dpcd)); aux_map_slave(AUX_SLAVE(s->dpcd), 0x0000); =20 - qdev_init_nofail(DEVICE(s->edid)); + qdev_realize_and_unref(DEVICE(s->edid), BUS(aux_get_i2c_bus(s->aux_bus= )), + &error_fatal); =20 s->console =3D graphic_console_init(dev, 0, &xlnx_dp_gfx_ops, s); surface =3D qemu_console_surface(s->console); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index f9d51479b1..b549d0bbfc 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1204,7 +1204,7 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *= gsi, * when the HPET wants to take over. Thus we have to disable the latte= r. */ if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) { - hpet =3D qdev_try_create(NULL, TYPE_HPET); + hpet =3D qdev_try_new(TYPE_HPET); if (hpet) { /* For pc-piix-*, hpet's intcap is always IRQ2. For pc-q35-1.7 * and earlier, use IRQ2 for compat. Otherwise, use IRQ16~23, @@ -1215,7 +1215,7 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *= gsi, if (!compat) { qdev_prop_set_uint32(hpet, HPET_INTCAP, hpet_irqs); } - qdev_init_nofail(hpet); + qdev_realize_and_unref(hpet, NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(hpet), 0, HPET_BASE); =20 for (i =3D 0; i < GSI_NUM_PINS; i++) { diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index b8d8ef59eb..2e414d1934 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -85,7 +85,7 @@ static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms, const char *name, const char *alias_prop_name) { - DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); + DeviceState *dev =3D qdev_new(TYPE_PFLASH_CFI01); =20 qdev_prop_set_uint64(dev, "sector-length", FLASH_SECTOR_SIZE); qdev_prop_set_uint8(dev, "width", 1); @@ -187,7 +187,7 @@ static void pc_system_flash_map(PCMachineState *pcms, total_size +=3D size; qdev_prop_set_uint32(DEVICE(system_flash), "num-blocks", size / FLASH_SECTOR_SIZE); - qdev_init_nofail(DEVICE(system_flash)); + qdev_realize_and_unref(DEVICE(system_flash), NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(system_flash), 0, 0x100000000ULL - total_size); =20 diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expand= er_bridge.c index 5da0d21061..3a395ab2f0 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -236,7 +236,7 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool= pcie, Error **errp) bus =3D pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCI= E_BUS); } else { bus =3D pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_P= XB_BUS); - bds =3D qdev_create(BUS(bus), "pci-bridge"); + bds =3D qdev_new("pci-bridge"); bds->id =3D dev_name; qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_= nr); qdev_prop_set_bit(bds, PCI_BRIDGE_DEV_PROP_SHPC, false); @@ -257,7 +257,7 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool= pcie, Error **errp) =20 qdev_realize_and_unref(ds, NULL, &error_fatal); if (bds) { - qdev_init_nofail(bds); + qdev_realize_and_unref(bds, &bus->qbus, &error_fatal); } =20 pci_word_test_and_set_mask(dev->config + PCI_STATUS, diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index e3b6f0b884..8562af3fe0 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -818,7 +818,7 @@ static void pnv_init(MachineState *machine) pnv->chips =3D g_new0(PnvChip *, pnv->num_chips); for (i =3D 0; i < pnv->num_chips; i++) { char chip_name[32]; - Object *chip =3D OBJECT(qdev_create(NULL, chip_typename)); + Object *chip =3D OBJECT(qdev_new(chip_typename)); =20 pnv->chips[i] =3D PNV_CHIP(chip); =20 @@ -850,7 +850,7 @@ static void pnv_init(MachineState *machine) object_property_set_link(chip, OBJECT(pnv), "xive-fabric", &error_abort); } - object_property_set_bool(chip, true, "realized", &error_fatal); + qdev_realize_and_unref(DEVICE(chip), NULL, &error_fatal); } g_free(chip_typename); =20 diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index fa88e9118c..4970a085ca 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -80,7 +80,7 @@ static PFlashCFI01 *virt_flash_create1(RISCVVirtState *s, * Create a single flash device. We use the same parameters as * the flash devices on the ARM virt board. */ - DeviceState *dev =3D qdev_create(NULL, TYPE_PFLASH_CFI01); + DeviceState *dev =3D qdev_new(TYPE_PFLASH_CFI01); =20 qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE); qdev_prop_set_uint8(dev, "width", 4); @@ -114,7 +114,7 @@ static void virt_flash_map1(PFlashCFI01 *flash, assert(QEMU_IS_ALIGNED(size, VIRT_FLASH_SECTOR_SIZE)); assert(size / VIRT_FLASH_SECTOR_SIZE <=3D UINT32_MAX); qdev_prop_set_uint32(dev, "num-blocks", size / VIRT_FLASH_SECTOR_SIZE); - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, NULL, &error_fatal); =20 memory_region_add_subregion(sysmem, base, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 7a4bfb7383..a13978bb37 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -824,7 +824,7 @@ static S390PCIBusDevice *s390_pci_device_new(S390pciSta= te *s, Error *local_err =3D NULL; DeviceState *dev; =20 - dev =3D qdev_try_create(BUS(s->bus), TYPE_S390_PCI_DEVICE); + dev =3D qdev_try_new(TYPE_S390_PCI_DEVICE); if (!dev) { error_setg(errp, "zPCI device could not be created"); return NULL; @@ -837,7 +837,7 @@ static S390PCIBusDevice *s390_pci_device_new(S390pciSta= te *s, "zPCI device could not be created: "); return NULL; } - object_property_set_bool(OBJECT(dev), true, "realized", &local_err); + qdev_realize_and_unref(dev, BUS(s->bus), &local_err); if (local_err) { object_unparent(OBJECT(dev)); error_propagate_prepend(errp, local_err, diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 52c0229574..b1d8f25dcc 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -213,15 +213,15 @@ static void leon3_generic_hw_init(MachineState *machi= ne) reset_info->sp =3D LEON3_RAM_OFFSET + ram_size; qemu_register_reset(main_cpu_reset, reset_info); =20 - ahb_pnp =3D GRLIB_AHB_PNP(qdev_create(NULL, TYPE_GRLIB_AHB_PNP)); - object_property_set_bool(OBJECT(ahb_pnp), true, "realized", &error_fat= al); + ahb_pnp =3D GRLIB_AHB_PNP(qdev_new(TYPE_GRLIB_AHB_PNP)); + qdev_realize_and_unref(DEVICE(ahb_pnp), NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(ahb_pnp), 0, LEON3_AHB_PNP_OFFSET); grlib_ahb_pnp_add_entry(ahb_pnp, 0, 0, GRLIB_VENDOR_GAISLER, GRLIB_LEON3_DEV, GRLIB_AHB_MASTER, GRLIB_CPU_AREA); =20 - apb_pnp =3D GRLIB_APB_PNP(qdev_create(NULL, TYPE_GRLIB_APB_PNP)); - object_property_set_bool(OBJECT(apb_pnp), true, "realized", &error_fat= al); + apb_pnp =3D GRLIB_APB_PNP(qdev_new(TYPE_GRLIB_APB_PNP)); + qdev_realize_and_unref(DEVICE(apb_pnp), NULL, &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(apb_pnp), 0, LEON3_APB_PNP_OFFSET); grlib_ahb_pnp_add_entry(ahb_pnp, LEON3_APB_PNP_OFFSET, 0xFFF, GRLIB_VENDOR_GAISLER, GRLIB_APBMST_DEV, diff --git a/hw/usb/bus.c b/hw/usb/bus.c index fa07df98a2..d28eff1b5c 100644 --- a/hw/usb/bus.c +++ b/hw/usb/bus.c @@ -326,21 +326,21 @@ static USBDevice *usb_try_create_simple(USBBus *bus, = const char *name, Error **errp) { Error *err =3D NULL; - USBDevice *dev; + DeviceState *dev; =20 - dev =3D USB_DEVICE(qdev_try_create(&bus->qbus, name)); + dev =3D qdev_try_new(name); if (!dev) { error_setg(errp, "Failed to create USB device '%s'", name); return NULL; } - object_property_set_bool(OBJECT(dev), true, "realized", &err); + qdev_realize_and_unref(dev, &bus->qbus, &err); if (err) { error_propagate_prepend(errp, err, "Failed to initialize USB device '%s': ", name); return NULL; } - return dev; + return USB_DEVICE(dev); } =20 USBDevice *usb_create_simple(USBBus *bus, const char *name) --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591723092; cv=none; d=zohomail.com; s=zohoarc; b=QiEB5welvGBt/tFhpE9HsEqeeENvOtDoyS66Jl57lSA3GkrNXRk9NpZyFwsF8qvs1fOriJAXeZe+fXBtQfoBILbpjGGf35uGhk6nxKkyCwanL80533ZZtGchF1N6aInJGW7XXnxFcCtCye0iZZ/JevaCPA8d42/OnXhbSCJgkQk= ARC-Message-Signature: i=1; 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Tue, 9 Jun 2020 16:39:38 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id BC8C96298C; Tue, 9 Jun 2020 16:39:37 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 8465F1138460; Tue, 9 Jun 2020 18:39:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720783; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ia3pHBL/m4nEhkJ0y3dfOhXho7FudacS/+oc2MjP3/M=; b=SEfplk9gNWfgpsDtr0nBVPzi+pehOPAng9UTvSNqH5XW1SOCO5LDMMXWKk640/VhJ444uZ mK07XMSDSSNVd/Movx0vQhz0TuupNWC/crKaq94KeGCccO6/3eY8nYX40VTEM7a+QJ65Y0 0K6kOOwohBp48pGf57kisVYxjV0Rhio= X-MC-Unique: uU4bSn3IOJ2KohNNQqg6ZQ-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 11/39] qdev: Convert uses of qdev_set_parent_bus() with Coccinelle Date: Tue, 9 Jun 2020 18:39:04 +0200 Message-Id: <20200609163932.1566209-12-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/08 23:42:34 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) In addition to the qdev_create() patterns converted so far, we have a qdev_set_parent_bus() pattern. Mostly when we embed a device in a parent device rather than allocating it on the heap. This pattern also puts devices in the dangerous "no QOM parent, but plugged into bus" state I explained in recent commit "qdev: New qdev_new(), qdev_realize(), etc." Apply same solution: convert to qdev_realize(). Coccinelle script: @@ expression dev, bus, errp; symbol true; @@ - qdev_set_parent_bus(DEVICE(dev), bus); ... - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize(DEVICE(dev), bus, errp); @ depends on !(file in "qdev-monitor.c") && !(file in "hw/core/qdev.c")@ expression dev, bus, errp; symbol true; @@ - qdev_set_parent_bus(dev, bus); ... - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize(dev, bus, errp); @@ expression dev, bus; symbol true; @@ - qdev_set_parent_bus(DEVICE(dev), bus); ... - qdev_init_nofail(DEVICE(dev)); + qdev_realize(DEVICE(dev), bus, &error_fatal); Unconverted uses of qdev_set_parent_bus() remain. They'll be converted later in this series. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- hw/display/virtio-gpu-pci.c | 3 +-- hw/display/virtio-vga.c | 3 +-- hw/i386/amd_iommu.c | 3 +-- hw/isa/piix4.c | 3 +-- hw/misc/macio/macio.c | 7 ++----- hw/pci-host/designware.c | 3 +-- hw/pci-host/gpex.c | 3 +-- hw/pci-host/pnv_phb3.c | 3 +-- hw/pci-host/pnv_phb4.c | 3 +-- hw/pci-host/q35.c | 3 +-- hw/pci-host/versatile.c | 3 +-- hw/pci-host/xilinx-pcie.c | 3 +-- hw/s390x/vhost-vsock-ccw.c | 3 +-- hw/s390x/virtio-ccw-9p.c | 3 +-- hw/s390x/virtio-ccw-balloon.c | 3 +-- hw/s390x/virtio-ccw-blk.c | 3 +-- hw/s390x/virtio-ccw-crypto.c | 3 +-- hw/s390x/virtio-ccw-gpu.c | 3 +-- hw/s390x/virtio-ccw-input.c | 3 +-- hw/s390x/virtio-ccw-net.c | 3 +-- hw/s390x/virtio-ccw-rng.c | 3 +-- hw/s390x/virtio-ccw-scsi.c | 6 ++---- hw/s390x/virtio-ccw-serial.c | 3 +-- hw/virtio/vhost-scsi-pci.c | 3 +-- hw/virtio/vhost-user-blk-pci.c | 3 +-- hw/virtio/vhost-user-fs-pci.c | 3 +-- hw/virtio/vhost-user-scsi-pci.c | 3 +-- hw/virtio/vhost-vsock-pci.c | 3 +-- hw/virtio/virtio-9p-pci.c | 3 +-- hw/virtio/virtio-balloon-pci.c | 3 +-- hw/virtio/virtio-blk-pci.c | 3 +-- hw/virtio/virtio-crypto-pci.c | 3 +-- hw/virtio/virtio-input-pci.c | 3 +-- hw/virtio/virtio-iommu-pci.c | 3 +-- hw/virtio/virtio-net-pci.c | 3 +-- hw/virtio/virtio-pmem-pci.c | 3 +-- hw/virtio/virtio-rng-pci.c | 3 +-- hw/virtio/virtio-scsi-pci.c | 3 +-- hw/virtio/virtio-serial-pci.c | 3 +-- hw/xen/xen-legacy-backend.c | 3 +-- 40 files changed, 42 insertions(+), 85 deletions(-) diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c index 3d152ff5c8..b532fe8b5f 100644 --- a/hw/display/virtio-gpu-pci.c +++ b/hw/display/virtio-gpu-pci.c @@ -33,9 +33,8 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *v= pci_dev, Error **errp) int i; Error *local_error =3D NULL; =20 - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); virtio_pci_force_virtio_1(vpci_dev); - object_property_set_bool(OBJECT(vdev), true, "realized", &local_error); + qdev_realize(vdev, BUS(&vpci_dev->bus), &local_error); =20 if (local_error) { error_propagate(errp, local_error); diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index 95757a6619..68a062ece6 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -137,9 +137,8 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpc= i_dev, Error **errp) vpci_dev->common.offset =3D offset; =20 /* init virtio bits */ - qdev_set_parent_bus(DEVICE(g), BUS(&vpci_dev->bus)); virtio_pci_force_virtio_1(vpci_dev); - object_property_set_bool(OBJECT(g), true, "realized", &err); + qdev_realize(DEVICE(g), BUS(&vpci_dev->bus), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index fd75cae024..021fef0f45 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1548,8 +1548,7 @@ static void amdvi_realize(DeviceState *dev, Error **e= rrp) =20 /* This device should take care of IOMMU PCI properties */ x86_iommu->type =3D TYPE_AMD; - qdev_set_parent_bus(DEVICE(&s->pci), &bus->qbus); - object_property_set_bool(OBJECT(&s->pci), true, "realized", errp); + qdev_realize(DEVICE(&s->pci), &bus->qbus, errp); ret =3D pci_add_capability(&s->pci.dev, AMDVI_CAPAB_ID_SEC, 0, AMDVI_CAPAB_SIZE, errp); if (ret < 0) { diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 9a10fb9b3c..f634bcb2d1 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -182,9 +182,8 @@ static void piix4_realize(PCIDevice *dev, Error **errp) i8257_dma_init(isa_bus, 0); =20 /* RTC */ - qdev_set_parent_bus(DEVICE(&s->rtc), BUS(isa_bus)); qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000); - object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err); + qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index 53a9fd5696..216bdc69c0 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -356,9 +356,7 @@ static void macio_newworld_realize(PCIDevice *d, Error = **errp) object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpi= o", &error_abort); qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb); - qdev_set_parent_bus(DEVICE(&s->pmu), BUS(&s->macio_bus)); - - object_property_set_bool(OBJECT(&s->pmu), true, "realized", &err); + qdev_realize(DEVICE(&s->pmu), BUS(&s->macio_bus), &err); if (err) { error_propagate(errp, err); return; @@ -374,11 +372,10 @@ static void macio_newworld_realize(PCIDevice *d, Erro= r **errp) /* CUDA */ object_initialize_child(OBJECT(s), "cuda", &s->cuda, sizeof(s->cud= a), TYPE_CUDA, &error_abort, NULL); - qdev_set_parent_bus(DEVICE(&s->cuda), BUS(&s->macio_bus)); qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", s->frequency); =20 - object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err); + qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index dd245516dd..2e97d6b17f 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -688,8 +688,7 @@ static void designware_pcie_host_realize(DeviceState *d= ev, Error **errp) "pcie-bus-address-space"); pci_setup_iommu(pci->bus, designware_pcie_host_set_iommu, s); =20 - qdev_set_parent_bus(DEVICE(&s->root), BUS(pci->bus)); - qdev_init_nofail(DEVICE(&s->root)); + qdev_realize(DEVICE(&s->root), BUS(pci->bus), &error_fatal); } =20 static const VMStateDescription vmstate_designware_pcie_host =3D { diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c index 0ca604dc62..3dfb3bf599 100644 --- a/hw/pci-host/gpex.c +++ b/hw/pci-host/gpex.c @@ -98,9 +98,8 @@ static void gpex_host_realize(DeviceState *dev, Error **e= rrp) pci_swizzle_map_irq_fn, s, &s->io_mmi= o, &s->io_ioport, 0, 4, TYPE_PCIE_BUS); =20 - qdev_set_parent_bus(DEVICE(&s->gpex_root), BUS(pci->bus)); pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq); - qdev_init_nofail(DEVICE(&s->gpex_root)); + qdev_realize(DEVICE(&s->gpex_root), BUS(pci->bus), &error_fatal); } =20 static const char *gpex_host_root_bus_path(PCIHostState *host_bridge, diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 74618fadf0..8dcfe4a2fd 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -1064,8 +1064,7 @@ static void pnv_phb3_realize(DeviceState *dev, Error = **errp) /* Add a single Root port */ qdev_prop_set_uint8(DEVICE(&phb->root), "chassis", phb->chip_id); qdev_prop_set_uint16(DEVICE(&phb->root), "slot", phb->phb_id); - qdev_set_parent_bus(DEVICE(&phb->root), BUS(pci->bus)); - qdev_init_nofail(DEVICE(&phb->root)); + qdev_realize(DEVICE(&phb->root), BUS(pci->bus), &error_fatal); } =20 void pnv_phb3_update_regions(PnvPHB3 *phb) diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 23cf093928..e30ae9ad5b 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1210,8 +1210,7 @@ static void pnv_phb4_realize(DeviceState *dev, Error = **errp) /* Add a single Root port */ qdev_prop_set_uint8(DEVICE(&phb->root), "chassis", phb->chip_id); qdev_prop_set_uint16(DEVICE(&phb->root), "slot", phb->phb_id); - qdev_set_parent_bus(DEVICE(&phb->root), BUS(pci->bus)); - qdev_init_nofail(DEVICE(&phb->root)); + qdev_realize(DEVICE(&phb->root), BUS(pci->bus), &error_fatal); =20 /* Setup XIVE Source */ if (phb->big_phb) { diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 352aeecfa7..8d526457f4 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -64,8 +64,7 @@ static void q35_host_realize(DeviceState *dev, Error **er= rp) s->mch.address_space_io, 0, TYPE_PCIE_BUS); PC_MACHINE(qdev_get_machine())->bus =3D pci->bus; - qdev_set_parent_bus(DEVICE(&s->mch), BUS(pci->bus)); - qdev_init_nofail(DEVICE(&s->mch)); + qdev_realize(DEVICE(&s->mch), BUS(pci->bus), &error_fatal); } =20 static const char *q35_host_root_bus_path(PCIHostState *host_bridge, diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index 28817dbeec..753a685d9f 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -408,7 +408,6 @@ static void pci_vpb_realize(DeviceState *dev, Error **e= rrp) h->bus =3D &s->pci_bus; =20 object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_VERSATILE_PCI_= HOST); - qdev_set_parent_bus(DEVICE(&s->pci_dev), BUS(&s->pci_bus)); =20 for (i =3D 0; i < 4; i++) { sysbus_init_irq(sbd, &s->irq[i]); @@ -458,7 +457,7 @@ static void pci_vpb_realize(DeviceState *dev, Error **e= rrp) } =20 /* TODO Remove once realize propagates to child devices. */ - object_property_set_bool(OBJECT(&s->pci_dev), true, "realized", errp); + qdev_realize(DEVICE(&s->pci_dev), BUS(&s->pci_bus), errp); } =20 static void versatile_pci_host_realize(PCIDevice *d, Error **errp) diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c index e06f2b59cf..e4fc8abb6a 100644 --- a/hw/pci-host/xilinx-pcie.c +++ b/hw/pci-host/xilinx-pcie.c @@ -137,8 +137,7 @@ static void xilinx_pcie_host_realize(DeviceState *dev, = Error **errp) pci_swizzle_map_irq_fn, s, &s->mmio, &s->io, 0, 4, TYPE_PCIE_BUS); =20 - qdev_set_parent_bus(DEVICE(&s->root), BUS(pci->bus)); - qdev_init_nofail(DEVICE(&s->root)); + qdev_realize(DEVICE(&s->root), BUS(pci->bus), &error_fatal); } =20 static const char *xilinx_pcie_host_root_bus_path(PCIHostState *host_bridg= e, diff --git a/hw/s390x/vhost-vsock-ccw.c b/hw/s390x/vhost-vsock-ccw.c index 12dee15e11..0822ecca89 100644 --- a/hw/s390x/vhost-vsock-ccw.c +++ b/hw/s390x/vhost-vsock-ccw.c @@ -24,8 +24,7 @@ static void vhost_vsock_ccw_realize(VirtioCcwDevice *ccw_= dev, Error **errp) VHostVSockCCWState *dev =3D VHOST_VSOCK_CCW(ccw_dev); DeviceState *vdev =3D DEVICE(&dev->vdev); =20 - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } =20 static void vhost_vsock_ccw_class_init(ObjectClass *klass, void *data) diff --git a/hw/s390x/virtio-ccw-9p.c b/hw/s390x/virtio-ccw-9p.c index 08e1d5d416..88c8884fc5 100644 --- a/hw/s390x/virtio-ccw-9p.c +++ b/hw/s390x/virtio-ccw-9p.c @@ -21,8 +21,7 @@ static void virtio_ccw_9p_realize(VirtioCcwDevice *ccw_de= v, Error **errp) V9fsCCWState *dev =3D VIRTIO_9P_CCW(ccw_dev); DeviceState *vdev =3D DEVICE(&dev->vdev); =20 - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } =20 static void virtio_ccw_9p_instance_init(Object *obj) diff --git a/hw/s390x/virtio-ccw-balloon.c b/hw/s390x/virtio-ccw-balloon.c index ef3308ecab..4c7631a433 100644 --- a/hw/s390x/virtio-ccw-balloon.c +++ b/hw/s390x/virtio-ccw-balloon.c @@ -21,8 +21,7 @@ static void virtio_ccw_balloon_realize(VirtioCcwDevice *c= cw_dev, Error **errp) VirtIOBalloonCcw *dev =3D VIRTIO_BALLOON_CCW(ccw_dev); DeviceState *vdev =3D DEVICE(&dev->vdev); =20 - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } =20 static void virtio_ccw_balloon_instance_init(Object *obj) diff --git a/hw/s390x/virtio-ccw-blk.c b/hw/s390x/virtio-ccw-blk.c index 7287932b7e..2294ce1ce4 100644 --- a/hw/s390x/virtio-ccw-blk.c +++ b/hw/s390x/virtio-ccw-blk.c @@ -21,8 +21,7 @@ static void virtio_ccw_blk_realize(VirtioCcwDevice *ccw_d= ev, Error **errp) VirtIOBlkCcw *dev =3D VIRTIO_BLK_CCW(ccw_dev); DeviceState *vdev =3D DEVICE(&dev->vdev); =20 - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } =20 static void virtio_ccw_blk_instance_init(Object *obj) diff --git a/hw/s390x/virtio-ccw-crypto.c b/hw/s390x/virtio-ccw-crypto.c index 1a2690cf9e..ca6753bff3 100644 --- a/hw/s390x/virtio-ccw-crypto.c +++ b/hw/s390x/virtio-ccw-crypto.c @@ -21,8 +21,7 @@ static void virtio_ccw_crypto_realize(VirtioCcwDevice *cc= w_dev, Error **errp) DeviceState *vdev =3D DEVICE(&dev->vdev); Error *err =3D NULL; =20 - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", &err); + qdev_realize(vdev, BUS(&ccw_dev->bus), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/s390x/virtio-ccw-gpu.c b/hw/s390x/virtio-ccw-gpu.c index f69e3ff5a0..c301e2586b 100644 --- a/hw/s390x/virtio-ccw-gpu.c +++ b/hw/s390x/virtio-ccw-gpu.c @@ -20,8 +20,7 @@ static void virtio_ccw_gpu_realize(VirtioCcwDevice *ccw_d= ev, Error **errp) VirtIOGPUCcw *dev =3D VIRTIO_GPU_CCW(ccw_dev); DeviceState *vdev =3D DEVICE(&dev->vdev); =20 - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } =20 static void virtio_ccw_gpu_instance_init(Object *obj) diff --git a/hw/s390x/virtio-ccw-input.c b/hw/s390x/virtio-ccw-input.c index b257dfd467..5601e25dee 100644 --- a/hw/s390x/virtio-ccw-input.c +++ b/hw/s390x/virtio-ccw-input.c @@ -20,8 +20,7 @@ static void virtio_ccw_input_realize(VirtioCcwDevice *ccw= _dev, Error **errp) VirtIOInputCcw *dev =3D VIRTIO_INPUT_CCW(ccw_dev); DeviceState *vdev =3D DEVICE(&dev->vdev); =20 - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } =20 static Property virtio_ccw_input_properties[] =3D { diff --git a/hw/s390x/virtio-ccw-net.c b/hw/s390x/virtio-ccw-net.c index 26c4d873bf..3860d4e6ea 100644 --- a/hw/s390x/virtio-ccw-net.c +++ b/hw/s390x/virtio-ccw-net.c @@ -24,8 +24,7 @@ static void virtio_ccw_net_realize(VirtioCcwDevice *ccw_d= ev, Error **errp) =20 virtio_net_set_netclient_name(&dev->vdev, qdev->id, object_get_typename(OBJECT(qdev))); - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } =20 static void virtio_ccw_net_instance_init(Object *obj) diff --git a/hw/s390x/virtio-ccw-rng.c b/hw/s390x/virtio-ccw-rng.c index d575e30cc6..4077160f49 100644 --- a/hw/s390x/virtio-ccw-rng.c +++ b/hw/s390x/virtio-ccw-rng.c @@ -22,8 +22,7 @@ static void virtio_ccw_rng_realize(VirtioCcwDevice *ccw_d= ev, Error **errp) DeviceState *vdev =3D DEVICE(&dev->vdev); Error *err =3D NULL; =20 - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", &err); + qdev_realize(vdev, BUS(&ccw_dev->bus), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/s390x/virtio-ccw-scsi.c b/hw/s390x/virtio-ccw-scsi.c index 3cb3ad669d..6e4beef700 100644 --- a/hw/s390x/virtio-ccw-scsi.c +++ b/hw/s390x/virtio-ccw-scsi.c @@ -33,8 +33,7 @@ static void virtio_ccw_scsi_realize(VirtioCcwDevice *ccw_= dev, Error **errp) g_free(bus_name); } =20 - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } =20 static void virtio_ccw_scsi_instance_init(Object *obj) @@ -78,8 +77,7 @@ static void vhost_ccw_scsi_realize(VirtioCcwDevice *ccw_d= ev, Error **errp) VHostSCSICcw *dev =3D VHOST_SCSI_CCW(ccw_dev); DeviceState *vdev =3D DEVICE(&dev->vdev); =20 - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } =20 static void vhost_ccw_scsi_instance_init(Object *obj) diff --git a/hw/s390x/virtio-ccw-serial.c b/hw/s390x/virtio-ccw-serial.c index 1764db2e70..61958228d1 100644 --- a/hw/s390x/virtio-ccw-serial.c +++ b/hw/s390x/virtio-ccw-serial.c @@ -33,8 +33,7 @@ static void virtio_ccw_serial_realize(VirtioCcwDevice *cc= w_dev, Error **errp) g_free(bus_name); } =20 - qdev_set_parent_bus(vdev, BUS(&ccw_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&ccw_dev->bus), errp); } =20 =20 diff --git a/hw/virtio/vhost-scsi-pci.c b/hw/virtio/vhost-scsi-pci.c index 5da6bb6449..095af23f3f 100644 --- a/hw/virtio/vhost-scsi-pci.c +++ b/hw/virtio/vhost-scsi-pci.c @@ -53,8 +53,7 @@ static void vhost_scsi_pci_realize(VirtIOPCIProxy *vpci_d= ev, Error **errp) vpci_dev->nvectors =3D vs->conf.num_queues + 3; } =20 - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } =20 static void vhost_scsi_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/vhost-user-blk-pci.c b/hw/virtio/vhost-user-blk-pci.c index 58d7c31735..4f5d5cbf44 100644 --- a/hw/virtio/vhost-user-blk-pci.c +++ b/hw/virtio/vhost-user-blk-pci.c @@ -58,8 +58,7 @@ static void vhost_user_blk_pci_realize(VirtIOPCIProxy *vp= ci_dev, Error **errp) vpci_dev->nvectors =3D dev->vdev.num_queues + 1; } =20 - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } =20 static void vhost_user_blk_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/vhost-user-fs-pci.c b/hw/virtio/vhost-user-fs-pci.c index ae36f1172d..e11c889d82 100644 --- a/hw/virtio/vhost-user-fs-pci.c +++ b/hw/virtio/vhost-user-fs-pci.c @@ -44,8 +44,7 @@ static void vhost_user_fs_pci_realize(VirtIOPCIProxy *vpc= i_dev, Error **errp) vpci_dev->nvectors =3D dev->vdev.conf.num_request_queues + 2; } =20 - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } =20 static void vhost_user_fs_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/vhost-user-scsi-pci.c b/hw/virtio/vhost-user-scsi-pc= i.c index 6f3375fe55..4705cd54e8 100644 --- a/hw/virtio/vhost-user-scsi-pci.c +++ b/hw/virtio/vhost-user-scsi-pci.c @@ -59,8 +59,7 @@ static void vhost_user_scsi_pci_realize(VirtIOPCIProxy *v= pci_dev, Error **errp) vpci_dev->nvectors =3D vs->conf.num_queues + 3; } =20 - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } =20 static void vhost_user_scsi_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/vhost-vsock-pci.c b/hw/virtio/vhost-vsock-pci.c index 01effe3d52..a815278e69 100644 --- a/hw/virtio/vhost-vsock-pci.c +++ b/hw/virtio/vhost-vsock-pci.c @@ -44,8 +44,7 @@ static void vhost_vsock_pci_realize(VirtIOPCIProxy *vpci_= dev, Error **errp) VHostVSockPCI *dev =3D VHOST_VSOCK_PCI(vpci_dev); DeviceState *vdev =3D DEVICE(&dev->vdev); =20 - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } =20 static void vhost_vsock_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-9p-pci.c b/hw/virtio/virtio-9p-pci.c index 6507ce340b..cbcb062faa 100644 --- a/hw/virtio/virtio-9p-pci.c +++ b/hw/virtio/virtio-9p-pci.c @@ -38,8 +38,7 @@ static void virtio_9p_pci_realize(VirtIOPCIProxy *vpci_de= v, Error **errp) V9fsPCIState *dev =3D VIRTIO_9P_PCI(vpci_dev); DeviceState *vdev =3D DEVICE(&dev->vdev); =20 - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } =20 static Property virtio_9p_pci_properties[] =3D { diff --git a/hw/virtio/virtio-balloon-pci.c b/hw/virtio/virtio-balloon-pci.c index cc25df0a3d..5adc4e5819 100644 --- a/hw/virtio/virtio-balloon-pci.c +++ b/hw/virtio/virtio-balloon-pci.c @@ -48,8 +48,7 @@ static void virtio_balloon_pci_realize(VirtIOPCIProxy *vp= ci_dev, Error **errp) vpci_dev->class_code =3D PCI_CLASS_OTHERS; } =20 - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } =20 static void virtio_balloon_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-blk-pci.c b/hw/virtio/virtio-blk-pci.c index 28838fa958..849cc7dfd8 100644 --- a/hw/virtio/virtio-blk-pci.c +++ b/hw/virtio/virtio-blk-pci.c @@ -55,8 +55,7 @@ static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_d= ev, Error **errp) vpci_dev->nvectors =3D dev->vdev.conf.num_queues + 1; } =20 - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } =20 static void virtio_blk_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-crypto-pci.c b/hw/virtio/virtio-crypto-pci.c index 0bebe0149d..72be531c95 100644 --- a/hw/virtio/virtio-crypto-pci.c +++ b/hw/virtio/virtio-crypto-pci.c @@ -53,9 +53,8 @@ static void virtio_crypto_pci_realize(VirtIOPCIProxy *vpc= i_dev, Error **errp) return; } =20 - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); virtio_pci_force_virtio_1(vpci_dev); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); object_property_set_link(OBJECT(vcrypto), OBJECT(vcrypto->vdev.conf.cryptodev), "cryptodev", NULL); diff --git a/hw/virtio/virtio-input-pci.c b/hw/virtio/virtio-input-pci.c index 5a965408df..74651a42ea 100644 --- a/hw/virtio/virtio-input-pci.c +++ b/hw/virtio/virtio-input-pci.c @@ -49,9 +49,8 @@ static void virtio_input_pci_realize(VirtIOPCIProxy *vpci= _dev, Error **errp) VirtIOInputPCI *vinput =3D VIRTIO_INPUT_PCI(vpci_dev); DeviceState *vdev =3D DEVICE(&vinput->vdev); =20 - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); virtio_pci_force_virtio_1(vpci_dev); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } =20 static void virtio_input_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-iommu-pci.c b/hw/virtio/virtio-iommu-pci.c index 3dfbf55b47..632533abaf 100644 --- a/hw/virtio/virtio-iommu-pci.c +++ b/hw/virtio/virtio-iommu-pci.c @@ -54,11 +54,10 @@ static void virtio_iommu_pci_realize(VirtIOPCIProxy *vp= ci_dev, Error **errp) "-no-acpi\n"); return; } - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); object_property_set_link(OBJECT(dev), OBJECT(pci_get_bus(&vpci_dev->pci_dev)), "primary-bus", errp); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } =20 static void virtio_iommu_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-net-pci.c b/hw/virtio/virtio-net-pci.c index ea43040f7b..489b5dbad6 100644 --- a/hw/virtio/virtio-net-pci.c +++ b/hw/virtio/virtio-net-pci.c @@ -52,8 +52,7 @@ static void virtio_net_pci_realize(VirtIOPCIProxy *vpci_d= ev, Error **errp) =20 virtio_net_set_netclient_name(&dev->vdev, qdev->id, object_get_typename(OBJECT(qdev))); - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } =20 static void virtio_net_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-pmem-pci.c b/hw/virtio/virtio-pmem-pci.c index fe2af00fa1..11d0c8ebc6 100644 --- a/hw/virtio/virtio-pmem-pci.c +++ b/hw/virtio/virtio-pmem-pci.c @@ -22,8 +22,7 @@ static void virtio_pmem_pci_realize(VirtIOPCIProxy *vpci_= dev, Error **errp) VirtIOPMEMPCI *pmem_pci =3D VIRTIO_PMEM_PCI(vpci_dev); DeviceState *vdev =3D DEVICE(&pmem_pci->vdev); =20 - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } =20 static void virtio_pmem_pci_set_addr(MemoryDeviceState *md, uint64_t addr, diff --git a/hw/virtio/virtio-rng-pci.c b/hw/virtio/virtio-rng-pci.c index 8aaf54b781..cf1afb47a6 100644 --- a/hw/virtio/virtio-rng-pci.c +++ b/hw/virtio/virtio-rng-pci.c @@ -36,8 +36,7 @@ static void virtio_rng_pci_realize(VirtIOPCIProxy *vpci_d= ev, Error **errp) DeviceState *vdev =3D DEVICE(&vrng->vdev); Error *err =3D NULL; =20 - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", &err); + qdev_realize(vdev, BUS(&vpci_dev->bus), &err); if (err) { error_propagate(errp, err); return; diff --git a/hw/virtio/virtio-scsi-pci.c b/hw/virtio/virtio-scsi-pci.c index e82e7e5680..c23a134202 100644 --- a/hw/virtio/virtio-scsi-pci.c +++ b/hw/virtio/virtio-scsi-pci.c @@ -64,8 +64,7 @@ static void virtio_scsi_pci_realize(VirtIOPCIProxy *vpci_= dev, Error **errp) g_free(bus_name); } =20 - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } =20 static void virtio_scsi_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-serial-pci.c b/hw/virtio/virtio-serial-pci.c index 22ab4d8562..95d25d54da 100644 --- a/hw/virtio/virtio-serial-pci.c +++ b/hw/virtio/virtio-serial-pci.c @@ -65,8 +65,7 @@ static void virtio_serial_pci_realize(VirtIOPCIProxy *vpc= i_dev, Error **errp) g_free(bus_name); } =20 - qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); - object_property_set_bool(OBJECT(vdev), true, "realized", errp); + qdev_realize(vdev, BUS(&vpci_dev->bus), errp); } =20 static Property virtio_serial_pci_properties[] =3D { diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c index 1c25373852..ef7c832e2e 100644 --- a/hw/xen/xen-legacy-backend.c +++ b/hw/xen/xen-legacy-backend.c @@ -278,9 +278,8 @@ static struct XenLegacyDevice *xen_be_get_xendev(const = char *type, int dom, xendev =3D g_malloc0(ops->size); object_initialize(&xendev->qdev, ops->size, TYPE_XENBACKEND); OBJECT(xendev)->free =3D g_free; - qdev_set_parent_bus(DEVICE(xendev), xen_sysbus); qdev_set_id(DEVICE(xendev), g_strdup_printf("xen-%s-%d", type, dev)); - qdev_init_nofail(DEVICE(xendev)); + qdev_realize(DEVICE(xendev), xen_sysbus, &error_fatal); object_unref(OBJECT(xendev)); =20 xendev->type =3D type; --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591721951; cv=none; d=zohomail.com; s=zohoarc; b=VHzYfg3cZHBALXqJ4rUIU1yqrgtIr9A36n/q3byODZgXstKITRbfZ9Q+pf1m+kIBkHEcPpL7HCnV4kEqqHwfrbpSCWwQhJmb2N1vlPitWSJgXveb7exvVgOJK4lsUSVjbAXqb6mbCMPUqCCJoKAEMFsXsut/H4qHBCSYCDE+6CY= ARC-Message-Signature: i=1; a=rsa-sha256; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/08 23:42:34 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Same transformation as in the previous commit. Manual, because convincing Coccinelle to transform these cases is somewhere between not worthwhile and infeasible (at least for me). Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- hw/pci-host/prep.c | 3 +-- hw/ppc/pnv.c | 6 ++---- hw/s390x/sclp.c | 10 ++++------ 3 files changed, 7 insertions(+), 12 deletions(-) diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index c821ef889d..42c7e63a60 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -268,7 +268,7 @@ static void raven_pcihost_realizefn(DeviceState *d, Err= or **errp) memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->pci_int= ack); =20 /* TODO Remove once realize propagates to child devices. */ - object_property_set_bool(OBJECT(&s->pci_dev), true, "realized", errp); + qdev_realize(DEVICE(&s->pci_dev), BUS(&s->pci_bus), errp); } =20 static void raven_pcihost_initfn(Object *obj) @@ -308,7 +308,6 @@ static void raven_pcihost_initfn(Object *obj) =20 object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_RAVEN_PCI_DEVI= CE); pci_dev =3D DEVICE(&s->pci_dev); - qdev_set_parent_bus(pci_dev, BUS(&s->pci_bus)); object_property_set_int(OBJECT(&s->pci_dev), PCI_DEVFN(0, 0), "addr", NULL); qdev_prop_set_bit(pci_dev, "multifunction", false); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 8562af3fe0..e0588285a2 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1212,12 +1212,11 @@ static void pnv_chip_power8_realize(DeviceState *de= v, Error **errp) object_property_set_int(OBJECT(phb), i, "index", &error_fatal); object_property_set_int(OBJECT(phb), chip->chip_id, "chip-id", &error_fatal); - object_property_set_bool(OBJECT(phb), true, "realized", &local_err= ); + qdev_realize(DEVICE(phb), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; } - qdev_set_parent_bus(DEVICE(phb), sysbus_get_default()); =20 /* Populate the XSCOM address space. */ pnv_xscom_add_subregion(chip, @@ -1422,12 +1421,11 @@ static void pnv_chip_power9_phb_realize(PnvChip *ch= ip, Error **errp) object_property_set_int(obj, PNV_PHB4_DEVICE_ID, "device-id", &error_fatal); object_property_set_link(obj, OBJECT(stack), "stack", &error_a= bort); - object_property_set_bool(obj, true, "realized", &local_err); + qdev_realize(DEVICE(obj), NULL, &local_err); if (local_err) { error_propagate(errp, local_err); return; } - qdev_set_parent_bus(DEVICE(obj), sysbus_get_default()); =20 /* Populate the XSCOM address space. */ pnv_xscom_add_subregion(chip, diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c index 20aca30ac4..40e27a8cb4 100644 --- a/hw/s390x/sclp.c +++ b/hw/s390x/sclp.c @@ -333,17 +333,15 @@ static void sclp_realize(DeviceState *dev, Error **er= rp) uint64_t hw_limit; int ret; =20 - object_property_set_bool(OBJECT(sclp->event_facility), true, "realized= ", - &err); - if (err) { - goto out; - } /* * qdev_device_add searches the sysbus for TYPE_SCLP_EVENTS_BUS. As lo= ng * as we can't find a fitting bus via the qom tree, we have to add the * event facility to the sysbus, so e.g. a sclp console can be created. */ - qdev_set_parent_bus(DEVICE(sclp->event_facility), sysbus_get_default()= ); + qdev_realize(DEVICE(sclp->event_facility), NULL, &err); + if (err) { + goto out; + } =20 ret =3D s390_set_memory_limit(machine->maxram_size, &hw_limit); if (ret =3D=3D -E2BIG) { --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591722442; cv=none; d=zohomail.com; s=zohoarc; b=ksHWnIVBlGu3G01305h4cEygt7kPSU1b9E++xPvujWWVY3skApx3ih8dcpk4aFGz3BBaiU3Hss0ihNMhQPbBt/Jl2OCVaaoPtKjCKqlDp/sKbkTxvc78iEFCUwtsXT3Djckw2AeMF6Z9Uuic/gvM/BOPUNCMMM5b2uGRhQDi2ms= ARC-Message-Signature: i=1; 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Tue, 9 Jun 2020 16:39:40 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id CDAD589285; Tue, 9 Jun 2020 16:39:37 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 972521138462; Tue, 9 Jun 2020 18:39:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720783; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=okxGBk8PlN7HrILM599B1hF2I8fEO6HkadHoEsxHfC8=; b=GFOts8i9QSc4KnJWdvDlbCaB17k6olCnIkRQm6Xpts8EcYb6G7Ru5UrqnvieWmIhqJNehg DoB7uQVFA7LTDJ/PN6Vu/K2EY7D0Q4m90BWMmeQV8BwAI7Otfqlnn+qruh/zltLsBhWb6R 8YBWBQCQkGsI4Kv5wRCALtiK+6+fV6c= X-MC-Unique: uNKSXDJ5OP-_vchGJP9evA-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 13/39] pci: New pci_new(), pci_realize_and_unref() etc. Date: Tue, 9 Jun 2020 18:39:06 +0200 Message-Id: <20200609163932.1566209-14-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 02:41:53 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" I'm converting from qdev_create()/qdev_init_nofail() to qdev_new()/qdev_realize_and_unref(); recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. PCI devices use qdev_create() through pci_create() and pci_create_multifunction(). Provide pci_new(), pci_new_multifunction(), and pci_realize_and_unref() for converting PCI devices. Cc: Michael S. Tsirkin Cc: Marcel Apfelbaum Signed-off-by: Markus Armbruster Reviewed-by: Paolo Bonzini --- include/hw/pci/pci.h | 5 +++++ hw/pci/pci.c | 21 +++++++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index cfedf5a995..66f8ba519b 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -712,6 +712,11 @@ pci_get_quad_by_mask(uint8_t *config, uint64_t mask) return (val & mask) >> ctz32(mask); } =20 +PCIDevice *pci_new_multifunction(int devfn, bool multifunction, + const char *name); +PCIDevice *pci_new(int devfn, const char *name); +bool pci_realize_and_unref(PCIDevice *dev, PCIBus *bus, Error **errp); + PCIDevice *pci_create_multifunction(PCIBus *bus, int devfn, bool multifunc= tion, const char *name); PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn, diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 6947c741c3..92f3f0f134 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2147,6 +2147,27 @@ static void pci_qdev_realize(DeviceState *qdev, Erro= r **errp) } } =20 +PCIDevice *pci_new_multifunction(int devfn, bool multifunction, + const char *name) +{ + DeviceState *dev; + + dev =3D qdev_new(name); + qdev_prop_set_int32(dev, "addr", devfn); + qdev_prop_set_bit(dev, "multifunction", multifunction); + return PCI_DEVICE(dev); +} + +PCIDevice *pci_new(int devfn, const char *name) +{ + return pci_new_multifunction(devfn, false, name); +} + +bool pci_realize_and_unref(PCIDevice *dev, PCIBus *bus, Error **errp) +{ + return qdev_realize_and_unref(&dev->qdev, &bus->qbus, errp); +} + PCIDevice *pci_create_multifunction(PCIBus *bus, int devfn, bool multifunc= tion, const char *name) { --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591721473; cv=none; d=zohomail.com; s=zohoarc; b=QS2DeaOV3A1kyKsJ9y8xsRIQkWF3Tp0Hc5kEq4ofKFHiPwx4Hzn00Jv/STC2zsgNIHKHOzLe/1tQix0YKIaBn9s14FCEVbH2ba23rn7WlczGyxYk4GAjBqj19vkOxif5dI028o1riA4NXSd6h9Dx+PtbdF+bXCeo+xyraPlJjGA= ARC-Message-Signature: i=1; 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Tue, 9 Jun 2020 16:39:38 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D1C3F89290; Tue, 9 Jun 2020 16:39:37 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id A134B1138463; Tue, 9 Jun 2020 18:39:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720780; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=M6WeoxnivIxQ9XuQJlRGjsrwhnGrfJG3aBPYwXMTlso=; b=FzIcVGouJyOGJs608HeU6iceUblp+p6pWBWTaieeC/fr09NKn5kimw35HQ6Oe8h8eoe8ZU M37iXxldeU9xKpxiwnqSXo/Xmc9+LnoyVTgi77ON+qxnwedxRIBbXVuQnWjWxwFjP89JDN uZGN8Xc9LlbZvNzrHeJYwrY2yr41ZpA= X-MC-Unique: -A7ZMqWSO1SRKxrES_oY4Q-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 14/39] hw/ppc: Eliminate two superfluous QOM casts Date: Tue, 9 Jun 2020 18:39:07 +0200 Message-Id: <20200609163932.1566209-15-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/08 23:42:34 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- hw/ppc/mac_newworld.c | 4 ++-- hw/ppc/mac_oldworld.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 69281d7834..2d069dcc59 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -122,7 +122,7 @@ static void ppc_core99_init(MachineState *machine) long kernel_size, initrd_size; UNINHostState *uninorth_pci; PCIBus *pci_bus; - NewWorldMacIOState *macio; + PCIDevice *macio; bool has_pmu, has_adb; MACIOIDEState *macio_ide; BusState *adb_bus; @@ -375,7 +375,7 @@ static void ppc_core99_init(MachineState *machine) pci_bus =3D PCI_HOST_BRIDGE(uninorth_pci)->bus; =20 /* MacIO */ - macio =3D NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO)); + macio =3D pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO); dev =3D DEVICE(macio); qdev_prop_set_uint64(dev, "frequency", tbfreq); qdev_prop_set_bit(dev, "has-pmu", has_pmu); diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index cfc2eae1d9..f73ec5f3a9 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -94,7 +94,7 @@ static void ppc_heathrow_init(MachineState *machine) uint32_t kernel_base, initrd_base, cmdline_base =3D 0; int32_t kernel_size, initrd_size; PCIBus *pci_bus; - OldWorldMacIOState *macio; + PCIDevice *macio; MACIOIDEState *macio_ide; SysBusDevice *s; DeviceState *dev, *pic_dev; @@ -278,7 +278,7 @@ static void ppc_heathrow_init(MachineState *machine) ide_drive_get(hd, ARRAY_SIZE(hd)); =20 /* MacIO */ - macio =3D OLDWORLD_MACIO(pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO)); + macio =3D pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO); dev =3D DEVICE(macio); qdev_prop_set_uint64(dev, "frequency", tbfreq); object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic", --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591722356; cv=none; d=zohomail.com; s=zohoarc; b=mFt63r5SDuSWrLiGSU5PcUlBmXD9AjyJ+ui+2CjLPlb63VBpv1Ag+7haNsdkvsvEVM/LXfjvT7z7A4H8cxlOkVs+s2z+e9WdDlOg7QRVLI55jCyFK+45Qfs1JNIGQYb5neMjvuU9PRIIe7KmKgcLAazuGAcrcq/mO1EZiaIKqf4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591722356; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Tue, 9 Jun 2020 18:39:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720784; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DcFFjHZn2YVdUCpOaujFQ3c7VFLhI3IpXKSvvO7ErqA=; b=CGj3qHYnZt2KRghUKgLOnRQyntBhYYmbB3zvuwLXkWkdrTwYMdDBLxI0+yHULRL3Y8N026 d7I/DN/SYZ/zg1lpwlUuRw+mFFxSfBDWb9Jx+rz7ywzNhBhAzeJ3k9yhn08bS1x2rcNK8m WqM+LOdun05LApElfRNjlo7DQaIrEOs= X-MC-Unique: m_8Gp8CNMuqtWlK6B_xvgA-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 15/39] pci: Convert uses of pci_create() etc. with Coccinelle Date: Tue, 9 Jun 2020 18:39:08 +0200 Message-Id: <20200609163932.1566209-16-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 02:41:53 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Replace dev =3D pci_create(bus, type_name); ... qdev_init_nofail(dev); by dev =3D pci_new(type_name); ... pci_realize_and_unref(dev, bus, &error_fatal); and similarly for pci_create_multifunction(). Recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. Coccinelle script: @@ expression dev, bus, expr; expression list args; @@ - dev =3D pci_create(bus, args); + dev =3D pci_new(args); ... when !=3D dev =3D expr - qdev_init_nofail(&dev->qdev); + pci_realize_and_unref(dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; expression d; @@ - dev =3D pci_create(bus, args); + dev =3D pci_new(args); ( d =3D &dev->qdev; | d =3D DEVICE(dev); ) ... when !=3D dev =3D expr - qdev_init_nofail(d); + pci_realize_and_unref(dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; @@ - dev =3D pci_create(bus, args); + dev =3D pci_new(args); ... when !=3D dev =3D expr - qdev_init_nofail(DEVICE(dev)); + pci_realize_and_unref(dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; @@ - dev =3D DEVICE(pci_create(bus, args)); + PCIDevice *pci_dev; // TODO move + pci_dev =3D pci_new(args); + dev =3D DEVICE(pci_dev); ... when !=3D dev =3D expr - qdev_init_nofail(dev); + pci_realize_and_unref(pci_dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; @@ - dev =3D pci_create_multifunction(bus, args); + dev =3D pci_new_multifunction(args); ... when !=3D dev =3D expr - qdev_init_nofail(&dev->qdev); + pci_realize_and_unref(dev, bus, &error_fatal); @@ expression bus, expr; expression list args; identifier dev; @@ - PCIDevice *dev =3D pci_create_multifunction(bus, args); + PCIDevice *dev =3D pci_new_multifunction(args); ... when !=3D dev =3D expr - qdev_init_nofail(&dev->qdev); + pci_realize_and_unref(dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; @@ - dev =3D pci_create_multifunction(bus, args); + dev =3D pci_new_multifunction(args); ... when !=3D dev =3D expr - qdev_init_nofail(DEVICE(dev)); + pci_realize_and_unref(dev, bus, &error_fatal); Missing #include "qapi/error.h" added manually, whitespace changes minimized manually, @pci_dev declarations moved manually. Cc: Michael S. Tsirkin Cc: Marcel Apfelbaum Signed-off-by: Markus Armbruster Reviewed-by: Paolo Bonzini --- hw/acpi/piix4.c | 6 ++++-- hw/i386/pc_q35.c | 10 +++++----- hw/isa/vt82c686.c | 13 +++++++------ hw/mips/fuloong2e.c | 6 ++++-- hw/pci-bridge/dec.c | 6 +++--- hw/pci-host/bonito.c | 4 ++-- hw/pci-host/sabre.c | 13 +++++++------ hw/pci/pci.c | 8 ++++---- hw/ppc/mac_newworld.c | 4 ++-- hw/ppc/mac_oldworld.c | 4 ++-- hw/sparc64/sun4u.c | 8 ++++---- 11 files changed, 44 insertions(+), 38 deletions(-) diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 85c199b30d..9ab8ad5536 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -514,10 +514,12 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_= t smb_io_base, qemu_irq sci_irq, qemu_irq smi_irq, int smm_enabled, DeviceState **piix4_pm) { + PCIDevice *pci_dev; DeviceState *dev; PIIX4PMState *s; =20 - dev =3D DEVICE(pci_create(bus, devfn, TYPE_PIIX4_PM)); + pci_dev =3D pci_new(devfn, TYPE_PIIX4_PM); + dev =3D DEVICE(pci_dev); qdev_prop_set_uint32(dev, "smb_io_base", smb_io_base); if (piix4_pm) { *piix4_pm =3D dev; @@ -531,7 +533,7 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t = smb_io_base, s->use_acpi_pci_hotplug =3D false; } =20 - qdev_init_nofail(dev); + pci_realize_and_unref(pci_dev, bus, &error_fatal); =20 return s->smb.smbus; } diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index a2e7faccbc..af68ea1b69 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -98,16 +98,16 @@ static int ehci_create_ich9_with_companions(PCIBus *bus= , int slot) return -1; } =20 - ehci =3D pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name); - qdev_init_nofail(&ehci->qdev); + ehci =3D pci_new_multifunction(PCI_DEVFN(slot, 7), true, name); + pci_realize_and_unref(ehci, bus, &error_fatal); usbbus =3D QLIST_FIRST(&ehci->qdev.child_bus); =20 for (i =3D 0; i < 3; i++) { - uhci =3D pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].fun= c), - true, comp[i].name); + uhci =3D pci_new_multifunction(PCI_DEVFN(slot, comp[i].func), true, + comp[i].name); qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name); qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port); - qdev_init_nofail(&uhci->qdev); + pci_realize_and_unref(uhci, bus, &error_fatal); } return 0; } diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index fac4e56b7d..18160ca445 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -23,6 +23,7 @@ #include "hw/isa/apm.h" #include "hw/acpi/acpi.h" #include "hw/i2c/pm_smbus.h" +#include "qapi/error.h" #include "qemu/module.h" #include "qemu/timer.h" #include "exec/address-spaces.h" @@ -276,8 +277,8 @@ void vt82c686b_ac97_init(PCIBus *bus, int devfn) { PCIDevice *dev; =20 - dev =3D pci_create(bus, devfn, TYPE_VT82C686B_AC97_DEVICE); - qdev_init_nofail(&dev->qdev); + dev =3D pci_new(devfn, TYPE_VT82C686B_AC97_DEVICE); + pci_realize_and_unref(dev, bus, &error_fatal); } =20 static void via_ac97_class_init(ObjectClass *klass, void *data) @@ -320,8 +321,8 @@ void vt82c686b_mc97_init(PCIBus *bus, int devfn) { PCIDevice *dev; =20 - dev =3D pci_create(bus, devfn, TYPE_VT82C686B_MC97_DEVICE); - qdev_init_nofail(&dev->qdev); + dev =3D pci_new(devfn, TYPE_VT82C686B_MC97_DEVICE); + pci_realize_and_unref(dev, bus, &error_fatal); } =20 static void via_mc97_class_init(ObjectClass *klass, void *data) @@ -388,12 +389,12 @@ I2CBus *vt82c686b_pm_init(PCIBus *bus, int devfn, uin= t32_t smb_io_base, PCIDevice *dev; VT686PMState *s; =20 - dev =3D pci_create(bus, devfn, TYPE_VT82C686B_PM_DEVICE); + dev =3D pci_new(devfn, TYPE_VT82C686B_PM_DEVICE); qdev_prop_set_uint32(&dev->qdev, "smb_io_base", smb_io_base); =20 s =3D VT82C686B_PM_DEVICE(dev); =20 - qdev_init_nofail(&dev->qdev); + pci_realize_and_unref(dev, bus, &error_fatal); =20 return s->smb.smbus; } diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c index 7a65166cf0..8ca31e5162 100644 --- a/hw/mips/fuloong2e.c +++ b/hw/mips/fuloong2e.c @@ -297,6 +297,7 @@ static void mips_fuloong2e_init(MachineState *machine) long bios_size; uint8_t *spd_data; int64_t kernel_entry; + PCIDevice *pci_dev; PCIBus *pci_bus; ISABus *isa_bus; I2CBus *smbus; @@ -367,10 +368,11 @@ static void mips_fuloong2e_init(MachineState *machine) =20 /* GPU */ if (vga_interface_type !=3D VGA_NONE) { - dev =3D DEVICE(pci_create(pci_bus, -1, "ati-vga")); + pci_dev =3D pci_new(-1, "ati-vga"); + dev =3D DEVICE(pci_dev); qdev_prop_set_uint32(dev, "vgamem_mb", 16); qdev_prop_set_uint16(dev, "x-device-id", 0x5159); - qdev_init_nofail(dev); + pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); } =20 /* Populate SPD eeprom data */ diff --git a/hw/pci-bridge/dec.c b/hw/pci-bridge/dec.c index 952bc71122..677a310b96 100644 --- a/hw/pci-bridge/dec.c +++ b/hw/pci-bridge/dec.c @@ -26,6 +26,7 @@ #include "qemu/osdep.h" #include "dec.h" #include "hw/sysbus.h" +#include "qapi/error.h" #include "qemu/module.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" @@ -81,11 +82,10 @@ PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devf= n) PCIDevice *dev; PCIBridge *br; =20 - dev =3D pci_create_multifunction(parent_bus, devfn, false, - "dec-21154-p2p-bridge"); + dev =3D pci_new_multifunction(devfn, false, "dec-21154-p2p-bridge"); br =3D PCI_BRIDGE(dev); pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq); - qdev_init_nofail(&dev->qdev); + pci_realize_and_unref(dev, parent_bus, &error_fatal); return pci_bridge_get_sec_bus(br); } =20 diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index 546ac84cf4..7bb032f005 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -750,11 +750,11 @@ PCIBus *bonito_init(qemu_irq *pic) pcihost->pic =3D pic; qdev_realize_and_unref(dev, NULL, &error_fatal); =20 - d =3D pci_create(phb->bus, PCI_DEVFN(0, 0), TYPE_PCI_BONITO); + d =3D pci_new(PCI_DEVFN(0, 0), TYPE_PCI_BONITO); s =3D PCI_BONITO(d); s->pcihost =3D pcihost; pcihost->pci_dev =3D s; - qdev_init_nofail(DEVICE(d)); + pci_realize_and_unref(d, phb->bus, &error_fatal); =20 return phb->bus; } diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index 475bcb01d7..0cc68585f8 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -35,6 +35,7 @@ #include "hw/pci-bridge/simba.h" #include "hw/pci-host/sabre.h" #include "exec/address-spaces.h" +#include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" #include "sysemu/runstate.h" @@ -405,17 +406,17 @@ static void sabre_realize(DeviceState *dev, Error **e= rrp) pci_setup_iommu(phb->bus, sabre_pci_dma_iommu, s->iommu); =20 /* APB secondary busses */ - pci_dev =3D pci_create_multifunction(phb->bus, PCI_DEVFN(1, 0), true, - TYPE_SIMBA_PCI_BRIDGE); + pci_dev =3D pci_new_multifunction(PCI_DEVFN(1, 0), true, + TYPE_SIMBA_PCI_BRIDGE); s->bridgeB =3D PCI_BRIDGE(pci_dev); pci_bridge_map_irq(s->bridgeB, "pciB", pci_simbaB_map_irq); - qdev_init_nofail(&pci_dev->qdev); + pci_realize_and_unref(pci_dev, phb->bus, &error_fatal); =20 - pci_dev =3D pci_create_multifunction(phb->bus, PCI_DEVFN(1, 1), true, - TYPE_SIMBA_PCI_BRIDGE); + pci_dev =3D pci_new_multifunction(PCI_DEVFN(1, 1), true, + TYPE_SIMBA_PCI_BRIDGE); s->bridgeA =3D PCI_BRIDGE(pci_dev); pci_bridge_map_irq(s->bridgeA, "pciA", pci_simbaA_map_irq); - qdev_init_nofail(&pci_dev->qdev); + pci_realize_and_unref(pci_dev, phb->bus, &error_fatal); } =20 static void sabre_init(Object *obj) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 92f3f0f134..ab8b71fe72 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -1937,10 +1937,10 @@ PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus = *rootbus, exit(1); } =20 - pci_dev =3D pci_create(bus, devfn, nd->model); + pci_dev =3D pci_new(devfn, nd->model); dev =3D &pci_dev->qdev; qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + pci_realize_and_unref(pci_dev, bus, &error_fatal); g_ptr_array_free(pci_nic_models, true); return pci_dev; } @@ -2183,8 +2183,8 @@ PCIDevice *pci_create_simple_multifunction(PCIBus *bu= s, int devfn, bool multifunction, const char *name) { - PCIDevice *dev =3D pci_create_multifunction(bus, devfn, multifunction,= name); - qdev_init_nofail(&dev->qdev); + PCIDevice *dev =3D pci_new_multifunction(devfn, multifunction, name); + pci_realize_and_unref(dev, bus, &error_fatal); return dev; } =20 diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 2d069dcc59..baa17cdce7 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -375,14 +375,14 @@ static void ppc_core99_init(MachineState *machine) pci_bus =3D PCI_HOST_BRIDGE(uninorth_pci)->bus; =20 /* MacIO */ - macio =3D pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO); + macio =3D pci_new(-1, TYPE_NEWWORLD_MACIO); dev =3D DEVICE(macio); qdev_prop_set_uint64(dev, "frequency", tbfreq); qdev_prop_set_bit(dev, "has-pmu", has_pmu); qdev_prop_set_bit(dev, "has-adb", has_adb); object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic", &error_abort); - qdev_init_nofail(dev); + pci_realize_and_unref(macio, pci_bus, &error_fatal); =20 /* We only emulate 2 out of 3 IDE controllers for now */ ide_drive_get(hd, ARRAY_SIZE(hd)); diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index f73ec5f3a9..903483079e 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -278,12 +278,12 @@ static void ppc_heathrow_init(MachineState *machine) ide_drive_get(hd, ARRAY_SIZE(hd)); =20 /* MacIO */ - macio =3D pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO); + macio =3D pci_new(-1, TYPE_OLDWORLD_MACIO); dev =3D DEVICE(macio); qdev_prop_set_uint64(dev, "frequency", tbfreq); object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic", &error_abort); - qdev_init_nofail(dev); + pci_realize_and_unref(macio, pci_bus, &error_fatal); =20 macio_ide =3D MACIO_IDE(object_resolve_path_component(OBJECT(macio), "ide[0]")); diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index ade9c22825..6f29a013ca 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -605,10 +605,10 @@ static void sun4uv_init(MemoryRegion *address_space_m= em, pci_busA->slot_reserved_mask =3D 0xfffffff1; pci_busB->slot_reserved_mask =3D 0xfffffff0; =20 - ebus =3D pci_create_multifunction(pci_busA, PCI_DEVFN(1, 0), true, TYP= E_EBUS); + ebus =3D pci_new_multifunction(PCI_DEVFN(1, 0), true, TYPE_EBUS); qdev_prop_set_uint64(DEVICE(ebus), "console-serial-base", hwdef->console_serial_base); - qdev_init_nofail(DEVICE(ebus)); + pci_realize_and_unref(ebus, pci_busA, &error_fatal); =20 /* Wire up "well-known" ISA IRQs to PBM legacy obio IRQs */ qdev_connect_gpio_out_named(DEVICE(ebus), "isa-irq", 7, @@ -661,9 +661,9 @@ static void sun4uv_init(MemoryRegion *address_space_mem, qemu_macaddr_default_if_unset(&macaddr); } =20 - pci_dev =3D pci_create(pci_busA, PCI_DEVFN(3, 0), "cmd646-ide"); + pci_dev =3D pci_new(PCI_DEVFN(3, 0), "cmd646-ide"); qdev_prop_set_uint32(&pci_dev->qdev, "secondary", 1); - qdev_init_nofail(&pci_dev->qdev); + pci_realize_and_unref(pci_dev, pci_busA, &error_fatal); pci_ide_create_devs(pci_dev); =20 /* Map NVRAM into I/O (ebus) space */ --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591721849; cv=none; d=zohomail.com; s=zohoarc; b=BWW1hHQ/tryhnBdRQx19zg57PB9VkOJT4fwcMafpQd3/dWb78zElKwczpZk8dzCk8LcUthgpURKgRRr/Ts4uvZEkc39QB3/OgoZcauZepTs/dMsO2gB4V14kppkNKIcpn4pW/opXPZ1up/g3nZwzR3o4ScEi3P0Oj1ZP2jSvwlw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; 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Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Same transformation as in the previous commit. Manual, because convincing Coccinelle to transform these cases is not worthwhile. Cc: Michael S. Tsirkin Cc: Marcel Apfelbaum Signed-off-by: Markus Armbruster Reviewed-by: Paolo Bonzini --- hw/sparc64/sun4u.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 6f29a013ca..0b898d6e3d 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -635,24 +635,28 @@ static void sun4uv_init(MemoryRegion *address_space_m= em, memset(&macaddr, 0, sizeof(MACAddr)); onboard_nic =3D false; for (i =3D 0; i < nb_nics; i++) { + PCIBus *bus; nd =3D &nd_table[i]; =20 if (!nd->model || strcmp(nd->model, "sunhme") =3D=3D 0) { if (!onboard_nic) { - pci_dev =3D pci_create_multifunction(pci_busA, PCI_DEVFN(1= , 1), + pci_dev =3D pci_new_multifunction(PCI_DEVFN(1, 1), true, "sunhme"); + bus =3D pci_busA; memcpy(&macaddr, &nd->macaddr.a, sizeof(MACAddr)); onboard_nic =3D true; } else { - pci_dev =3D pci_create(pci_busB, -1, "sunhme"); + pci_dev =3D pci_new(-1, "sunhme"); + bus =3D pci_busB; } } else { - pci_dev =3D pci_create(pci_busB, -1, nd->model); + pci_dev =3D pci_new(-1, nd->model); + bus =3D pci_busB; } =20 dev =3D &pci_dev->qdev; qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + pci_realize_and_unref(pci_dev, bus, &error_fatal); } =20 /* If we don't have an onboard NIC, grab a default MAC address so that --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591722606; cv=none; d=zohomail.com; s=zohoarc; b=b7C1w3X/sPbyXrHbaG6JP56tA2mV7J8eXvNzOFEdQoWg4j1bIPWl5kbMHNYBpNDjdsOK+iOGRz/OCu3qYufxyychaORB4qEwY/aT/kubugyybzcgetjwrXAz2I8SuqDTcwwb+m0cQ8RTgQKx8w5AKCkRotJkgPpnz248cVcGd0g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591722606; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Tue, 9 Jun 2020 18:39:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720783; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2UObykoq9TV3iiisuu0TD//n6coWTSPzTVvQxciC7ek=; b=XknF5j3+1j4Qu1Cj0ixHjDz939l0cYHJTbsA4gjB3EM0SjuAnYBDk8PrAk3EFZT+gf3/hW CHQ0KbCMQn7SCBC8ZFaO1gB5abHitpM8RNjXmYs/zEqMWzh0/w7rzMdBG5XASHKCR87WJq B2nB8P2sMlwygOMsHtc0MkN2sVhLSa4= X-MC-Unique: Ur8yocBjOtavTst8MTDe3g-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 17/39] pci: pci_create(), pci_create_multifunction() are now unused, drop Date: Tue, 9 Jun 2020 18:39:10 +0200 Message-Id: <20200609163932.1566209-18-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Cc: Michael S. Tsirkin Cc: Marcel Apfelbaum Signed-off-by: Markus Armbruster Reviewed-by: Paolo Bonzini --- include/hw/pci/pci.h | 3 --- hw/pci/pci.c | 16 ---------------- 2 files changed, 19 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 66f8ba519b..a4e9c33416 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -717,12 +717,9 @@ PCIDevice *pci_new_multifunction(int devfn, bool multi= function, PCIDevice *pci_new(int devfn, const char *name); bool pci_realize_and_unref(PCIDevice *dev, PCIBus *bus, Error **errp); =20 -PCIDevice *pci_create_multifunction(PCIBus *bus, int devfn, bool multifunc= tion, - const char *name); PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn, bool multifunction, const char *name); -PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name); PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name); =20 void lsi53c8xx_handle_legacy_cmdline(DeviceState *lsi_dev); diff --git a/hw/pci/pci.c b/hw/pci/pci.c index ab8b71fe72..aaffbd7f94 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2168,17 +2168,6 @@ bool pci_realize_and_unref(PCIDevice *dev, PCIBus *b= us, Error **errp) return qdev_realize_and_unref(&dev->qdev, &bus->qbus, errp); } =20 -PCIDevice *pci_create_multifunction(PCIBus *bus, int devfn, bool multifunc= tion, - const char *name) -{ - DeviceState *dev; - - dev =3D qdev_create(&bus->qbus, name); - qdev_prop_set_int32(dev, "addr", devfn); - qdev_prop_set_bit(dev, "multifunction", multifunction); - return PCI_DEVICE(dev); -} - PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn, bool multifunction, const char *name) @@ -2188,11 +2177,6 @@ PCIDevice *pci_create_simple_multifunction(PCIBus *b= us, int devfn, return dev; } =20 -PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name) -{ - return pci_create_multifunction(bus, devfn, false, name); -} - PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name) { return pci_create_simple_multifunction(bus, devfn, false, name); --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Tue, 09 Jun 2020 12:39:39 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 7BEC3464 for ; Tue, 9 Jun 2020 16:39:38 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 4C6645D9E4; Tue, 9 Jun 2020 16:39:38 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id CA4291138467; Tue, 9 Jun 2020 18:39:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720781; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3CBXo0J+SCopIwTUlnz496gPT9YctBwP6l83TijFGok=; b=MbCeWeg145VUlsAY+1sRfUIRm2NLvrpYpn4sOW67+wgyXl0ErMfmxnrX5zAAJVVgYiNptF sNWMM9u05CHHCAVzwhox5iUMYEbtHTzZuodOqpUCNgVMb+UEkPI3/bhEhGHO2jUB7Q3OR4 9ag2OhtI0yTUSTpqmWgCBmrAo5pwCOk= X-MC-Unique: bI3UFbNcPR6HBlg37j_pxQ-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 18/39] isa: New isa_new(), isa_realize_and_unref() etc. Date: Tue, 9 Jun 2020 18:39:11 +0200 Message-Id: <20200609163932.1566209-19-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 02:41:53 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) I'm converting from qdev_create()/qdev_init_nofail() to qdev_new()/qdev_realize_and_unref(); recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. ISA devices use qdev_create() through isa_create() and isa_try_create(). Provide isa_new(), isa_try_new(), and isa_realize_and_unref() for converting ISA devices. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- include/hw/isa/isa.h | 3 +++ hw/isa/isa-bus.c | 15 +++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 02c2350274..3b6215fafe 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -105,6 +105,9 @@ MemoryRegion *isa_address_space(ISADevice *dev); MemoryRegion *isa_address_space_io(ISADevice *dev); ISADevice *isa_create(ISABus *bus, const char *name); ISADevice *isa_try_create(ISABus *bus, const char *name); +ISADevice *isa_new(const char *name); +ISADevice *isa_try_new(const char *name); +bool isa_realize_and_unref(ISADevice *dev, ISABus *bus, Error **errp); ISADevice *isa_create_simple(ISABus *bus, const char *name); =20 ISADevice *isa_vga_init(ISABus *bus); diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index 1c9d7e19ab..e6412d39b4 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -176,6 +176,16 @@ ISADevice *isa_try_create(ISABus *bus, const char *nam= e) return ISA_DEVICE(dev); } =20 +ISADevice *isa_new(const char *name) +{ + return ISA_DEVICE(qdev_new(name)); +} + +ISADevice *isa_try_new(const char *name) +{ + return ISA_DEVICE(qdev_try_new(name)); +} + ISADevice *isa_create_simple(ISABus *bus, const char *name) { ISADevice *dev; @@ -185,6 +195,11 @@ ISADevice *isa_create_simple(ISABus *bus, const char *= name) return dev; } =20 +bool isa_realize_and_unref(ISADevice *dev, ISABus *bus, Error **errp) +{ + return qdev_realize_and_unref(&dev->parent_obj, &bus->parent_obj, errp= ); +} + ISADevice *isa_vga_init(ISABus *bus) { switch (vga_interface_type) { --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591721986; cv=none; d=zohomail.com; s=zohoarc; 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charset="utf-8" Replace dev =3D isa_create(bus, type_name); ... qdev_init_nofail(dev); by dev =3D isa_new(type_name); ... isa_realize_and_unref(dev, bus, &error_fatal); Recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. Coccinelle script: @@ expression dev, bus, expr; expression list args; expression d; @@ - dev =3D isa_create(bus, args); + dev =3D isa_new(args); ( d =3D &dev->qdev; | d =3D DEVICE(dev); ) ... when !=3D dev =3D expr - qdev_init_nofail(d); + isa_realize_and_unref(dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; @@ - dev =3D isa_create(bus, args); + dev =3D isa_new(args); ... when !=3D dev =3D expr - qdev_init_nofail(DEVICE(dev)); + isa_realize_and_unref(dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; @@ - dev =3D DEVICE(isa_create(bus, args)); + ISADevice *isa_dev; // TODO move + isa_dev =3D isa_new(args); + dev =3D DEVICE(isa_dev); ... when !=3D dev =3D expr - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, bus, &error_fatal); Missing #include "qapi/error.h" added manually, whitespace changes minimized manually. Signed-off-by: Markus Armbruster Reviewed-by: Paolo Bonzini --- include/hw/audio/pcspk.h | 5 +++-- include/hw/timer/i8254.h | 9 +++++---- hw/char/parallel-isa.c | 5 +++-- hw/char/serial-isa.c | 4 ++-- hw/dma/i8257.c | 9 +++++---- hw/ide/isa.c | 5 +++-- hw/intc/i8259_common.c | 5 +++-- hw/isa/isa-bus.c | 4 ++-- hw/isa/isa-superio.c | 20 ++++++++++---------- hw/ppc/prep.c | 26 ++++++++++++++++---------- hw/rtc/m48t59-isa.c | 7 +++++-- hw/rtc/mc146818rtc.c | 4 ++-- hw/sparc64/sun4u.c | 6 ++++-- 13 files changed, 63 insertions(+), 46 deletions(-) diff --git a/include/hw/audio/pcspk.h b/include/hw/audio/pcspk.h index 632cce9f68..7e7f5f49dc 100644 --- a/include/hw/audio/pcspk.h +++ b/include/hw/audio/pcspk.h @@ -27,6 +27,7 @@ =20 #include "hw/isa/isa.h" #include "hw/qdev-properties.h" +#include "qapi/error.h" =20 #define TYPE_PC_SPEAKER "isa-pcspk" =20 @@ -35,11 +36,11 @@ static inline ISADevice *pcspk_init(ISABus *bus, ISADev= ice *pit) DeviceState *dev; ISADevice *isadev; =20 - isadev =3D isa_create(bus, TYPE_PC_SPEAKER); + isadev =3D isa_new(TYPE_PC_SPEAKER); dev =3D DEVICE(isadev); qdev_prop_set_uint32(dev, "iobase", 0x61); object_property_set_link(OBJECT(dev), OBJECT(pit), "pit", NULL); - qdev_init_nofail(dev); + isa_realize_and_unref(isadev, bus, &error_fatal); =20 return isadev; } diff --git a/include/hw/timer/i8254.h b/include/hw/timer/i8254.h index 45cb42571f..e75b4a5a08 100644 --- a/include/hw/timer/i8254.h +++ b/include/hw/timer/i8254.h @@ -27,6 +27,7 @@ =20 #include "hw/qdev-properties.h" #include "hw/isa/isa.h" +#include "qapi/error.h" =20 #define PIT_FREQ 1193182 =20 @@ -54,10 +55,10 @@ static inline ISADevice *i8254_pit_init(ISABus *bus, in= t base, int isa_irq, DeviceState *dev; ISADevice *d; =20 - d =3D isa_create(bus, TYPE_I8254); + d =3D isa_new(TYPE_I8254); dev =3D DEVICE(d); qdev_prop_set_uint32(dev, "iobase", base); - qdev_init_nofail(dev); + isa_realize_and_unref(d, bus, &error_fatal); qdev_connect_gpio_out(dev, 0, isa_irq >=3D 0 ? isa_get_irq(d, isa_irq) : alt_i= rq); =20 @@ -69,10 +70,10 @@ static inline ISADevice *kvm_pit_init(ISABus *bus, int = base) DeviceState *dev; ISADevice *d; =20 - d =3D isa_create(bus, TYPE_KVM_I8254); + d =3D isa_new(TYPE_KVM_I8254); dev =3D DEVICE(d); qdev_prop_set_uint32(dev, "iobase", base); - qdev_init_nofail(dev); + isa_realize_and_unref(d, bus, &error_fatal); =20 return d; } diff --git a/hw/char/parallel-isa.c b/hw/char/parallel-isa.c index bcc577f61c..1ccbb96e70 100644 --- a/hw/char/parallel-isa.c +++ b/hw/char/parallel-isa.c @@ -14,17 +14,18 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "hw/char/parallel.h" +#include "qapi/error.h" =20 static void parallel_init(ISABus *bus, int index, Chardev *chr) { DeviceState *dev; ISADevice *isadev; =20 - isadev =3D isa_create(bus, "isa-parallel"); + isadev =3D isa_new("isa-parallel"); dev =3D DEVICE(isadev); qdev_prop_set_uint32(dev, "index", index); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + isa_realize_and_unref(isadev, bus, &error_fatal); } =20 void parallel_hds_isa_init(ISABus *bus, int n) diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index f9b6eed783..f13dd98c60 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -138,11 +138,11 @@ static void serial_isa_init(ISABus *bus, int index, C= hardev *chr) DeviceState *dev; ISADevice *isadev; =20 - isadev =3D isa_create(bus, TYPE_ISA_SERIAL); + isadev =3D isa_new(TYPE_ISA_SERIAL); dev =3D DEVICE(isadev); qdev_prop_set_uint32(dev, "index", index); qdev_prop_set_chr(dev, "chardev", chr); - qdev_init_nofail(dev); + isa_realize_and_unref(isadev, bus, &error_fatal); } =20 void serial_hds_isa_init(ISABus *bus, int from, int to) diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c index 1b3435ab58..db808029b0 100644 --- a/hw/dma/i8257.c +++ b/hw/dma/i8257.c @@ -27,6 +27,7 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "hw/dma/i8257.h" +#include "qapi/error.h" #include "qemu/main-loop.h" #include "qemu/module.h" #include "qemu/log.h" @@ -638,21 +639,21 @@ void i8257_dma_init(ISABus *bus, bool high_page_enabl= e) ISADevice *isa1, *isa2; DeviceState *d; =20 - isa1 =3D isa_create(bus, TYPE_I8257); + isa1 =3D isa_new(TYPE_I8257); d =3D DEVICE(isa1); qdev_prop_set_int32(d, "base", 0x00); qdev_prop_set_int32(d, "page-base", 0x80); qdev_prop_set_int32(d, "pageh-base", high_page_enable ? 0x480 : -1); qdev_prop_set_int32(d, "dshift", 0); - qdev_init_nofail(d); + isa_realize_and_unref(isa1, bus, &error_fatal); =20 - isa2 =3D isa_create(bus, TYPE_I8257); + isa2 =3D isa_new(TYPE_I8257); d =3D DEVICE(isa2); qdev_prop_set_int32(d, "base", 0xc0); qdev_prop_set_int32(d, "page-base", 0x88); qdev_prop_set_int32(d, "pageh-base", high_page_enable ? 0x488 : -1); qdev_prop_set_int32(d, "dshift", 1); - qdev_init_nofail(d); + isa_realize_and_unref(isa2, bus, &error_fatal); =20 isa_bus_dma(bus, ISADMA(isa1), ISADMA(isa2)); } diff --git a/hw/ide/isa.c b/hw/ide/isa.c index 8395807b08..f28c8fba6c 100644 --- a/hw/ide/isa.c +++ b/hw/ide/isa.c @@ -27,6 +27,7 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "qapi/error.h" #include "qemu/module.h" #include "sysemu/dma.h" =20 @@ -86,12 +87,12 @@ ISADevice *isa_ide_init(ISABus *bus, int iobase, int io= base2, int isairq, ISADevice *isadev; ISAIDEState *s; =20 - isadev =3D isa_create(bus, TYPE_ISA_IDE); + isadev =3D isa_new(TYPE_ISA_IDE); dev =3D DEVICE(isadev); qdev_prop_set_uint32(dev, "iobase", iobase); qdev_prop_set_uint32(dev, "iobase2", iobase2); qdev_prop_set_uint32(dev, "irq", isairq); - qdev_init_nofail(dev); + isa_realize_and_unref(isadev, bus, &error_fatal); =20 s =3D ISA_IDE(dev); if (hd0) { diff --git a/hw/intc/i8259_common.c b/hw/intc/i8259_common.c index 99f8f6abd5..d90b40fe4c 100644 --- a/hw/intc/i8259_common.c +++ b/hw/intc/i8259_common.c @@ -29,6 +29,7 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "monitor/monitor.h" +#include "qapi/error.h" =20 static int irq_level[16]; static uint64_t irq_count[16]; @@ -94,13 +95,13 @@ ISADevice *i8259_init_chip(const char *name, ISABus *bu= s, bool master) DeviceState *dev; ISADevice *isadev; =20 - isadev =3D isa_create(bus, name); + isadev =3D isa_new(name); dev =3D DEVICE(isadev); qdev_prop_set_uint32(dev, "iobase", master ? 0x20 : 0xa0); qdev_prop_set_uint32(dev, "elcr_addr", master ? 0x4d0 : 0x4d1); qdev_prop_set_uint8(dev, "elcr_mask", master ? 0xf8 : 0xde); qdev_prop_set_bit(dev, "master", master); - qdev_init_nofail(dev); + isa_realize_and_unref(isadev, bus, &error_fatal); =20 return isadev; } diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index e6412d39b4..9a95ac3f96 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -190,8 +190,8 @@ ISADevice *isa_create_simple(ISABus *bus, const char *n= ame) { ISADevice *dev; =20 - dev =3D isa_create(bus, name); - qdev_init_nofail(DEVICE(dev)); + dev =3D isa_new(name); + isa_realize_and_unref(dev, bus, &error_fatal); return dev; } =20 diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c index 3dcdc234a4..d3d58f9f16 100644 --- a/hw/isa/isa-superio.c +++ b/hw/isa/isa-superio.c @@ -51,7 +51,7 @@ static void isa_superio_realize(DeviceState *dev, Error *= *errp) } else { name =3D g_strdup_printf("parallel%d", i); } - isa =3D isa_create(bus, "isa-parallel"); + isa =3D isa_new("isa-parallel"); d =3D DEVICE(isa); qdev_prop_set_uint32(d, "index", i); if (k->parallel.get_iobase) { @@ -63,7 +63,7 @@ static void isa_superio_realize(DeviceState *dev, Error *= *errp) } qdev_prop_set_chr(d, "chardev", chr); object_property_add_child(OBJECT(dev), name, OBJECT(isa)); - qdev_init_nofail(d); + isa_realize_and_unref(isa, bus, &error_fatal); sio->parallel[i] =3D isa; trace_superio_create_parallel(i, k->parallel.get_iobase ? @@ -90,7 +90,7 @@ static void isa_superio_realize(DeviceState *dev, Error *= *errp) } else { name =3D g_strdup_printf("serial%d", i); } - isa =3D isa_create(bus, TYPE_ISA_SERIAL); + isa =3D isa_new(TYPE_ISA_SERIAL); d =3D DEVICE(isa); qdev_prop_set_uint32(d, "index", i); if (k->serial.get_iobase) { @@ -102,7 +102,7 @@ static void isa_superio_realize(DeviceState *dev, Error= **errp) } qdev_prop_set_chr(d, "chardev", chr); object_property_add_child(OBJECT(dev), name, OBJECT(isa)); - qdev_init_nofail(d); + isa_realize_and_unref(isa, bus, &error_fatal); sio->serial[i] =3D isa; trace_superio_create_serial(i, k->serial.get_iobase ? @@ -115,7 +115,7 @@ static void isa_superio_realize(DeviceState *dev, Error= **errp) =20 /* Floppy disc */ if (!k->floppy.is_enabled || k->floppy.is_enabled(sio, 0)) { - isa =3D isa_create(bus, "isa-fdc"); + isa =3D isa_new("isa-fdc"); d =3D DEVICE(isa); if (k->floppy.get_iobase) { qdev_prop_set_uint32(d, "iobase", k->floppy.get_iobase(sio, 0)= ); @@ -136,7 +136,7 @@ static void isa_superio_realize(DeviceState *dev, Error= **errp) &error_fatal); } object_property_add_child(OBJECT(sio), "isa-fdc", OBJECT(isa)); - qdev_init_nofail(d); + isa_realize_and_unref(isa, bus, &error_fatal); sio->floppy =3D isa; trace_superio_create_floppy(0, k->floppy.get_iobase ? @@ -146,14 +146,14 @@ static void isa_superio_realize(DeviceState *dev, Err= or **errp) } =20 /* Keyboard, mouse */ - isa =3D isa_create(bus, TYPE_I8042); + isa =3D isa_new(TYPE_I8042); object_property_add_child(OBJECT(sio), TYPE_I8042, OBJECT(isa)); - qdev_init_nofail(DEVICE(isa)); + isa_realize_and_unref(isa, bus, &error_fatal); sio->kbc =3D isa; =20 /* IDE */ if (k->ide.count && (!k->ide.is_enabled || k->ide.is_enabled(sio, 0)))= { - isa =3D isa_create(bus, "isa-ide"); + isa =3D isa_new("isa-ide"); d =3D DEVICE(isa); if (k->ide.get_iobase) { qdev_prop_set_uint32(d, "iobase", k->ide.get_iobase(sio, 0)); @@ -164,7 +164,7 @@ static void isa_superio_realize(DeviceState *dev, Error= **errp) if (k->ide.get_irq) { qdev_prop_set_uint32(d, "irq", k->ide.get_irq(sio, 0)); } - qdev_init_nofail(d); + isa_realize_and_unref(isa, bus, &error_fatal); object_property_add_child(OBJECT(sio), "isa-ide", OBJECT(isa)); sio->ide =3D isa; trace_superio_create_ide(0, diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index c7af0e16c3..73a40b2cbe 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -244,6 +244,7 @@ static void ibm_40p_init(MachineState *machine) SysBusDevice *pcihost, *s; Nvram *m48t59 =3D NULL; PCIBus *pci_bus; + ISADevice *isa_dev; ISABus *isa_bus; void *fw_cfg; int i; @@ -292,14 +293,16 @@ static void ibm_40p_init(MachineState *machine) isa_bus =3D ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0")); =20 /* Memory controller */ - dev =3D DEVICE(isa_create(isa_bus, "rs6000-mc")); + isa_dev =3D isa_new("rs6000-mc"); + dev =3D DEVICE(isa_dev); qdev_prop_set_uint32(dev, "ram-size", machine->ram_size); - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, isa_bus, &error_fatal); =20 /* RTC */ - dev =3D DEVICE(isa_create(isa_bus, TYPE_MC146818_RTC)); + isa_dev =3D isa_new(TYPE_MC146818_RTC); + dev =3D DEVICE(isa_dev); qdev_prop_set_int32(dev, "base_year", 1900); - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, isa_bus, &error_fatal); =20 /* initialize CMOS checksums */ cmos_checksum =3D 0x6aa9; @@ -310,19 +313,22 @@ static void ibm_40p_init(MachineState *machine) if (defaults_enabled()) { m48t59 =3D NVRAM(isa_create_simple(isa_bus, "isa-m48t59")); =20 - dev =3D DEVICE(isa_create(isa_bus, "cs4231a")); + isa_dev =3D isa_new("cs4231a"); + dev =3D DEVICE(isa_dev); qdev_prop_set_uint32(dev, "iobase", 0x830); qdev_prop_set_uint32(dev, "irq", 10); - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, isa_bus, &error_fatal); =20 - dev =3D DEVICE(isa_create(isa_bus, "pc87312")); + isa_dev =3D isa_new("pc87312"); + dev =3D DEVICE(isa_dev); qdev_prop_set_uint32(dev, "config", 12); - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, isa_bus, &error_fatal); =20 - dev =3D DEVICE(isa_create(isa_bus, "prep-systemio")); + isa_dev =3D isa_new("prep-systemio"); + dev =3D DEVICE(isa_dev); qdev_prop_set_uint32(dev, "ibm-planar-id", 0xfc); qdev_prop_set_uint32(dev, "equipment", 0xc0); - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, isa_bus, &error_fatal); =20 dev =3D DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(1, 0), "lsi53c810")); diff --git a/hw/rtc/m48t59-isa.c b/hw/rtc/m48t59-isa.c index 131eb5b7d3..50430b7a85 100644 --- a/hw/rtc/m48t59-isa.c +++ b/hw/rtc/m48t59-isa.c @@ -28,6 +28,7 @@ #include "hw/qdev-properties.h" #include "hw/rtc/m48t59.h" #include "m48t59-internal.h" +#include "qapi/error.h" #include "qemu/module.h" =20 #define TYPE_M48TXX_ISA "isa-m48txx" @@ -61,6 +62,7 @@ static M48txxInfo m48txx_isa_info[] =3D { Nvram *m48t59_init_isa(ISABus *bus, uint32_t io_base, uint16_t size, int base_year, int model) { + ISADevice *isa_dev; DeviceState *dev; int i; =20 @@ -70,10 +72,11 @@ Nvram *m48t59_init_isa(ISABus *bus, uint32_t io_base, u= int16_t size, continue; } =20 - dev =3D DEVICE(isa_create(bus, m48txx_isa_info[i].bus_name)); + isa_dev =3D isa_new(m48txx_isa_info[i].bus_name); + dev =3D DEVICE(isa_dev); qdev_prop_set_uint32(dev, "iobase", io_base); qdev_prop_set_int32(dev, "base-year", base_year); - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, bus, &error_fatal); return NVRAM(dev); } =20 diff --git a/hw/rtc/mc146818rtc.c b/hw/rtc/mc146818rtc.c index 9c30cbdcd7..1a31d71b5e 100644 --- a/hw/rtc/mc146818rtc.c +++ b/hw/rtc/mc146818rtc.c @@ -973,10 +973,10 @@ ISADevice *mc146818_rtc_init(ISABus *bus, int base_ye= ar, qemu_irq intercept_irq) DeviceState *dev; ISADevice *isadev; =20 - isadev =3D isa_create(bus, TYPE_MC146818_RTC); + isadev =3D isa_new(TYPE_MC146818_RTC); dev =3D DEVICE(isadev); qdev_prop_set_int32(dev, "base_year", base_year); - qdev_init_nofail(dev); + isa_realize_and_unref(isadev, bus, &error_fatal); if (intercept_irq) { qdev_connect_gpio_out(dev, 0, intercept_irq); } else { diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 0b898d6e3d..8470c33f99 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -300,6 +300,7 @@ static void ebus_isa_irq_handler(void *opaque, int n, i= nt level) static void ebus_realize(PCIDevice *pci_dev, Error **errp) { EbusState *s =3D EBUS(pci_dev); + ISADevice *isa_dev; SysBusDevice *sbd; DeviceState *dev; qemu_irq *isa_irq; @@ -338,7 +339,8 @@ static void ebus_realize(PCIDevice *pci_dev, Error **er= rp) for (i =3D 0; i < MAX_FD; i++) { fd[i] =3D drive_get(IF_FLOPPY, 0, i); } - dev =3D DEVICE(isa_create(s->isa_bus, TYPE_ISA_FDC)); + isa_dev =3D isa_new(TYPE_ISA_FDC); + dev =3D DEVICE(isa_dev); if (fd[0]) { qdev_prop_set_drive(dev, "driveA", blk_by_legacy_dinfo(fd[0]), &error_abort); @@ -348,7 +350,7 @@ static void ebus_realize(PCIDevice *pci_dev, Error **er= rp) &error_abort); } qdev_prop_set_uint32(dev, "dma", -1); - qdev_init_nofail(dev); + isa_realize_and_unref(isa_dev, s->isa_bus, &error_fatal); =20 /* Power */ dev =3D qdev_new(TYPE_SUN4U_POWER); --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Tue, 09 Jun 2020 12:39:39 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 9E799801503 for ; Tue, 9 Jun 2020 16:39:38 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 6E8985C1BD; Tue, 9 Jun 2020 16:39:38 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id DE2261138469; Tue, 9 Jun 2020 18:39:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720783; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GMQkoCA98vIuNv1ROVK3Ov3b/ghMux8fGTKdW5hV1no=; b=DNCDCkh7lFYRZFLqddj9boUoPzaqeGEJTHVdFWj3JoYaFRh8akzBSHJhLN4m8LOGnViJeZ aZ93ekWmyH6A7EaSDSCvL/XeZ+0BRFPZGcs+JhKWHqMpZM+MLmnd9kiWnRuBokjrn09My4 n9efscmoZrzwe77r5SY/C3RJ3AA187Q= X-MC-Unique: BQ0ubJ7FMOK7den6gHsjxQ-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 20/39] isa: Convert uses of isa_create(), isa_try_create() manually Date: Tue, 9 Jun 2020 18:39:13 +0200 Message-Id: <20200609163932.1566209-21-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/08 23:42:34 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" Same transformation as in the previous commit. Manual, because convincing Coccinelle to transform these cases is not worthwhile. Signed-off-by: Markus Armbruster Reviewed-by: Paolo Bonzini --- include/hw/net/ne2000-isa.h | 5 +++-- hw/block/fdc.c | 4 ++-- hw/i386/pc.c | 4 ++-- hw/ppc/pnv.c | 9 ++++----- 4 files changed, 11 insertions(+), 11 deletions(-) diff --git a/include/hw/net/ne2000-isa.h b/include/hw/net/ne2000-isa.h index eef17a680d..af59ee0b02 100644 --- a/include/hw/net/ne2000-isa.h +++ b/include/hw/net/ne2000-isa.h @@ -13,6 +13,7 @@ #include "hw/isa/isa.h" #include "hw/qdev-properties.h" #include "net/net.h" +#include "qapi/error.h" =20 #define TYPE_ISA_NE2000 "ne2k_isa" =20 @@ -23,14 +24,14 @@ static inline ISADevice *isa_ne2000_init(ISABus *bus, i= nt base, int irq, =20 qemu_check_nic_model(nd, "ne2k_isa"); =20 - d =3D isa_try_create(bus, TYPE_ISA_NE2000); + d =3D isa_try_new(TYPE_ISA_NE2000); if (d) { DeviceState *dev =3D DEVICE(d); =20 qdev_prop_set_uint32(dev, "iobase", base); qdev_prop_set_uint32(dev, "irq", irq); qdev_set_nic_properties(dev, nd); - qdev_init_nofail(dev); + isa_realize_and_unref(d, bus, &error_fatal); } return d; } diff --git a/hw/block/fdc.c b/hw/block/fdc.c index 1feb398875..a3250f6fdb 100644 --- a/hw/block/fdc.c +++ b/hw/block/fdc.c @@ -2544,7 +2544,7 @@ ISADevice *fdctrl_init_isa(ISABus *bus, DriveInfo **f= ds) DeviceState *dev; ISADevice *isadev; =20 - isadev =3D isa_try_create(bus, TYPE_ISA_FDC); + isadev =3D isa_try_new(TYPE_ISA_FDC); if (!isadev) { return NULL; } @@ -2558,7 +2558,7 @@ ISADevice *fdctrl_init_isa(ISABus *bus, DriveInfo **f= ds) qdev_prop_set_drive(dev, "driveB", blk_by_legacy_dinfo(fds[1]), &error_fatal); } - qdev_init_nofail(dev); + isa_realize_and_unref(isadev, bus, &error_fatal); =20 return isadev; } diff --git a/hw/i386/pc.c b/hw/i386/pc.c index b549d0bbfc..280560f790 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1157,14 +1157,14 @@ static void pc_superio_init(ISABus *isa_bus, bool c= reate_fdctrl, bool no_vmport) i8042 =3D isa_create_simple(isa_bus, "i8042"); if (!no_vmport) { isa_create_simple(isa_bus, TYPE_VMPORT); - vmmouse =3D isa_try_create(isa_bus, "vmmouse"); + vmmouse =3D isa_try_new("vmmouse"); } else { vmmouse =3D NULL; } if (vmmouse) { object_property_set_link(OBJECT(vmmouse), OBJECT(i8042), "i8042", &error_abort); - qdev_init_nofail(DEVICE(vmmouse)); + isa_realize_and_unref(vmmouse, isa_bus, &error_fatal); } port92 =3D isa_create_simple(isa_bus, TYPE_PORT92); =20 diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index e0588285a2..ffaf12b006 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -694,12 +694,11 @@ static bool pnv_match_cpu(const char *default_type, c= onst char *cpu_type) =20 static void pnv_ipmi_bt_init(ISABus *bus, IPMIBmc *bmc, uint32_t irq) { - Object *obj; + ISADevice *dev =3D isa_new("isa-ipmi-bt"); =20 - obj =3D OBJECT(isa_create(bus, "isa-ipmi-bt")); - object_property_set_link(obj, OBJECT(bmc), "bmc", &error_fatal); - object_property_set_int(obj, irq, "irq", &error_fatal); - object_property_set_bool(obj, true, "realized", &error_fatal); + object_property_set_link(OBJECT(dev), OBJECT(bmc), "bmc", &error_fatal= ); + object_property_set_int(OBJECT(dev), irq, "irq", &error_fatal); + isa_realize_and_unref(dev, bus, &error_fatal); } =20 static void pnv_chip_power10_pic_print_info(PnvChip *chip, Monitor *mon) --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591722000; cv=none; d=zohomail.com; s=zohoarc; b=ai6L/fr7QVrQx1CBh7Ou45DVh00YagYh93JyRCUyiBEYhBLUsP+r8+a8EFkZwYe6zvqa7wOrd/ttHYvFk9Op5fQQgN/hHEdhLyOHTvGRXkSJ1H5+MFelvP3lvyVWNs7mzsatpjl0oiDtVwV18ImvBNOxWQuv1iQSxghRkhBqdhI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591722000; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Tue, 9 Jun 2020 18:39:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720781; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=O+FzUOawUk2COujYiOQigNozu6wS7lLFYGjnIE83AUU=; b=MqfQuCmmqjJvs/5S+XCkUKr4CId1zmlJd/3/AMkdbJljGBwDuDFB2BNT7wx7Uo8wAEWSj8 ZOKMipRk0CUETK5wFmqx6LCGGRu7L4UVvr24dLnUmPlEkD37O2mGv5Iqn6BTc8hh+06bXu R7ltwXpZev7xazhHwoJkGabsL7pELgw= X-MC-Unique: B0vxd4kRP-WguLfdZ3JAkg-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 21/39] isa: isa_create(), isa_try_create() are now unused, drop Date: Tue, 9 Jun 2020 18:39:14 +0200 Message-Id: <20200609163932.1566209-22-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Signed-off-by: Markus Armbruster Reviewed-by: Paolo Bonzini --- include/hw/isa/isa.h | 2 -- hw/isa/isa-bus.c | 16 ---------------- 2 files changed, 18 deletions(-) diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 3b6215fafe..52b61eed88 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -103,8 +103,6 @@ void isa_bus_dma(ISABus *bus, IsaDma *dma8, IsaDma *dma= 16); IsaDma *isa_get_dma(ISABus *bus, int nchan); MemoryRegion *isa_address_space(ISADevice *dev); MemoryRegion *isa_address_space_io(ISADevice *dev); -ISADevice *isa_create(ISABus *bus, const char *name); -ISADevice *isa_try_create(ISABus *bus, const char *name); ISADevice *isa_new(const char *name); ISADevice *isa_try_new(const char *name); bool isa_realize_and_unref(ISADevice *dev, ISABus *bus, Error **errp); diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index 9a95ac3f96..630985604d 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -160,22 +160,6 @@ static void isa_device_init(Object *obj) dev->isairq[1] =3D -1; } =20 -ISADevice *isa_create(ISABus *bus, const char *name) -{ - DeviceState *dev; - - dev =3D qdev_create(BUS(bus), name); - return ISA_DEVICE(dev); -} - -ISADevice *isa_try_create(ISABus *bus, const char *name) -{ - DeviceState *dev; - - dev =3D qdev_try_create(BUS(bus), name); - return ISA_DEVICE(dev); -} - ISADevice *isa_new(const char *name) { return ISA_DEVICE(qdev_new(name)); --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591722771; cv=none; d=zohomail.com; s=zohoarc; b=KuKtodr1n2c2lpo2auns3bFcY8rwBuuDDI/eVKFExhCteYq6EVA/hh8olMK/kiKgltWawaWbk+of0OWKyGp+/9ZUvtH5vAHwF7iSCkJQepkK4U2l3jVgyBeaZR8IcaEEWJc21l3JwVm1SaIS04EwpXVljlOrfbqRNPYdlIeu0ek= ARC-Message-Signature: i=1; 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Tue, 9 Jun 2020 16:39:39 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 0B10989290; Tue, 9 Jun 2020 16:39:39 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id F14D5113846B; Tue, 9 Jun 2020 18:39:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720782; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=KkE63Hw3fawiReVN8Z2IoWR4YEa+6tGXV/d+nQAe6pk=; b=A/dQ4ABCF8IiW3v1z7txYn8w52JhBXkdTfcLra690L0JFbWhMFIhCxOHrl0AeUB+sHRpCW sjmE//HVeK5+GkuGhBRQxsnbPT8Td8jd5cQtSHCXFrhTbUre7ePwjBhQsHgZKtiE9t4nSC cmKFHnY3Parpeg9yvHfZW2AG/kpbQ6Y= X-MC-Unique: UkZPRisyNfm8SD1IY_XMzQ-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 22/39] ssi: ssi_auto_connect_slaves() never does anything, drop Date: Tue, 9 Jun 2020 18:39:15 +0200 Message-Id: <20200609163932.1566209-23-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 01:38:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Alistair Francis , Alistair Francis Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" ssi_auto_connect_slaves(parent, cs_line, bus) iterates over @parent's QOM children @dev of type TYPE_SSI_SLAVE. It puts these on @bus, and sets cs_line[] to qdev_get_gpio_in_named(dev, SSI_GPIO_CS, 0). Suspicious: there is no protection against overrunning cs_line[]. Turns out it's safe because ssi_auto_connect_slaves() never finds any such children. Its called by realize methods of some (but not all) devices providing an SSI bus, and gets passed the device. SSI slave devices are always created with ssi_create_slave_no_init(), optionally via ssi_create_slave(). This adds them to their SSI bus. It doesn't set their QOM parent. ssi_create_slave_no_init() is always immediately followed by qdev_init_nofail(), with no QOM parent assigned, so device_set_realized() puts the device into the /machine/unattached/ orphanage. None become QOM children of a device providing an SSI bus. ssi_auto_connect_slaves() was added in commit b4ae3cfa57 "ssi: Add slave autoconnect helper". I can't see which slaves it was supposed to connect back then. Cc: Alistair Francis Signed-off-by: Markus Armbruster Acked-by: Alistair Francis Reviewed-by: Paolo Bonzini --- include/hw/ssi/ssi.h | 4 ---- hw/ssi/aspeed_smc.c | 1 - hw/ssi/imx_spi.c | 2 -- hw/ssi/mss-spi.c | 1 - hw/ssi/ssi.c | 33 --------------------------------- hw/ssi/xilinx_spi.c | 1 - hw/ssi/xilinx_spips.c | 4 ---- 7 files changed, 46 deletions(-) diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h index 1107cb89ee..1725b13c32 100644 --- a/include/hw/ssi/ssi.h +++ b/include/hw/ssi/ssi.h @@ -86,10 +86,6 @@ SSIBus *ssi_create_bus(DeviceState *parent, const char *= name); =20 uint32_t ssi_transfer(SSIBus *bus, uint32_t val); =20 -/* Automatically connect all children nodes a spi controller as slaves */ -void ssi_auto_connect_slaves(DeviceState *parent, qemu_irq *cs_lines, - SSIBus *bus); - /* max111x.c */ void max111x_set_input(DeviceState *dev, int line, uint8_t value); =20 diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index 2edccef2d5..4fab1f5f85 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -1356,7 +1356,6 @@ static void aspeed_smc_realize(DeviceState *dev, Erro= r **errp) =20 /* Setup cs_lines for slaves */ s->cs_lines =3D g_new0(qemu_irq, s->num_cs); - ssi_auto_connect_slaves(dev, s->cs_lines, s->spi); =20 for (i =3D 0; i < s->num_cs; ++i) { sysbus_init_irq(sbd, &s->cs_lines[i]); diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c index 43b2f14dd2..7f703d8328 100644 --- a/hw/ssi/imx_spi.c +++ b/hw/ssi/imx_spi.c @@ -424,8 +424,6 @@ static void imx_spi_realize(DeviceState *dev, Error **e= rrp) sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem); sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq); =20 - ssi_auto_connect_slaves(dev, s->cs_lines, s->bus); - for (i =3D 0; i < 4; ++i) { sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->cs_lines[i]); } diff --git a/hw/ssi/mss-spi.c b/hw/ssi/mss-spi.c index 3050fabb69..b2432c5a13 100644 --- a/hw/ssi/mss-spi.c +++ b/hw/ssi/mss-spi.c @@ -376,7 +376,6 @@ static void mss_spi_realize(DeviceState *dev, Error **e= rrp) s->spi =3D ssi_create_bus(dev, "spi"); =20 sysbus_init_irq(sbd, &s->irq); - ssi_auto_connect_slaves(dev, &s->cs_line, s->spi); sysbus_init_irq(sbd, &s->cs_line); =20 memory_region_init_io(&s->mmio, OBJECT(s), &spi_ops, s, diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c index c6415eb6e3..54106f5ef8 100644 --- a/hw/ssi/ssi.c +++ b/hw/ssi/ssi.c @@ -142,36 +142,3 @@ static void ssi_slave_register_types(void) } =20 type_init(ssi_slave_register_types) - -typedef struct SSIAutoConnectArg { - qemu_irq **cs_linep; - SSIBus *bus; -} SSIAutoConnectArg; - -static int ssi_auto_connect_slave(Object *child, void *opaque) -{ - SSIAutoConnectArg *arg =3D opaque; - SSISlave *dev =3D (SSISlave *)object_dynamic_cast(child, TYPE_SSI_SLAV= E); - qemu_irq cs_line; - - if (!dev) { - return 0; - } - - cs_line =3D qdev_get_gpio_in_named(DEVICE(dev), SSI_GPIO_CS, 0); - qdev_set_parent_bus(DEVICE(dev), BUS(arg->bus)); - **arg->cs_linep =3D cs_line; - (*arg->cs_linep)++; - return 0; -} - -void ssi_auto_connect_slaves(DeviceState *parent, qemu_irq *cs_line, - SSIBus *bus) -{ - SSIAutoConnectArg arg =3D { - .cs_linep =3D &cs_line, - .bus =3D bus - }; - - object_child_foreach(OBJECT(parent), ssi_auto_connect_slave, &arg); -} diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c index eba7ccd46a..80d1488dc7 100644 --- a/hw/ssi/xilinx_spi.c +++ b/hw/ssi/xilinx_spi.c @@ -334,7 +334,6 @@ static void xilinx_spi_realize(DeviceState *dev, Error = **errp) =20 sysbus_init_irq(sbd, &s->irq); s->cs_lines =3D g_new0(qemu_irq, s->num_cs); - ssi_auto_connect_slaves(dev, s->cs_lines, s->spi); for (i =3D 0; i < s->num_cs; ++i) { sysbus_init_irq(sbd, &s->cs_lines[i]); } diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index e76cf290c8..b9371dbf8d 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -1270,7 +1270,6 @@ static void xilinx_spips_realize(DeviceState *dev, Er= ror **errp) XilinxSPIPS *s =3D XILINX_SPIPS(dev); SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); XilinxSPIPSClass *xsc =3D XILINX_SPIPS_GET_CLASS(s); - qemu_irq *cs; int i; =20 DB_PRINT_L(0, "realized spips\n"); @@ -1297,9 +1296,6 @@ static void xilinx_spips_realize(DeviceState *dev, Er= ror **errp) =20 s->cs_lines =3D g_new0(qemu_irq, s->num_cs * s->num_busses); s->cs_lines_state =3D g_new0(bool, s->num_cs * s->num_busses); - for (i =3D 0, cs =3D s->cs_lines; i < s->num_busses; ++i, cs +=3D s->n= um_cs) { - ssi_auto_connect_slaves(DEVICE(s), cs, s->spi[i]); - } =20 sysbus_init_irq(sbd, &s->irq); for (i =3D 0; i < s->num_cs * s->num_busses; ++i) { --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591722128; cv=none; d=zohomail.com; s=zohoarc; b=H8QiVVEAsGDnMFUhdXSD3Tnu63r35IMK0A1ixKc97WRqR6hMxbYoO6+MAjm6qpMl5MeeRagVY33TU1liKo0c782vi4j9YhDBT1nfhh/s/QEJmitjDY8aFYhaGyKm/B5TmHrKtigw8a/E9uvd+r2c/fyRm0Vs9wh7HYu8zU1RBJA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591722128; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=JV4Y/vtGLCBT77Wo1IIP2KtX7DxxCrx4zcZEtQ7eNEc=; b=AE7PqsRmkNsjchJ9PCGHaFGbAYRfKmSO773MDPa+UJgsHj66MLgx+wc7/Q0xFsnRSSFU5/KpcngJ+M+HEcXcNr4fwaOI29kigrK4n65W5ED3HUvX1YnMtocAWxm5lwJcnMQyNM1lZRh0jqLEJk8hTcnn55kmT7UeQuO5u85CijA= ARC-Authentication-Results: i=1; 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bh=JV4Y/vtGLCBT77Wo1IIP2KtX7DxxCrx4zcZEtQ7eNEc=; b=IC8ajy0RLn5r6GUzHNvzAwuvWjbG/PGyZ28lyW4xw9sJs7Tem8J2rsxaAUxLNqCNprCImL 87RYBRqQ3mh2jVIAkCLswa4qMJFYi9lmWI0H8GO/8JIdFH7whV4DPAHZP0fi7JH9Lw9zgS Hgj11HXN8GJdqdW7lqYOd0K10t9FcNc= X-MC-Unique: BaG-m9XBO0ykrlk5JQLxsg-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 23/39] ssi: Convert uses of ssi_create_slave_no_init() with Coccinelle Date: Tue, 9 Jun 2020 18:39:16 +0200 Message-Id: <20200609163932.1566209-24-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 01:38:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Alistair Francis , Alistair Francis Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Replace dev =3D ssi_create_slave_no_init(bus, type_name); ... qdev_init_nofail(dev); by dev =3D qdev_new(type_name); ... qdev_realize_and_unref(dev, bus, &error_fatal); Recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. @@ type SSIBus; identifier bus; expression dev, qbus, expr; expression list args; @@ - bus =3D (SSIBus *)qbus; + bus =3D qbus; // TODO fix up decl ... - dev =3D ssi_create_slave_no_init(bus, args); + dev =3D qdev_new(args); ... when !=3D dev =3D expr - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, bus, &error_fatal); @@ expression dev, bus, expr; expression list args; @@ - dev =3D ssi_create_slave_no_init(bus, args); + dev =3D qdev_new(args); ... when !=3D dev =3D expr - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, BUS(bus), &error_fatal); Bus declarations fixed up manually. Cc: Alistair Francis Signed-off-by: Markus Armbruster Reviewed-by: Alistair Francis Reviewed-by: Paolo Bonzini --- hw/arm/aspeed.c | 4 ++-- hw/arm/msf2-som.c | 8 ++++---- hw/arm/sabrelite.c | 4 ++-- hw/arm/xilinx_zynq.c | 4 ++-- hw/arm/xlnx-zcu102.c | 16 ++++++++-------- hw/microblaze/petalogix_ml605_mmu.c | 4 ++-- 6 files changed, 20 insertions(+), 20 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 63a7105e8b..9c25d5da96 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -225,12 +225,12 @@ static void aspeed_board_init_flashes(AspeedSMCState = *s, const char *flashtype, DriveInfo *dinfo =3D drive_get_next(IF_MTD); qemu_irq cs_line; =20 - fl->flash =3D ssi_create_slave_no_init(s->spi, flashtype); + fl->flash =3D qdev_new(flashtype); if (dinfo) { qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(di= nfo), errp); } - qdev_init_nofail(fl->flash); + qdev_realize_and_unref(fl->flash, BUS(s->spi), &error_fatal); =20 cs_line =3D qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0); sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line); diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c index e398703742..ca9cbe1acb 100644 --- a/hw/arm/msf2-som.c +++ b/hw/arm/msf2-som.c @@ -47,7 +47,7 @@ static void emcraft_sf2_s2s010_init(MachineState *machine) MachineClass *mc =3D MACHINE_GET_CLASS(machine); DriveInfo *dinfo =3D drive_get_next(IF_MTD); qemu_irq cs_line; - SSIBus *spi_bus; + BusState *spi_bus; MemoryRegion *sysmem =3D get_system_memory(); MemoryRegion *ddr =3D g_new(MemoryRegion, 1); =20 @@ -82,14 +82,14 @@ static void emcraft_sf2_s2s010_init(MachineState *machi= ne) soc =3D MSF2_SOC(dev); =20 /* Attach SPI flash to SPI0 controller */ - spi_bus =3D (SSIBus *)qdev_get_child_bus(dev, "spi0"); - spi_flash =3D ssi_create_slave_no_init(spi_bus, "s25sl12801"); + spi_bus =3D qdev_get_child_bus(dev, "spi0"); + spi_flash =3D qdev_new("s25sl12801"); qdev_prop_set_uint8(spi_flash, "spansion-cr2nv", 1); if (dinfo) { qdev_prop_set_drive(spi_flash, "drive", blk_by_legacy_dinfo(dinfo), &error_fatal); } - qdev_init_nofail(spi_flash); + qdev_realize_and_unref(spi_flash, spi_bus, &error_fatal); cs_line =3D qdev_get_gpio_in_named(spi_flash, SSI_GPIO_CS, 0); sysbus_connect_irq(SYS_BUS_DEVICE(&soc->spi[0]), 1, cs_line); =20 diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c index 96cb30aa3c..33d731549d 100644 --- a/hw/arm/sabrelite.c +++ b/hw/arm/sabrelite.c @@ -75,13 +75,13 @@ static void sabrelite_init(MachineState *machine) qemu_irq cs_line; DriveInfo *dinfo =3D drive_get_next(IF_MTD); =20 - flash_dev =3D ssi_create_slave_no_init(spi_bus, "sst25vf01= 6b"); + flash_dev =3D qdev_new("sst25vf016b"); if (dinfo) { qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo), &error_fatal); } - qdev_init_nofail(flash_dev); + qdev_realize_and_unref(flash_dev, BUS(spi_bus), &error_fat= al); =20 cs_line =3D qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS,= 0); sysbus_connect_irq(SYS_BUS_DEVICE(spi_dev), 1, cs_line); diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 5fbd2b2e31..0e0f0976c4 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -157,12 +157,12 @@ static inline void zynq_init_spi_flashes(uint32_t bas= e_addr, qemu_irq irq, =20 for (j =3D 0; j < num_ss; ++j) { DriveInfo *dinfo =3D drive_get_next(IF_MTD); - flash_dev =3D ssi_create_slave_no_init(spi, "n25q128"); + flash_dev =3D qdev_new("n25q128"); if (dinfo) { qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo), &error_fat= al); } - qdev_init_nofail(flash_dev); + qdev_realize_and_unref(flash_dev, BUS(spi), &error_fatal); =20 cs_line =3D qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); sysbus_connect_irq(busdev, i * num_ss + j + 1, cs_line); diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index 4229b2d936..77c84b82ab 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -149,21 +149,21 @@ static void xlnx_zcu102_init(MachineState *machine) } =20 for (i =3D 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) { - SSIBus *spi_bus; + BusState *spi_bus; DeviceState *flash_dev; qemu_irq cs_line; DriveInfo *dinfo =3D drive_get_next(IF_MTD); gchar *bus_name =3D g_strdup_printf("spi%d", i); =20 - spi_bus =3D (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name= ); + spi_bus =3D qdev_get_child_bus(DEVICE(&s->soc), bus_name); g_free(bus_name); =20 - flash_dev =3D ssi_create_slave_no_init(spi_bus, "sst25wf080"); + flash_dev =3D qdev_new("sst25wf080"); if (dinfo) { qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(di= nfo), &error_fatal); } - qdev_init_nofail(flash_dev); + qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal); =20 cs_line =3D qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); =20 @@ -171,22 +171,22 @@ static void xlnx_zcu102_init(MachineState *machine) } =20 for (i =3D 0; i < XLNX_ZYNQMP_NUM_QSPI_FLASH; i++) { - SSIBus *spi_bus; + BusState *spi_bus; DeviceState *flash_dev; qemu_irq cs_line; DriveInfo *dinfo =3D drive_get_next(IF_MTD); int bus =3D i / XLNX_ZYNQMP_NUM_QSPI_BUS_CS; gchar *bus_name =3D g_strdup_printf("qspi%d", bus); =20 - spi_bus =3D (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name= ); + spi_bus =3D qdev_get_child_bus(DEVICE(&s->soc), bus_name); g_free(bus_name); =20 - flash_dev =3D ssi_create_slave_no_init(spi_bus, "n25q512a11"); + flash_dev =3D qdev_new("n25q512a11"); if (dinfo) { qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(di= nfo), &error_fatal); } - qdev_init_nofail(flash_dev); + qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal); =20 cs_line =3D qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0); =20 diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_= ml605_mmu.c index 2e7a3fa119..d4bfa233c9 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -186,12 +186,12 @@ petalogix_ml605_init(MachineState *machine) DriveInfo *dinfo =3D drive_get_next(IF_MTD); qemu_irq cs_line; =20 - dev =3D ssi_create_slave_no_init(spi, "n25q128"); + dev =3D qdev_new("n25q128"); if (dinfo) { qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinf= o), &error_fatal); } - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, BUS(spi), &error_fatal); =20 cs_line =3D qdev_get_gpio_in_named(dev, SSI_GPIO_CS, 0); sysbus_connect_irq(busdev, i+1, cs_line); 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bh=cxvAoQs0pzlxnw/VTKjCtG+APSEJUAnDcimtibXU1t4=; b=ZapgdCAyh8CikEkg8dRkKqpxUXpbhCz45tMAwNX+1w1cyTqZRjDnf55feLRb87A6d5N1IB /GyYdaAlL5lHjfF7FmcjG5nK+uIjKVvj6uoYUpVyfD0yOKKfhR0J5cq0gi0aIiGOt5d5FK icUFHrBx93sXyD8a7qBjLzSh9ILcc4E= X-MC-Unique: UYUzbzoQMUizmnwyBa5Q9Q-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 24/39] ssi: Convert last use of ssi_create_slave_no_init() manually Date: Tue, 9 Jun 2020 18:39:17 +0200 Message-Id: <20200609163932.1566209-25-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 01:38:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Alistair Francis , Alistair Francis Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Same transformation as in the previous commit. Manual, because convincing Coccinelle to transform this case is not worthwhile. Cc: Alistair Francis Signed-off-by: Markus Armbruster Acked-by: Alistair Francis Reviewed-by: Paolo Bonzini --- hw/ssi/ssi.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c index 54106f5ef8..58e7d904db 100644 --- a/hw/ssi/ssi.c +++ b/hw/ssi/ssi.c @@ -16,6 +16,7 @@ #include "hw/ssi/ssi.h" #include "migration/vmstate.h" #include "qemu/module.h" +#include "qapi/error.h" =20 struct SSIBus { BusState parent_obj; @@ -96,9 +97,9 @@ DeviceState *ssi_create_slave_no_init(SSIBus *bus, const = char *name) =20 DeviceState *ssi_create_slave(SSIBus *bus, const char *name) { - DeviceState *dev =3D ssi_create_slave_no_init(bus, name); + DeviceState *dev =3D qdev_new(name); =20 - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, &bus->parent_obj, &error_fatal); return dev; } =20 --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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b=OWBN9YFtjs0hrqYEQ70IJEQM5fzr4sVCaRwtb1SbgItB5sZ9EcrjgXPob0rkTbOSbWGaL7 to4xYw5y3IEznQNgoFbyknLNqb+Wo3VKoP0KgJBB3xCOqaEv5zjS0vppx0H6EP1xBJQbva 6dx9B3PDGjOwtgrxnMZj3XPbAs9p/8I= X-MC-Unique: KinAVjItO6-P14hNIqq4lA-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 25/39] ssi: ssi_create_slave_no_init() is now unused, drop Date: Tue, 9 Jun 2020 18:39:18 +0200 Message-Id: <20200609163932.1566209-26-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 02:41:53 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Alistair Francis , Alistair Francis Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Cc: Alistair Francis Signed-off-by: Markus Armbruster Reviewed-by: Alistair Francis Reviewed-by: Paolo Bonzini --- include/hw/ssi/ssi.h | 1 - hw/ssi/ssi.c | 5 ----- 2 files changed, 6 deletions(-) diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h index 1725b13c32..93f2b8b0be 100644 --- a/include/hw/ssi/ssi.h +++ b/include/hw/ssi/ssi.h @@ -79,7 +79,6 @@ extern const VMStateDescription vmstate_ssi_slave; } =20 DeviceState *ssi_create_slave(SSIBus *bus, const char *name); -DeviceState *ssi_create_slave_no_init(SSIBus *bus, const char *name); =20 /* Master interface. */ SSIBus *ssi_create_bus(DeviceState *parent, const char *name); diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c index 58e7d904db..67b48c31cd 100644 --- a/hw/ssi/ssi.c +++ b/hw/ssi/ssi.c @@ -90,11 +90,6 @@ static const TypeInfo ssi_slave_info =3D { .abstract =3D true, }; =20 -DeviceState *ssi_create_slave_no_init(SSIBus *bus, const char *name) -{ - return qdev_create(BUS(bus), name); -} - DeviceState *ssi_create_slave(SSIBus *bus, const char *name) { DeviceState *dev =3D qdev_new(name); --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Tue, 9 Jun 2020 16:39:42 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 4A6066298C; Tue, 9 Jun 2020 16:39:39 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 22FA11138470; Tue, 9 Jun 2020 18:39:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720784; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sk+IHBZNBZT41ZdBhsjLSq4VX3bqOdd0SK81Z8x+BOo=; b=AAgiGR2MFjQwXpA4aghFhlHKsJW5k05lC4TrsUq5o2sN28cQOoHiwD24iwf1I1LyQx4Ur5 siP4MgQRt7HiQXvZtGAH2Pc6fpM8yb+FstipdkV5DeXhdLXplmdu9wibJJ0FOfGYaa5Bsz f6tpFOpjZ/yMI+8ERZids77vPgnqXSA= X-MC-Unique: I2rBPvkaPb-Ln7682yxM1w-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 26/39] usb: New usb_new(), usb_realize_and_unref() Date: Tue, 9 Jun 2020 18:39:19 +0200 Message-Id: <20200609163932.1566209-27-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/08 23:42:34 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Gerd Hoffmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) I'm converting from qdev_create()/qdev_init_nofail() to qdev_new()/qdev_realize_and_unref(); recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. USB devices use qdev_create() through usb_create(). Provide usb_new() and usb_realize_and_unref() for converting USB devices. Cc: Gerd Hoffmann Signed-off-by: Markus Armbruster Reviewed-by: Gerd Hoffmann Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- include/hw/usb.h | 2 ++ hw/usb/bus.c | 10 ++++++++++ 2 files changed, 12 insertions(+) diff --git a/include/hw/usb.h b/include/hw/usb.h index 1cf1cd9584..2d2730f161 100644 --- a/include/hw/usb.h +++ b/include/hw/usb.h @@ -534,6 +534,8 @@ USBBus *usb_bus_find(int busnr); void usb_legacy_register(const char *typename, const char *usbdevice_name, USBDevice *(*usbdevice_init)(USBBus *bus, const char *params)); +USBDevice *usb_new(const char *name); +bool usb_realize_and_unref(USBDevice *dev, USBBus *bus, Error **errp); USBDevice *usb_create(USBBus *bus, const char *name); USBDevice *usb_create_simple(USBBus *bus, const char *name); USBDevice *usbdevice_create(const char *cmdline); diff --git a/hw/usb/bus.c b/hw/usb/bus.c index d28eff1b5c..6b0d9f9e4d 100644 --- a/hw/usb/bus.c +++ b/hw/usb/bus.c @@ -314,6 +314,16 @@ void usb_legacy_register(const char *typename, const c= har *usbdevice_name, } } =20 +USBDevice *usb_new(const char *name) +{ + return USB_DEVICE(qdev_new(name)); +} + +bool usb_realize_and_unref(USBDevice *dev, USBBus *bus, Error **errp) +{ + return qdev_realize_and_unref(&dev->qdev, &bus->qbus, errp); +} + USBDevice *usb_create(USBBus *bus, const char *name) { DeviceState *dev; --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591722877; cv=none; d=zohomail.com; s=zohoarc; b=jLZo+Z+NvyBe4Ic1ud++DIKYLUbgiYqSJfDOobaWNeiDX0tYQjmnVPZSuX79ApqqCeMKaf3lZAHcVLZzOAJe+6zdMlfxR6FPGZvcW65s+saBD1D+V5VvApdqqXnMHgxAk0JbTC3AZ2PzVtrovqZZ/f5PgaIf9QV+iQMxFeWUR5g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591722877; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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charset="utf-8" Replace dev =3D usb_create(bus, type_name); ... object_property_set_bool(OBJECT(dev), true, "realized", &err); by dev =3D isa_new(type_name); ... usb_realize_and_unref(dev, bus, &err); Recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. Cc: Gerd Hoffmann Signed-off-by: Markus Armbruster Reviewed-by: Gerd Hoffmann Reviewed-by: Paolo Bonzini --- include/hw/usb.h | 3 +-- hw/usb/bus.c | 11 +++++------ hw/usb/dev-serial.c | 4 ++-- 3 files changed, 8 insertions(+), 10 deletions(-) diff --git a/include/hw/usb.h b/include/hw/usb.h index 2d2730f161..86093d941a 100644 --- a/include/hw/usb.h +++ b/include/hw/usb.h @@ -532,8 +532,7 @@ void usb_bus_new(USBBus *bus, size_t bus_size, void usb_bus_release(USBBus *bus); USBBus *usb_bus_find(int busnr); void usb_legacy_register(const char *typename, const char *usbdevice_name, - USBDevice *(*usbdevice_init)(USBBus *bus, - const char *params)); + USBDevice *(*usbdevice_init)(const char *params)); USBDevice *usb_new(const char *name); bool usb_realize_and_unref(USBDevice *dev, USBBus *bus, Error **errp); USBDevice *usb_create(USBBus *bus, const char *name); diff --git a/hw/usb/bus.c b/hw/usb/bus.c index 6b0d9f9e4d..da85b8b005 100644 --- a/hw/usb/bus.c +++ b/hw/usb/bus.c @@ -296,14 +296,13 @@ typedef struct LegacyUSBFactory { const char *name; const char *usbdevice_name; - USBDevice *(*usbdevice_init)(USBBus *bus, const char *params); + USBDevice *(*usbdevice_init)(const char *params); } LegacyUSBFactory; =20 static GSList *legacy_usb_factory; =20 void usb_legacy_register(const char *typename, const char *usbdevice_name, - USBDevice *(*usbdevice_init)(USBBus *bus, - const char *params)) + USBDevice *(*usbdevice_init)(const char *params)) { if (usbdevice_name) { LegacyUSBFactory *f =3D g_malloc0(sizeof(*f)); @@ -710,19 +709,19 @@ USBDevice *usbdevice_create(const char *cmdline) } =20 if (f->usbdevice_init) { - dev =3D f->usbdevice_init(bus, params); + dev =3D f->usbdevice_init(params); } else { if (*params) { error_report("usbdevice %s accepts no params", driver); return NULL; } - dev =3D usb_create(bus, f->name); + dev =3D usb_new(f->name); } if (!dev) { error_report("Failed to create USB device '%s'", f->name); return NULL; } - object_property_set_bool(OBJECT(dev), true, "realized", &err); + usb_realize_and_unref(dev, bus, &err); if (err) { error_reportf_err(err, "Failed to initialize USB device '%s': ", f->name); diff --git a/hw/usb/dev-serial.c b/hw/usb/dev-serial.c index d2c03681b7..7e50e3ba47 100644 --- a/hw/usb/dev-serial.c +++ b/hw/usb/dev-serial.c @@ -542,7 +542,7 @@ static void usb_serial_realize(USBDevice *dev, Error **= errp) s->intr =3D usb_ep_get(dev, USB_TOKEN_IN, 1); } =20 -static USBDevice *usb_braille_init(USBBus *bus, const char *unused) +static USBDevice *usb_braille_init(const char *unused) { USBDevice *dev; Chardev *cdrv; @@ -551,7 +551,7 @@ static USBDevice *usb_braille_init(USBBus *bus, const c= har *unused) if (!cdrv) return NULL; =20 - dev =3D usb_create(bus, "usb-braille"); + dev =3D usb_new("usb-braille"); qdev_prop_set_chr(&dev->qdev, "chardev", cdrv); return dev; } --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" Cc: Gerd Hoffmann Signed-off-by: Markus Armbruster Reviewed-by: Gerd Hoffmann Reviewed-by: Paolo Bonzini --- include/hw/usb.h | 1 - hw/usb/bus.c | 8 -------- 2 files changed, 9 deletions(-) diff --git a/include/hw/usb.h b/include/hw/usb.h index 86093d941a..817dcebbef 100644 --- a/include/hw/usb.h +++ b/include/hw/usb.h @@ -535,7 +535,6 @@ void usb_legacy_register(const char *typename, const ch= ar *usbdevice_name, USBDevice *(*usbdevice_init)(const char *params)); USBDevice *usb_new(const char *name); bool usb_realize_and_unref(USBDevice *dev, USBBus *bus, Error **errp); -USBDevice *usb_create(USBBus *bus, const char *name); USBDevice *usb_create_simple(USBBus *bus, const char *name); USBDevice *usbdevice_create(const char *cmdline); void usb_register_port(USBBus *bus, USBPort *port, void *opaque, int index, diff --git a/hw/usb/bus.c b/hw/usb/bus.c index da85b8b005..5c4d31614e 100644 --- a/hw/usb/bus.c +++ b/hw/usb/bus.c @@ -323,14 +323,6 @@ bool usb_realize_and_unref(USBDevice *dev, USBBus *bus= , Error **errp) return qdev_realize_and_unref(&dev->qdev, &bus->qbus, errp); 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Tue, 9 Jun 2020 18:39:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720785; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=b+bhYUZA+wEb3bwRjAglmjNNRloUxyRB0GHFqc67kas=; b=LyqFQvFur5dV6lkm1G5ToQgA0DLOpY3PDvXlpOGJaRbRmba4yfVnFPKnWW83UCx6hTrZUR CAoiX9fzeIwBO8/pdFDYk3thwM2IZVLDvb2qbrYwnYWjYTSv/kiJVfNi/stFDh3STq03uP +CZLvVFWgPdhYlD7Fy/0kdxo57PgG84= X-MC-Unique: ZZXYHGMLNOGHsUq12XFvog-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 29/39] usb: Eliminate usb_try_create_simple() Date: Tue, 9 Jun 2020 18:39:22 +0200 Message-Id: <20200609163932.1566209-30-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" usb_try_create_simple() is qdev_try_new() and qdev_realize_and_unref() with more verbose error messages. Of its two users, one ignores errors, and the other asserts they are impossible. Make them use qdev_try_new() and qdev_realize_and_unref() directly, and eliminate usb_try_create_simple Cc: Gerd Hoffmann Signed-off-by: Markus Armbruster Reviewed-by: Gerd Hoffmann Reviewed-by: Paolo Bonzini --- hw/usb/bus.c | 37 ++++++++++++++----------------------- 1 file changed, 14 insertions(+), 23 deletions(-) diff --git a/hw/usb/bus.c b/hw/usb/bus.c index 5c4d31614e..a81aee2051 100644 --- a/hw/usb/bus.c +++ b/hw/usb/bus.c @@ -318,35 +318,22 @@ USBDevice *usb_new(const char *name) return USB_DEVICE(qdev_new(name)); } =20 +static USBDevice *usb_try_new(const char *name) +{ + return USB_DEVICE(qdev_try_new(name)); +} + bool usb_realize_and_unref(USBDevice *dev, USBBus *bus, Error **errp) { return qdev_realize_and_unref(&dev->qdev, &bus->qbus, errp); } =20 -static USBDevice *usb_try_create_simple(USBBus *bus, const char *name, - Error **errp) -{ - Error *err =3D NULL; - DeviceState *dev; - - dev =3D qdev_try_new(name); - if (!dev) { - error_setg(errp, "Failed to create USB device '%s'", name); - return NULL; - } - qdev_realize_and_unref(dev, &bus->qbus, &err); - if (err) { - error_propagate_prepend(errp, err, - "Failed to initialize USB device '%s': ", - name); - return NULL; - } - return USB_DEVICE(dev); -} - USBDevice *usb_create_simple(USBBus *bus, const char *name) { - return usb_try_create_simple(bus, name, &error_abort); + USBDevice *dev =3D usb_new(name); + + usb_realize_and_unref(dev, bus, &error_abort); + return dev; } =20 static void usb_fill_port(USBPort *port, void *opaque, int index, @@ -426,6 +413,7 @@ void usb_claim_port(USBDevice *dev, Error **errp) { USBBus *bus =3D usb_bus_from_device(dev); USBPort *port; + USBDevice *hub; =20 assert(dev->port =3D=3D NULL); =20 @@ -443,7 +431,10 @@ void usb_claim_port(USBDevice *dev, Error **errp) } else { if (bus->nfree =3D=3D 1 && strcmp(object_get_typename(OBJECT(dev))= , "usb-hub") !=3D 0) { /* Create a new hub and chain it on */ - usb_try_create_simple(bus, "usb-hub", NULL); + hub =3D usb_try_new("usb-hub"); + if (hub) { + usb_realize_and_unref(hub, bus, NULL); + } } if (bus->nfree =3D=3D 0) { error_setg(errp, "tried to attach usb device %s to a bus " --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591721936; cv=none; d=zohomail.com; s=zohoarc; b=Y7lcFl+dQXzsQqnDvXFQ+Qq/rodmnogOz5OAJzbpcG+m1M0YCeG5iRZ9F+/F2a/qK8ge/cm5jU9IfrQzaqlb8cZkA6u3Lc4aIyEwab2b5i5FDyKrRT671FOQAt/l4Nlq0NHd488daZVWM9e4oYizbMzmWor02uNJ4vyNi/gFqTg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591721936; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=O2EGvII9a8ywZHb8DbNUNZcnLOkq1u0F6R3GEOVtRlg=; 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Tue, 9 Jun 2020 18:39:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720782; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=O2EGvII9a8ywZHb8DbNUNZcnLOkq1u0F6R3GEOVtRlg=; b=UDSnvyM7EynJWnw0zErDfij5DMJEXbz8jQ7RnE/5Lak6FuefNTHTcctjtfV7apYTMJTqXz fO8wCbZ1tqaTnjkPec2dRqliAd6o8bW2DRW25u5fQUdk07sk7SqNBcKPc01vkgVYJ1X4ur n9bzfnYPbZvJ4RDdId+2j8m/bSta7tk= X-MC-Unique: ajkrB96XOkWZBz9WWEks5A-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 30/39] qdev: qdev_create(), qdev_try_create() are now unused, drop Date: Tue, 9 Jun 2020 18:39:23 +0200 Message-Id: <20200609163932.1566209-31-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Signed-off-by: Markus Armbruster Reviewed-by: Paolo Bonzini --- include/hw/qdev-core.h | 2 -- hw/core/qdev.c | 48 ------------------------------------------ hw/core/sysbus.c | 1 - migration/migration.c | 2 +- 4 files changed, 1 insertion(+), 52 deletions(-) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index be6f7c4736..ef6137b6a8 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -320,8 +320,6 @@ compat_props_add(GPtrArray *arr, =20 /*** Board API. This should go away once we have a machine config file. = ***/ =20 -DeviceState *qdev_create(BusState *bus, const char *name); -DeviceState *qdev_try_create(BusState *bus, const char *name); DeviceState *qdev_new(const char *name); DeviceState *qdev_try_new(const char *name); void qdev_init_nofail(DeviceState *dev); diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 4768244f31..a1fdebb3aa 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -128,54 +128,6 @@ void qdev_set_parent_bus(DeviceState *dev, BusState *b= us) } } =20 -/* Create a new device. This only initializes the device state - structure and allows properties to be set. The device still needs - to be realized. See qdev-core.h. */ -DeviceState *qdev_create(BusState *bus, const char *name) -{ - DeviceState *dev; - - dev =3D qdev_try_create(bus, name); - if (!dev) { - if (bus) { - error_report("Unknown device '%s' for bus '%s'", name, - object_get_typename(OBJECT(bus))); - } else { - error_report("Unknown device '%s' for default sysbus", name); - } - abort(); - } - - return dev; -} - -DeviceState *qdev_try_create(BusState *bus, const char *type) -{ - DeviceState *dev; - - if (object_class_by_name(type) =3D=3D NULL) { - return NULL; - } - dev =3D DEVICE(object_new(type)); - if (!dev) { - return NULL; - } - - if (!bus) { - /* Assert that the device really is a SysBusDevice before - * we put it onto the sysbus. Non-sysbus devices which aren't - * being put onto a bus should be created with object_new(TYPE_FOO= ), - * not qdev_create(NULL, TYPE_FOO). - */ - g_assert(object_dynamic_cast(OBJECT(dev), TYPE_SYS_BUS_DEVICE)); - bus =3D sysbus_get_default(); - } - - qdev_set_parent_bus(dev, bus); - object_unref(OBJECT(dev)); - return dev; -} - /* * Create a device on the heap. * A type @name must exist. diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index b5db0d179f..7ff1b5f2de 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -325,7 +325,6 @@ static const TypeInfo sysbus_device_type_info =3D { .class_init =3D sysbus_device_class_init, }; =20 -/* This is a nasty hack to allow passing a NULL bus to qdev_create. */ static BusState *main_system_bus; =20 static void main_system_bus_create(void) diff --git a/migration/migration.c b/migration/migration.c index b63ad91d34..481a590f72 100644 --- a/migration/migration.c +++ b/migration/migration.c @@ -3778,7 +3778,7 @@ static const TypeInfo migration_type =3D { .name =3D TYPE_MIGRATION, /* * NOTE: TYPE_MIGRATION is not really a device, as the object is - * not created using qdev_create(), it is not attached to the qdev + * not created using qdev_new(), it is not attached to the qdev * device tree, and it is never realized. * * TODO: Make this TYPE_OBJECT once QOM provides something like --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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bh=XEbUxXtlak8PlFbd1O+GsorsG1R72gpuliA8h02ZDTk=; b=BhvNq+kthHJaPGC4hCT03cMZWKjmfmE5a7jYb9NuYFGCmcn72EQsBv6th7BHizvHhiupkJ cxgB6+w6iddKYLOeYqqXJy6hS8EYamfNaroVyTgFc4Y3eeBqH0jw77Qs4xCGuUOVzwcB7E zUzaQwlZUW33l3QAO2IEqYYUHtVmPdQ= X-MC-Unique: E5G1vwlwNrKF3IsyW8XwAA-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 31/39] auxbus: Rename aux_init_bus() to aux_bus_init() Date: Tue, 9 Jun 2020 18:39:24 +0200 Message-Id: <20200609163932.1566209-32-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/08 23:42:34 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Suggested-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Markus Armbruster Reviewed-by: Paolo Bonzini --- include/hw/misc/auxbus.h | 4 ++-- hw/display/xlnx_dp.c | 2 +- hw/misc/auxbus.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/include/hw/misc/auxbus.h b/include/hw/misc/auxbus.h index a539a98c4b..5cfd7a9284 100644 --- a/include/hw/misc/auxbus.h +++ b/include/hw/misc/auxbus.h @@ -84,14 +84,14 @@ struct AUXSlave { }; =20 /** - * aux_init_bus: Initialize an AUX bus. + * aux_bus_init: Initialize an AUX bus. * * Returns the new AUX bus created. * * @parent The device where this bus is located. * @name The name of the bus. */ -AUXBus *aux_init_bus(DeviceState *parent, const char *name); +AUXBus *aux_bus_init(DeviceState *parent, const char *name); =20 /* * aux_request: Make a request on the bus. diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index 6e9793584a..31d0c5a101 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -1244,7 +1244,7 @@ static void xlnx_dp_init(Object *obj) /* * Initialize AUX Bus. */ - s->aux_bus =3D aux_init_bus(DEVICE(obj), "aux"); + s->aux_bus =3D aux_bus_init(DEVICE(obj), "aux"); =20 /* * Initialize DPCD and EDID.. diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c index 7fb020086f..2e1c27e842 100644 --- a/hw/misc/auxbus.c +++ b/hw/misc/auxbus.c @@ -62,7 +62,7 @@ static void aux_bus_class_init(ObjectClass *klass, void *= data) k->print_dev =3D aux_slave_dev_print; } =20 -AUXBus *aux_init_bus(DeviceState *parent, const char *name) +AUXBus *aux_bus_init(DeviceState *parent, const char *name) { AUXBus *bus; Object *auxtoi2c; @@ -225,7 +225,7 @@ static void aux_bridge_class_init(ObjectClass *oc, void= *data) DeviceClass *dc =3D DEVICE_CLASS(oc); =20 /* This device is private and is created only once for each - * aux-bus in aux_init_bus(..). So don't allow the user to add one. + * aux-bus in aux_bus_init(..). So don't allow the user to add one. */ dc->user_creatable =3D false; } --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591722201; cv=none; d=zohomail.com; s=zohoarc; b=n1ciZbkvcs5vxF6Pqf6KKPmItADWpkaCNqj8hXzWHvWOk12dbGNtENMpnKMf1PW2cwxntvRFbf+aLi3PTmp+pRpKaYbzzSki2zegjgCpSQHoJBrNJiDfiJ9VIHiz4/QDigUW6jaJCZQ11VwlMAO83bg9SUUsKz5gDpcAzySUwB8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591722201; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=uvtcmJhL+Fv9a9fpcc9/KYgV5i+CUCLGuiYqC0uxBX4=; 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Tue, 9 Jun 2020 18:39:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720782; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=uvtcmJhL+Fv9a9fpcc9/KYgV5i+CUCLGuiYqC0uxBX4=; b=eqcZoFrngzBgExC1bIB7GcVEaCPUcTOXKaDX6frYV1rIfAnQCigDlNdB8YFfPp1pnRwwJq +I27JS7MvacipM1Xefwi2EQRwdP2EdRRCN6gmvfuMmT5MubLW0I4OCaFuiBSqpbrhbTscP WgKp1UWV/PZ53YeLUzmfZ501cgYOHpQ= X-MC-Unique: Ou4JDeexPJ25c16H6amzLw-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 32/39] auxbus: New aux_bus_realize(), pairing with aux_bus_init() Date: Tue, 9 Jun 2020 18:39:25 +0200 Message-Id: <20200609163932.1566209-33-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/08 23:42:34 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) aux_bus_init() encapsulates the creation of an aux-bus and its aux-to-i2c-bridge device. Create aux_bus_realize() to similarly encapsulate their realization. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- include/hw/misc/auxbus.h | 7 +++++++ hw/display/xlnx_dp.c | 2 +- hw/misc/auxbus.c | 5 +++++ 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/include/hw/misc/auxbus.h b/include/hw/misc/auxbus.h index 5cfd7a9284..0d849d9d89 100644 --- a/include/hw/misc/auxbus.h +++ b/include/hw/misc/auxbus.h @@ -93,6 +93,13 @@ struct AUXSlave { */ AUXBus *aux_bus_init(DeviceState *parent, const char *name); =20 +/** + * aux_bus_realize: Realize an AUX bus. + * + * @bus: The AUX bus. + */ +void aux_bus_realize(AUXBus *bus); + /* * aux_request: Make a request on the bus. * diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index 31d0c5a101..a714cf8a50 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -1266,7 +1266,7 @@ static void xlnx_dp_realize(DeviceState *dev, Error *= *errp) DisplaySurface *surface; struct audsettings as; =20 - qdev_init_nofail(DEVICE(s->aux_bus->bridge)); + aux_bus_realize(s->aux_bus); =20 qdev_init_nofail(DEVICE(s->dpcd)); aux_map_slave(AUX_SLAVE(s->dpcd), 0x0000); diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c index 2e1c27e842..113f4278aa 100644 --- a/hw/misc/auxbus.c +++ b/hw/misc/auxbus.c @@ -81,6 +81,11 @@ AUXBus *aux_bus_init(DeviceState *parent, const char *na= me) return bus; } =20 +void aux_bus_realize(AUXBus *bus) +{ + qdev_init_nofail(DEVICE(bus->bridge)); +} + void aux_map_slave(AUXSlave *aux_dev, hwaddr addr) { DeviceState *dev =3D DEVICE(aux_dev); --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591722476; cv=none; d=zohomail.com; s=zohoarc; b=DPb2vAIeXkuVttIvfctdsxsjj0vKH8TQVnYghpw/L4KnWAz7sbN2d4HoT/yh7SI/ozUIJNca3TEUB3HE8bp2+7p9tBYttzQAlR21UbBRTCk/kRBataPBGLY1ezzaHz+K/PE6hDQvk1/lTLPHBxm0ReBHSM2WzB8uyl84pWVhP3E= ARC-Message-Signature: i=1; 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Tue, 9 Jun 2020 16:39:40 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D9DBB5D9E5; Tue, 9 Jun 2020 16:39:39 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 5F9761138477; Tue, 9 Jun 2020 18:39:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720782; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0uSbbrkYIbHdT4M5NbwKve6LKwSignSXpqv+lGxQxW4=; b=EtZX6ISCG2ssVrK4BdxJD2jgPFeKc9g+n3woKl8QAH+5SGQVp00Ep3xuQXrdEIX8mdcX9j qy8YPZx1IhU2kaqj6lUQcPLfNFS4kBMBEc5nhf8jU4vdijdB8aa4V4t1y4AYNe4BubFbv4 Q48TubhRVZVLv2+FcbAa2DRWADmNG7A= X-MC-Unique: 3Zd5_PewNGquusc9aUne6A-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 33/39] auxbus: Convert a use of qdev_set_parent_bus() Date: Tue, 9 Jun 2020 18:39:26 +0200 Message-Id: <20200609163932.1566209-34-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 01:38:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Convert qdev_set_parent_bus()/qdev_init_nofail() to qdev_realize(); recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- hw/display/xlnx_dp.c | 2 +- hw/misc/auxbus.c | 4 +--- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index a714cf8a50..884d29c8ce 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -1268,7 +1268,7 @@ static void xlnx_dp_realize(DeviceState *dev, Error *= *errp) =20 aux_bus_realize(s->aux_bus); =20 - qdev_init_nofail(DEVICE(s->dpcd)); + qdev_realize(DEVICE(s->dpcd), BUS(s->aux_bus), &error_fatal); aux_map_slave(AUX_SLAVE(s->dpcd), 0x0000); =20 qdev_realize_and_unref(DEVICE(s->edid), BUS(aux_get_i2c_bus(s->aux_bus= )), diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c index 113f4278aa..e7a5d26158 100644 --- a/hw/misc/auxbus.c +++ b/hw/misc/auxbus.c @@ -70,7 +70,6 @@ AUXBus *aux_bus_init(DeviceState *parent, const char *nam= e) bus =3D AUX_BUS(qbus_create(TYPE_AUX_BUS, parent, name)); auxtoi2c =3D object_new_with_props(TYPE_AUXTOI2C, OBJECT(bus), "i2c", &error_abort, NULL); - qdev_set_parent_bus(DEVICE(auxtoi2c), BUS(bus)); =20 bus->bridge =3D AUXTOI2C(auxtoi2c); =20 @@ -83,7 +82,7 @@ AUXBus *aux_bus_init(DeviceState *parent, const char *nam= e) =20 void aux_bus_realize(AUXBus *bus) { - qdev_init_nofail(DEVICE(bus->bridge)); + qdev_realize(DEVICE(bus->bridge), BUS(bus), &error_fatal); } =20 void aux_map_slave(AUXSlave *aux_dev, hwaddr addr) @@ -280,7 +279,6 @@ DeviceState *aux_create_slave(AUXBus *bus, const char *= type) =20 dev =3D qdev_new(type); assert(dev); - qdev_set_parent_bus(dev, &bus->qbus); return dev; } =20 --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591722307; cv=none; d=zohomail.com; s=zohoarc; b=aXaBnMY59mlR657n+J4XhQeALpe8qXOStOigfGic0wSu3iMrYezKIORCKU8ROVtX6WBY459UTXopfpDVGT8EEUePs44IHX7GLQOT1P8zIY8QqROdFPPTc9x0lV4iwfpKjF5v+xCp+RrG8WVFJKrFmZhMFl56a//VZgf4+sNCAu8= ARC-Message-Signature: i=1; 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Tue, 09 Jun 2020 13:05:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48874) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jihI1-0004M2-Qw for qemu-devel@nongnu.org; Tue, 09 Jun 2020 12:39:53 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:27537 helo=us-smtp-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jihHw-0003Db-CV for qemu-devel@nongnu.org; Tue, 09 Jun 2020 12:39:53 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-459-Bqn6Xb2RP5y_Ns-6eun56g-1; Tue, 09 Jun 2020 12:39:41 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 17E87805723 for ; Tue, 9 Jun 2020 16:39:40 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id DE4EE5C1C5; Tue, 9 Jun 2020 16:39:39 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 66F0D1138478; Tue, 9 Jun 2020 18:39:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720782; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9fUAOTJkobigbFrZ+jORnjnWiFaUvFGUlqBpIQndfuY=; b=H2WzX285+JwEXl+F3988PBvH2QNAMMFWay1FPzjMT+qpELiI21Q5GsBqDCyUc4eBHiDV7o hFWzQoPzyeusX2u+0QVQc7erkQh5Bx76H+LMni82YJ4waaVc3jPejN+ustYlwRaOebJzjI rXWhD9+2+18DE6CBwVTBKczrraS5hi0= X-MC-Unique: Bqn6Xb2RP5y_Ns-6eun56g-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 34/39] auxbus: Eliminate aux_create_slave() Date: Tue, 9 Jun 2020 18:39:27 +0200 Message-Id: <20200609163932.1566209-35-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 01:38:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) aux_create_slave() has become a trivial wrapper around qdev_new(). There's just one user. Eliminate. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- include/hw/misc/auxbus.h | 7 ------- hw/display/xlnx_dp.c | 2 +- hw/misc/auxbus.c | 9 --------- 3 files changed, 1 insertion(+), 17 deletions(-) diff --git a/include/hw/misc/auxbus.h b/include/hw/misc/auxbus.h index 0d849d9d89..15a8973517 100644 --- a/include/hw/misc/auxbus.h +++ b/include/hw/misc/auxbus.h @@ -131,13 +131,6 @@ I2CBus *aux_get_i2c_bus(AUXBus *bus); */ void aux_init_mmio(AUXSlave *aux_slave, MemoryRegion *mmio); =20 -/* aux_create_slave: Create a new device on an AUX bus - * - * @bus The AUX bus for the new device. - * @name The type of the device to be created. - */ -DeviceState *aux_create_slave(AUXBus *bus, const char *name); - /* aux_map_slave: Map the mmio for an AUX slave on the bus. * * @dev The AUX slave. diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index 884d29c8ce..c56e6ec593 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -1249,7 +1249,7 @@ static void xlnx_dp_init(Object *obj) /* * Initialize DPCD and EDID.. */ - s->dpcd =3D DPCD(aux_create_slave(s->aux_bus, "dpcd")); + s->dpcd =3D DPCD(qdev_new("dpcd")); object_property_add_child(OBJECT(s), "dpcd", OBJECT(s->dpcd)); =20 s->edid =3D I2CDDC(qdev_new("i2c-ddc")); diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c index e7a5d26158..d631266903 100644 --- a/hw/misc/auxbus.c +++ b/hw/misc/auxbus.c @@ -273,15 +273,6 @@ static void aux_slave_dev_print(Monitor *mon, DeviceSt= ate *dev, int indent) memory_region_size(s->mmio)); } =20 -DeviceState *aux_create_slave(AUXBus *bus, const char *type) -{ - DeviceState *dev; - - dev =3D qdev_new(type); - assert(dev); - return dev; -} - void aux_init_mmio(AUXSlave *aux_slave, MemoryRegion *mmio) { assert(!aux_slave->mmio); --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Tue, 9 Jun 2020 16:39:40 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 254C35D9E5; Tue, 9 Jun 2020 16:39:40 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 6E78D1138479; Tue, 9 Jun 2020 18:39:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720783; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YWkWc6vooh5IZVIOgsme423sDErd0K76fH6OrNcEukU=; b=ZHie+irSUrULAIRrfZj5lNs+0uNlWXa5X38atv5Ee3Vt11wD5TXqTpb3Nxn0R4eHeFAizs LB6DDfMoah1DgjFvQrr8ztZgIa3nyzrG/1EAlnZIkpTnPu9dzO3gbMijK7dzRloDwgUYSk RFHfq4jlPUY/Xij55cxGzcRbQD9CCV4= X-MC-Unique: _qLuVdesPte40ewzUyACaQ-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 35/39] qom: Tidy up a few object_initialize_child() calls Date: Tue, 9 Jun 2020 18:39:28 +0200 Message-Id: <20200609163932.1566209-36-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 01:38:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alistair Francis , Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) The callers of object_initialize_child() commonly pass either &child, sizeof(child), or pchild, sizeof(*pchild). Tidy up the few that don't, mostly to keep the next commit simpler. Signed-off-by: Markus Armbruster Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- hw/arm/aspeed.c | 2 +- hw/microblaze/xlnx-zynqmp-pmu.c | 3 +-- hw/pci-host/pnv_phb4.c | 2 +- hw/riscv/riscv_hart.c | 2 +- 4 files changed, 4 insertions(+), 5 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 9c25d5da96..296057b1ab 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -268,7 +268,7 @@ static void aspeed_machine_init(MachineState *machine) memory_region_add_subregion(&bmc->ram_container, 0, machine->ram); =20 object_initialize_child(OBJECT(machine), "soc", &bmc->soc, - (sizeof(bmc->soc)), amc->soc_name, &error_abor= t, + sizeof(bmc->soc), amc->soc_name, &error_abort, NULL); =20 sc =3D ASPEED_SOC_GET_CLASS(&bmc->soc); diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pm= u.c index 028f31894d..aa90b9d1be 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -174,8 +174,7 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine) pmu_ram); =20 /* Create the PMU device */ - object_initialize_child(OBJECT(machine), "pmu", pmu, - sizeof(XlnxZynqMPPMUSoCState), + object_initialize_child(OBJECT(machine), "pmu", pmu, sizeof(*pmu), TYPE_XLNX_ZYNQMP_PMU_SOC, &error_abort, NULL); object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal); =20 diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index e30ae9ad5b..aba710fd1f 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1155,7 +1155,7 @@ static void pnv_phb4_instance_init(Object *obj) QLIST_INIT(&phb->dma_spaces); =20 /* XIVE interrupt source object */ - object_initialize_child(obj, "source", &phb->xsrc, sizeof(XiveSource), + object_initialize_child(obj, "source", &phb->xsrc, sizeof(phb->xsrc), TYPE_XIVE_SOURCE, &error_abort, NULL); =20 /* Root Port */ diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c index 276a9baca0..61e88e2e37 100644 --- a/hw/riscv/riscv_hart.c +++ b/hw/riscv/riscv_hart.c @@ -46,7 +46,7 @@ static void riscv_hart_realize(RISCVHartArrayState *s, in= t idx, Error *err =3D NULL; =20 object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx], - sizeof(RISCVCPU), cpu_type, + sizeof(s->harts[idx]), cpu_type, &error_abort, NULL); s->harts[idx].env.mhartid =3D s->hartid_base + idx; qemu_register_reset(riscv_harts_cpu_reset, &s->harts[idx]); --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591722752; cv=none; d=zohomail.com; s=zohoarc; b=KDBh2sWHGXkRmF/CoILAgSR7j55W1xhzh3lW0sQURzyAfKs+zbUcsYonG3jNcOAGvXSAiNVum6DF5u8CJW2kH4BR7Z+0vgaElqsPtv1y/VXjRLFogPwnjBQJM9f/UjR3O0Jv2odnHYg1SVjEBGYWQY+OWXhlL1LInuJ3tc6A84g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591722752; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Tue, 9 Jun 2020 18:39:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720784; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=TfMpbtd565QgXoFt7VBVW5+7PnXpXgKEEU1HQhW9pi4=; b=CoZvtzbMcKzATkdikWPVB4D1yf5vGRHNp+1m753mFEILe7H0NpYmqwcb1yIWZ2fqIDbFtk 4ReIFZ3mznookZXLkcDDPkRaIYPQdDOTVTWT5wVK+0oLUQKk/mg0i2DG8YSIzJNvyNXENe SbbdT+syK3/5FXOiMETmY2wfnW9BD+w= X-MC-Unique: XJBR3vrJMzWKqXogEpXZxw-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 36/39] qom: Less verbose object_initialize_child() Date: Tue, 9 Jun 2020 18:39:29 +0200 Message-Id: <20200609163932.1566209-37-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 01:38:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Alistair Francis Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" All users of object_initialize_child() pass the obvious child size argument. Almost all pass &error_abort and no properties. Tiresome. Rename object_initialize_child() to object_initialize_child_with_props() to free the name. New convenience wrapper object_initialize_child() automates the size argument, and passes &error_abort and no properties. Rename object_initialize_childv() to object_initialize_child_with_propsv() for consistency. Convert callers with this Coccinelle script: @@ expression parent, propname, type; expression child, size; symbol error_abort; @@ - object_initialize_child(parent, propname, OBJECT(child), size, typ= e, &error_abort, NULL) + object_initialize_child(parent, propname, child, size, type, &erro= r_abort, NULL) @@ expression parent, propname, type; expression child; symbol error_abort; @@ - object_initialize_child(parent, propname, child, sizeof(*child), t= ype, &error_abort, NULL) + object_initialize_child(parent, propname, child, type) @@ expression parent, propname, type; expression child; symbol error_abort; @@ - object_initialize_child(parent, propname, &child, sizeof(child), t= ype, &error_abort, NULL) + object_initialize_child(parent, propname, &child, type) @@ expression parent, propname, type; expression child, size, err; expression list props; @@ - object_initialize_child(parent, propname, child, size, type, err, = props) + object_initialize_child_with_props(parent, propname, child, size, = type, err, props) Note that Coccinelle chokes on ARMSSE typedef vs. macro in hw/arm/armsse.c. Worked around by temporarily renaming the macro for the spatch run. Signed-off-by: Markus Armbruster Acked-by: Alistair Francis [Rebased: machine opentitan is new (commit fe0fe4735e7)] Reviewed-by: Paolo Bonzini --- include/qom/object.h | 30 +++++++++++++++++++---- hw/arm/allwinner-a10.c | 5 ++-- hw/arm/allwinner-h3.c | 5 ++-- hw/arm/armsse.c | 26 +++++++------------- hw/arm/aspeed.c | 4 +--- hw/arm/aspeed_ast2600.c | 4 +--- hw/arm/aspeed_soc.c | 4 +--- hw/arm/bcm2836.c | 3 +-- hw/arm/digic.c | 4 +--- hw/arm/exynos4210.c | 3 +-- hw/arm/fsl-imx25.c | 4 +--- hw/arm/fsl-imx31.c | 4 +--- hw/arm/fsl-imx6.c | 5 ++-- hw/arm/fsl-imx6ul.c | 4 ++-- hw/arm/fsl-imx7.c | 5 ++-- hw/arm/imx25_pdk.c | 3 +-- hw/arm/kzm.c | 3 +-- hw/arm/mps2-tz.c | 14 +++++------ hw/arm/musca.c | 14 +++++------ hw/arm/raspi.c | 4 ++-- hw/arm/stm32f405_soc.c | 6 ++--- hw/arm/xlnx-versal.c | 5 ++-- hw/arm/xlnx-zcu102.c | 3 +-- hw/arm/xlnx-zynqmp.c | 16 +++++-------- hw/char/serial-isa.c | 3 +-- hw/char/serial-pci-multi.c | 4 +--- hw/char/serial-pci.c | 3 +-- hw/char/serial.c | 6 ++--- hw/core/sysbus.c | 4 ++-- hw/dma/xilinx_axidma.c | 9 +++---- hw/intc/pnv_xive.c | 6 ++--- hw/intc/spapr_xive.c | 6 ++--- hw/microblaze/xlnx-zynqmp-pmu.c | 7 +++--- hw/misc/macio/macio.c | 10 ++++---- hw/net/xilinx_axienet.c | 9 +++---- hw/pci-host/designware.c | 3 +-- hw/pci-host/gpex.c | 3 +-- hw/pci-host/pnv_phb3.c | 12 ++++------ hw/pci-host/pnv_phb4.c | 6 ++--- hw/pci-host/pnv_phb4_pec.c | 6 ++--- hw/pci-host/q35.c | 3 +-- hw/pci-host/xilinx-pcie.c | 3 +-- hw/ppc/pnv.c | 42 ++++++++++++--------------------- hw/ppc/pnv_psi.c | 6 ++--- hw/ppc/spapr.c | 6 ++--- hw/riscv/opentitan.c | 3 +-- hw/riscv/riscv_hart.c | 4 +--- hw/riscv/sifive_e.c | 4 +--- hw/riscv/sifive_u.c | 12 +++------- hw/virtio/virtio.c | 5 ++-- qom/object.c | 19 +++++++++++---- 51 files changed, 161 insertions(+), 221 deletions(-) diff --git a/include/qom/object.h b/include/qom/object.h index b3eb05d65d..9ce6c9c460 100644 --- a/include/qom/object.h +++ b/include/qom/object.h @@ -783,7 +783,7 @@ int object_set_propv(Object *obj, void object_initialize(void *obj, size_t size, const char *typename); =20 /** - * object_initialize_child: + * object_initialize_child_with_props: * @parentobj: The parent object to add a property to * @propname: The name of the property * @childobj: A pointer to the memory to be used for the object. @@ -803,12 +803,13 @@ void object_initialize(void *obj, size_t size, const = char *typename); * If the object implements the user creatable interface, the object will * be marked complete once all the properties have been processed. */ -void object_initialize_child(Object *parentobj, const char *propname, +void object_initialize_child_with_props(Object *parentobj, + const char *propname, void *childobj, size_t size, const char *type, Error **errp, ...) QEMU_SENTINEL; =20 /** - * object_initialize_childv: + * object_initialize_child_with_propsv: * @parentobj: The parent object to add a property to * @propname: The name of the property * @childobj: A pointer to the memory to be used for the object. @@ -819,10 +820,31 @@ void object_initialize_child(Object *parentobj, const= char *propname, * * See object_initialize_child() for documentation. */ -void object_initialize_childv(Object *parentobj, const char *propname, +void object_initialize_child_with_propsv(Object *parentobj, + const char *propname, void *childobj, size_t size, const char *typ= e, Error **errp, va_list vargs); =20 +/** + * object_initialize_child: + * @parent: The parent object to add a property to + * @propname: The name of the property + * @child: A precisely typed pointer to the memory to be used for the + * object. + * @type: The name of the type of the object to instantiate. + * + * This is like + * object_initialize_child_with_props(parent, propname, + * child, sizeof(*child), type, + * &error_abort, NULL) + */ +#define object_initialize_child(parent, propname, child, type) \ + object_initialize_child_internal((parent), (propname), \ + (child), sizeof(*(child)), (type)) +void object_initialize_child_internal(Object *parent, const char *propname, + void *child, size_t size, + const char *type); + /** * object_dynamic_cast: * @obj: The object to cast. diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c index 6e1329a4a2..49c51463e1 100644 --- a/hw/arm/allwinner-a10.c +++ b/hw/arm/allwinner-a10.c @@ -41,9 +41,8 @@ static void aw_a10_init(Object *obj) { AwA10State *s =3D AW_A10(obj); =20 - object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu), - ARM_CPU_TYPE_NAME("cortex-a8"), - &error_abort, NULL); + object_initialize_child(obj, "cpu", &s->cpu, + ARM_CPU_TYPE_NAME("cortex-a8")); =20 sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc), TYPE_AW_A10_PIC); diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c index f10674da5a..7dc3671155 100644 --- a/hw/arm/allwinner-h3.c +++ b/hw/arm/allwinner-h3.c @@ -194,9 +194,8 @@ static void allwinner_h3_init(Object *obj) s->memmap =3D allwinner_h3_memmap; =20 for (int i =3D 0; i < AW_H3_NUM_CPUS; i++) { - object_initialize_child(obj, "cpu[*]", &s->cpus[i], sizeof(s->cpus= [i]), - ARM_CPU_TYPE_NAME("cortex-a7"), - &error_abort, NULL); + object_initialize_child(obj, "cpu[*]", &s->cpus[i], + ARM_CPU_TYPE_NAME("cortex-a7")); } =20 sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 174ca7effc..c903e725f7 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -251,9 +251,7 @@ static void armsse_init(Object *obj) char *name; =20 name =3D g_strdup_printf("cluster%d", i); - object_initialize_child(obj, name, &s->cluster[i], - sizeof(s->cluster[i]), TYPE_CPU_CLUSTER, - &error_abort, NULL); + object_initialize_child(obj, name, &s->cluster[i], TYPE_CPU_CLUSTE= R); qdev_prop_set_uint32(DEVICE(&s->cluster[i]), "cluster-id", i); g_free(name); =20 @@ -287,15 +285,13 @@ static void armsse_init(Object *obj) g_free(name); } object_initialize_child(obj, "mpc-irq-orgate", &s->mpc_irq_orgate, - sizeof(s->mpc_irq_orgate), TYPE_OR_IRQ, - &error_abort, NULL); + TYPE_OR_IRQ); =20 for (i =3D 0; i < IOTS_NUM_EXP_MPC + info->sram_banks; i++) { char *name =3D g_strdup_printf("mpc-irq-splitter-%d", i); SplitIRQ *splitter =3D &s->mpc_irq_splitter[i]; =20 - object_initialize_child(obj, name, splitter, sizeof(*splitter), - TYPE_SPLIT_IRQ, &error_abort, NULL); + object_initialize_child(obj, name, splitter, TYPE_SPLIT_IRQ); g_free(name); } sysbus_init_child_obj(obj, "timer0", &s->timer0, sizeof(s->timer0), @@ -375,21 +371,16 @@ static void armsse_init(Object *obj) g_free(name); } } - object_initialize_child(obj, "nmi-orgate", &s->nmi_orgate, - sizeof(s->nmi_orgate), TYPE_OR_IRQ, - &error_abort, NULL); + object_initialize_child(obj, "nmi-orgate", &s->nmi_orgate, TYPE_OR_IRQ= ); object_initialize_child(obj, "ppc-irq-orgate", &s->ppc_irq_orgate, - sizeof(s->ppc_irq_orgate), TYPE_OR_IRQ, - &error_abort, NULL); + TYPE_OR_IRQ); object_initialize_child(obj, "sec-resp-splitter", &s->sec_resp_splitte= r, - sizeof(s->sec_resp_splitter), TYPE_SPLIT_IRQ, - &error_abort, NULL); + TYPE_SPLIT_IRQ); for (i =3D 0; i < ARRAY_SIZE(s->ppc_irq_splitter); i++) { char *name =3D g_strdup_printf("ppc-irq-splitter-%d", i); SplitIRQ *splitter =3D &s->ppc_irq_splitter[i]; =20 - object_initialize_child(obj, name, splitter, sizeof(*splitter), - TYPE_SPLIT_IRQ, &error_abort, NULL); + object_initialize_child(obj, name, splitter, TYPE_SPLIT_IRQ); g_free(name); } if (info->num_cpus > 1) { @@ -398,8 +389,7 @@ static void armsse_init(Object *obj) char *name =3D g_strdup_printf("cpu-irq-splitter%d", i); SplitIRQ *splitter =3D &s->cpu_irq_splitter[i]; =20 - object_initialize_child(obj, name, splitter, sizeof(*split= ter), - TYPE_SPLIT_IRQ, &error_abort, NULL= ); + object_initialize_child(obj, name, splitter, TYPE_SPLIT_IR= Q); g_free(name); } } diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 296057b1ab..c548d24621 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -267,9 +267,7 @@ static void aspeed_machine_init(MachineState *machine) UINT32_MAX); memory_region_add_subregion(&bmc->ram_container, 0, machine->ram); =20 - object_initialize_child(OBJECT(machine), "soc", &bmc->soc, - sizeof(bmc->soc), amc->soc_name, &error_abort, - NULL); + object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_na= me); =20 sc =3D ASPEED_SOC_GET_CLASS(&bmc->soc); =20 diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index b912d19f80..beb688fd8f 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -127,9 +127,7 @@ static void aspeed_soc_ast2600_init(Object *obj) } =20 for (i =3D 0; i < sc->num_cpus; i++) { - object_initialize_child(obj, "cpu[*]", OBJECT(&s->cpu[i]), - sizeof(s->cpu[i]), sc->cpu_type, - &error_abort, NULL); + object_initialize_child(obj, "cpu[*]", &s->cpu[i], sc->cpu_type); } =20 snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 3ec1257c14..18d1763aba 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -142,9 +142,7 @@ static void aspeed_soc_init(Object *obj) } =20 for (i =3D 0; i < sc->num_cpus; i++) { - object_initialize_child(obj, "cpu[*]", OBJECT(&s->cpu[i]), - sizeof(s->cpu[i]), sc->cpu_type, - &error_abort, NULL); + object_initialize_child(obj, "cpu[*]", &s->cpu[i], sc->cpu_type); } =20 snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index e51b4e0c43..82cd1d2df8 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -53,8 +53,7 @@ static void bcm2836_init(Object *obj) =20 for (n =3D 0; n < BCM283X_NCPUS; n++) { object_initialize_child(obj, "cpu[*]", &s->cpu[n].core, - sizeof(s->cpu[n].core), info->cpu_type, - &error_abort, NULL); + info->cpu_type); } =20 sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control), diff --git a/hw/arm/digic.c b/hw/arm/digic.c index 22434a65a2..6153d5f108 100644 --- a/hw/arm/digic.c +++ b/hw/arm/digic.c @@ -36,9 +36,7 @@ static void digic_init(Object *obj) DigicState *s =3D DIGIC(obj); int i; =20 - object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu), - ARM_CPU_TYPE_NAME("arm946"), - &error_abort, NULL); + object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm946= ")); =20 for (i =3D 0; i < DIGIC4_NB_TIMERS; i++) { #define DIGIC_TIMER_NAME_MLEN 11 diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 9ff1a11f80..86cbd63857 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -482,8 +482,7 @@ static void exynos4210_init(Object *obj) char *name =3D g_strdup_printf("pl330-irq-orgate%d", i); qemu_or_irq *orgate =3D &s->pl330_irq_orgate[i]; =20 - object_initialize_child(obj, name, orgate, sizeof(*orgate), - TYPE_OR_IRQ, &error_abort, NULL); + object_initialize_child(obj, name, orgate, TYPE_OR_IRQ); g_free(name); } } diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index cdaa79c26b..d8340e3527 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -38,9 +38,7 @@ static void fsl_imx25_init(Object *obj) FslIMX25State *s =3D FSL_IMX25(obj); int i; =20 - object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu), - ARM_CPU_TYPE_NAME("arm926"), - &error_abort, NULL); + object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm926= ")); =20 sysbus_init_child_obj(obj, "avic", &s->avic, sizeof(s->avic), TYPE_IMX_AVIC); diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c index 1e7959863d..54eec89701 100644 --- a/hw/arm/fsl-imx31.c +++ b/hw/arm/fsl-imx31.c @@ -33,9 +33,7 @@ static void fsl_imx31_init(Object *obj) FslIMX31State *s =3D FSL_IMX31(obj); int i; =20 - object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu), - ARM_CPU_TYPE_NAME("arm1136"), - &error_abort, NULL); + object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm113= 6")); =20 sysbus_init_child_obj(obj, "avic", &s->avic, sizeof(s->avic), TYPE_IMX_AVIC); diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index f58c85aa8c..88fbba84a4 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -43,9 +43,8 @@ static void fsl_imx6_init(Object *obj) =20 for (i =3D 0; i < MIN(ms->smp.cpus, FSL_IMX6_NUM_CPUS); i++) { snprintf(name, NAME_SIZE, "cpu%d", i); - object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]), - ARM_CPU_TYPE_NAME("cortex-a9"), - &error_abort, NULL); + object_initialize_child(obj, name, &s->cpu[i], + ARM_CPU_TYPE_NAME("cortex-a9")); } =20 sysbus_init_child_obj(obj, "a9mpcore", &s->a9mpcore, sizeof(s->a9mpcor= e), diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index 3ecb212da6..491f1b7f73 100644 --- a/hw/arm/fsl-imx6ul.c +++ b/hw/arm/fsl-imx6ul.c @@ -34,8 +34,8 @@ static void fsl_imx6ul_init(Object *obj) char name[NAME_SIZE]; int i; =20 - object_initialize_child(obj, "cpu0", &s->cpu, sizeof(s->cpu), - ARM_CPU_TYPE_NAME("cortex-a7"), &error_abort, = NULL); + object_initialize_child(obj, "cpu0", &s->cpu, + ARM_CPU_TYPE_NAME("cortex-a7")); =20 /* * A7MPCORE diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index 89c3b64c06..5cf2b7a808 100644 --- a/hw/arm/fsl-imx7.c +++ b/hw/arm/fsl-imx7.c @@ -38,9 +38,8 @@ static void fsl_imx7_init(Object *obj) =20 for (i =3D 0; i < MIN(ms->smp.cpus, FSL_IMX7_NUM_CPUS); i++) { snprintf(name, NAME_SIZE, "cpu%d", i); - object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]), - ARM_CPU_TYPE_NAME("cortex-a7"), &error_abo= rt, - NULL); + object_initialize_child(obj, name, &s->cpu[i], + ARM_CPU_TYPE_NAME("cortex-a7")); } =20 /* diff --git a/hw/arm/imx25_pdk.c b/hw/arm/imx25_pdk.c index 75076f2ea4..69b95711e4 100644 --- a/hw/arm/imx25_pdk.c +++ b/hw/arm/imx25_pdk.c @@ -73,8 +73,7 @@ static void imx25_pdk_init(MachineState *machine) unsigned int alias_offset; int i; =20 - object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc= ), - TYPE_FSL_IMX25, &error_abort, NULL); + object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX2= 5); =20 object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fat= al); =20 diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c index 34f6bcb491..0275d63079 100644 --- a/hw/arm/kzm.c +++ b/hw/arm/kzm.c @@ -71,8 +71,7 @@ static void kzm_init(MachineState *machine) unsigned int alias_offset; unsigned int i; =20 - object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc= ), - TYPE_FSL_IMX31, &error_abort, NULL); + object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX3= 1); =20 object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fat= al); =20 diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 07d11e439f..8a050228d0 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -414,9 +414,10 @@ static void mps2tz_common_init(MachineState *machine) char *name =3D g_strdup_printf("mps2-irq-splitter%d", i); SplitIRQ *splitter =3D &mms->cpu_irq_splitter[i]; =20 - object_initialize_child(OBJECT(machine), name, - splitter, sizeof(*splitter), - TYPE_SPLIT_IRQ, &error_fatal, NULL); + object_initialize_child_with_props(OBJECT(machine), name, + splitter, sizeof(*splitter), + TYPE_SPLIT_IRQ, &error_fata= l, + NULL); g_free(name); =20 object_property_set_int(OBJECT(splitter), 2, "num-lines", @@ -436,9 +437,7 @@ static void mps2tz_common_init(MachineState *machine) * lines, one for each of the PPCs we create here, plus one per MSC. */ object_initialize_child(OBJECT(machine), "sec-resp-splitter", - &mms->sec_resp_splitter, - sizeof(mms->sec_resp_splitter), - TYPE_SPLIT_IRQ, &error_abort, NULL); + &mms->sec_resp_splitter, TYPE_SPLIT_IRQ); object_property_set_int(OBJECT(&mms->sec_resp_splitter), ARRAY_SIZE(mms->ppc) + ARRAY_SIZE(mms->msc), "num-lines", &error_fatal); @@ -472,8 +471,7 @@ static void mps2tz_common_init(MachineState *machine) * Create the OR gate for this. */ object_initialize_child(OBJECT(mms), "uart-irq-orgate", - &mms->uart_irq_orgate, sizeof(mms->uart_irq_or= gate), - TYPE_OR_IRQ, &error_abort, NULL); + &mms->uart_irq_orgate, TYPE_OR_IRQ); object_property_set_int(OBJECT(&mms->uart_irq_orgate), 10, "num-lines", &error_fatal); object_property_set_bool(OBJECT(&mms->uart_irq_orgate), true, diff --git a/hw/arm/musca.c b/hw/arm/musca.c index ba99dd1941..cd7df7c191 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -404,9 +404,9 @@ static void musca_init(MachineState *machine) char *name =3D g_strdup_printf("musca-irq-splitter%d", i); SplitIRQ *splitter =3D &mms->cpu_irq_splitter[i]; =20 - object_initialize_child(OBJECT(machine), name, - splitter, sizeof(*splitter), - TYPE_SPLIT_IRQ, &error_fatal, NULL); + object_initialize_child_with_props(OBJECT(machine), name, splitter, + sizeof(*splitter), TYPE_SPLIT_I= RQ, + &error_fatal, NULL); g_free(name); =20 object_property_set_int(OBJECT(splitter), 2, "num-lines", @@ -424,10 +424,10 @@ static void musca_init(MachineState *machine) * The sec_resp_cfg output from the SSE-200 must be split into multiple * lines, one for each of the PPCs we create here. */ - object_initialize_child(OBJECT(machine), "sec-resp-splitter", - &mms->sec_resp_splitter, - sizeof(mms->sec_resp_splitter), - TYPE_SPLIT_IRQ, &error_fatal, NULL); + object_initialize_child_with_props(OBJECT(machine), "sec-resp-splitter= ", + &mms->sec_resp_splitter, + sizeof(mms->sec_resp_splitter), + TYPE_SPLIT_IRQ, &error_fatal, NULL); =20 object_property_set_int(OBJECT(&mms->sec_resp_splitter), ARRAY_SIZE(mms->ppc), "num-lines", &error_fata= l); diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index a8e26a70bb..78cb995251 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -282,8 +282,8 @@ static void raspi_machine_init(MachineState *machine) machine->ram, 0); =20 /* Setup the SOC */ - object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc= ), - board_soc_type(board_rev), &error_abort, NULL); + object_initialize_child(OBJECT(machine), "soc", &s->soc, + board_soc_type(board_rev)); object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(machine-= >ram)); object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev", &error_abort); diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c index c9a530eecf..33a83bd1d4 100644 --- a/hw/arm/stm32f405_soc.c +++ b/hw/arm/stm32f405_soc.c @@ -169,9 +169,9 @@ static void stm32f405_soc_realize(DeviceState *dev_soc,= Error **errp) } =20 /* ADC device, the IRQs are ORed together */ - object_initialize_child(OBJECT(s), "adc-orirq", &s->adc_irqs, - sizeof(s->adc_irqs), TYPE_OR_IRQ, - &err, NULL); + object_initialize_child_with_props(OBJECT(s), "adc-orirq", &s->adc_irq= s, + sizeof(s->adc_irqs), TYPE_OR_IRQ, &= err, + NULL); if (err !=3D NULL) { error_propagate(errp, err); return; diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index c3d47bb9e9..12e4469cf4 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -32,9 +32,8 @@ static void versal_create_apu_cpus(Versal *s) for (i =3D 0; i < ARRAY_SIZE(s->fpd.apu.cpu); i++) { Object *obj; =20 - object_initialize_child(OBJECT(s), "apu-cpu[*]", - &s->fpd.apu.cpu[i], sizeof(s->fpd.apu.cpu[= i]), - XLNX_VERSAL_ACPU_TYPE, &error_abort, NULL); + object_initialize_child(OBJECT(s), "apu-cpu[*]", &s->fpd.apu.cpu[i= ], + XLNX_VERSAL_ACPU_TYPE); obj =3D OBJECT(&s->fpd.apu.cpu[i]); object_property_set_int(obj, s->cfg.psci_conduit, "psci-conduit", &error_abort); diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index 77c84b82ab..822e24af65 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -116,8 +116,7 @@ static void xlnx_zcu102_init(MachineState *machine) ram_size); } =20 - object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc= ), - TYPE_XLNX_ZYNQMP, &error_abort, NULL); + object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_XLNX_ZYN= QMP); =20 object_property_set_link(OBJECT(&s->soc), OBJECT(machine->ram), "ddr-ram", &error_abort); diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index f08abf60d7..890139d6a2 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -187,17 +187,15 @@ static void xlnx_zynqmp_create_rpu(MachineState *ms, = XlnxZynqMPState *s, } =20 object_initialize_child(OBJECT(s), "rpu-cluster", &s->rpu_cluster, - sizeof(s->rpu_cluster), TYPE_CPU_CLUSTER, - &error_abort, NULL); + TYPE_CPU_CLUSTER); qdev_prop_set_uint32(DEVICE(&s->rpu_cluster), "cluster-id", 1); =20 for (i =3D 0; i < num_rpus; i++) { char *name; =20 object_initialize_child(OBJECT(&s->rpu_cluster), "rpu-cpu[*]", - &s->rpu_cpu[i], sizeof(s->rpu_cpu[i]), - ARM_CPU_TYPE_NAME("cortex-r5f"), - &error_abort, NULL); + &s->rpu_cpu[i], + ARM_CPU_TYPE_NAME("cortex-r5f")); =20 name =3D object_get_canonical_path_component(OBJECT(&s->rpu_cpu[i]= )); if (strcmp(name, boot_cpu)) { @@ -230,15 +228,13 @@ static void xlnx_zynqmp_init(Object *obj) int num_apus =3D MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS); =20 object_initialize_child(obj, "apu-cluster", &s->apu_cluster, - sizeof(s->apu_cluster), TYPE_CPU_CLUSTER, - &error_abort, NULL); + TYPE_CPU_CLUSTER); qdev_prop_set_uint32(DEVICE(&s->apu_cluster), "cluster-id", 0); =20 for (i =3D 0; i < num_apus; i++) { object_initialize_child(OBJECT(&s->apu_cluster), "apu-cpu[*]", - &s->apu_cpu[i], sizeof(s->apu_cpu[i]), - ARM_CPU_TYPE_NAME("cortex-a53"), - &error_abort, NULL); + &s->apu_cpu[i], + ARM_CPU_TYPE_NAME("cortex-a53")); } =20 sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index f13dd98c60..7630a874a8 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -114,8 +114,7 @@ static void serial_isa_initfn(Object *o) { ISASerialState *self =3D ISA_SERIAL(o); =20 - object_initialize_child(o, "serial", &self->state, sizeof(self->state), - TYPE_SERIAL, &error_abort, NULL); + object_initialize_child(o, "serial", &self->state, TYPE_SERIAL); } =20 static const TypeInfo serial_isa_info =3D { diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 23d0ebe2cd..1d65d64c4e 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -187,9 +187,7 @@ static void multi_serial_init(Object *o) size_t i, nports =3D multi_serial_get_port_count(PCI_DEVICE_GET_CLASS(= dev)); =20 for (i =3D 0; i < nports; i++) { - object_initialize_child(o, "serial[*]", &pms->state[i], - sizeof(pms->state[i]), - TYPE_SERIAL, &error_abort, NULL); + object_initialize_child(o, "serial[*]", &pms->state[i], TYPE_SERIA= L); } } =20 diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index 65eacfae0e..5f5ff10a75 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -108,8 +108,7 @@ static void serial_pci_init(Object *o) { PCISerialState *ps =3D PCI_SERIAL(o); =20 - object_initialize_child(o, "serial", &ps->state, sizeof(ps->state), - TYPE_SERIAL, &error_abort, NULL); + object_initialize_child(o, "serial", &ps->state, TYPE_SERIAL); } =20 static const TypeInfo serial_pci_info =3D { diff --git a/hw/char/serial.c b/hw/char/serial.c index a0cab38fb0..57c299e993 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1014,8 +1014,7 @@ static void serial_io_instance_init(Object *o) { SerialIO *sio =3D SERIAL_IO(o); =20 - object_initialize_child(o, "serial", &sio->serial, sizeof(sio->serial), - TYPE_SERIAL, &error_abort, NULL); + object_initialize_child(o, "serial", &sio->serial, TYPE_SERIAL); =20 qdev_alias_all_properties(DEVICE(&sio->serial), o); } @@ -1148,8 +1147,7 @@ static void serial_mm_instance_init(Object *o) { SerialMM *smm =3D SERIAL_MM(o); =20 - object_initialize_child(o, "serial", &smm->serial, sizeof(smm->serial), - TYPE_SERIAL, &error_abort, NULL); + object_initialize_child(o, "serial", &smm->serial, TYPE_SERIAL); =20 qdev_alias_all_properties(DEVICE(&smm->serial), o); } diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index 7ff1b5f2de..e8d08d349b 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -348,8 +348,8 @@ BusState *sysbus_get_default(void) void sysbus_init_child_obj(Object *parent, const char *childname, void *ch= ild, size_t childsize, const char *childtype) { - object_initialize_child(parent, childname, child, childsize, childtype, - &error_abort, NULL); + object_initialize_child_with_props(parent, childname, child, childsize, + childtype, &error_abort, NULL); qdev_set_parent_bus(DEVICE(child), sysbus_get_default()); } =20 diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index 460102b142..6a9df2c4db 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -579,13 +579,10 @@ static void xilinx_axidma_init(Object *obj) SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); =20 object_initialize_child(OBJECT(s), "axistream-connected-target", - &s->rx_data_dev, sizeof(s->rx_data_dev), - TYPE_XILINX_AXI_DMA_DATA_STREAM, &error_abort, - NULL); + &s->rx_data_dev, TYPE_XILINX_AXI_DMA_DATA_STRE= AM); object_initialize_child(OBJECT(s), "axistream-control-connected-target= ", - &s->rx_control_dev, sizeof(s->rx_control_dev), - TYPE_XILINX_AXI_DMA_CONTROL_STREAM, &error_abo= rt, - NULL); + &s->rx_control_dev, + TYPE_XILINX_AXI_DMA_CONTROL_STREAM); object_property_add_link(obj, "dma", TYPE_MEMORY_REGION, (Object **)&s->dma_mr, qdev_prop_allow_set_link_before_realize, diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index aeda488bd1..892c78069d 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -1796,11 +1796,9 @@ static void pnv_xive_init(Object *obj) PnvXive *xive =3D PNV_XIVE(obj); =20 object_initialize_child(obj, "ipi_source", &xive->ipi_source, - sizeof(xive->ipi_source), TYPE_XIVE_SOURCE, - &error_abort, NULL); + TYPE_XIVE_SOURCE); object_initialize_child(obj, "end_source", &xive->end_source, - sizeof(xive->end_source), TYPE_XIVE_END_SOURCE, - &error_abort, NULL); + TYPE_XIVE_END_SOURCE); } =20 /* diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 6608d7220a..263cd1253c 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -272,12 +272,10 @@ static void spapr_xive_instance_init(Object *obj) { SpaprXive *xive =3D SPAPR_XIVE(obj); =20 - object_initialize_child(obj, "source", &xive->source, sizeof(xive->sou= rce), - TYPE_XIVE_SOURCE, &error_abort, NULL); + object_initialize_child(obj, "source", &xive->source, TYPE_XIVE_SOURCE= ); =20 object_initialize_child(obj, "end_source", &xive->end_source, - sizeof(xive->end_source), TYPE_XIVE_END_SOURCE, - &error_abort, NULL); + TYPE_XIVE_END_SOURCE); =20 /* Not connected to the KVM XIVE device */ xive->fd =3D -1; diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pm= u.c index aa90b9d1be..bd56eccd66 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -61,8 +61,7 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj) { XlnxZynqMPPMUSoCState *s =3D XLNX_ZYNQMP_PMU_SOC(obj); =20 - object_initialize_child(obj, "pmu-cpu", &s->cpu, sizeof(s->cpu), - TYPE_MICROBLAZE_CPU, &error_abort, NULL); + object_initialize_child(obj, "pmu-cpu", &s->cpu, TYPE_MICROBLAZE_CPU); =20 sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc), TYPE_XLNX_PMU_IO_INTC); @@ -174,8 +173,8 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine) pmu_ram); =20 /* Create the PMU device */ - object_initialize_child(OBJECT(machine), "pmu", pmu, sizeof(*pmu), - TYPE_XLNX_ZYNQMP_PMU_SOC, &error_abort, NULL); + object_initialize_child(OBJECT(machine), "pmu", pmu, + TYPE_XLNX_ZYNQMP_PMU_SOC); object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal); =20 /* Load the kernel */ diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index 216bdc69c0..a2698e4a20 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -98,8 +98,8 @@ static void macio_init_child_obj(MacIOState *s, const cha= r *childname, void *child, size_t childsize, const char *childtype) { - object_initialize_child(OBJECT(s), childname, child, childsize, childt= ype, - &error_abort, NULL); + object_initialize_child_with_props(OBJECT(s), childname, child, childs= ize, + childtype, &error_abort, NULL); qdev_set_parent_bus(DEVICE(child), BUS(&s->macio_bus)); } =20 @@ -351,8 +351,7 @@ static void macio_newworld_realize(PCIDevice *d, Error = **errp) object_property_set_bool(OBJECT(&ns->gpio), true, "realized", &err= ); =20 /* PMU */ - object_initialize_child(OBJECT(s), "pmu", &s->pmu, sizeof(s->pmu), - TYPE_VIA_PMU, &error_abort, NULL); + object_initialize_child(OBJECT(s), "pmu", &s->pmu, TYPE_VIA_PMU); object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpi= o", &error_abort); qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb); @@ -370,8 +369,7 @@ static void macio_newworld_realize(PCIDevice *d, Error = **errp) object_unparent(OBJECT(&ns->gpio)); =20 /* CUDA */ - object_initialize_child(OBJECT(s), "cuda", &s->cuda, sizeof(s->cud= a), - TYPE_CUDA, &error_abort, NULL); + object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA); qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", s->frequency); =20 diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c index 44fe04d889..c2f40b8ea9 100644 --- a/hw/net/xilinx_axienet.c +++ b/hw/net/xilinx_axienet.c @@ -1020,13 +1020,10 @@ static void xilinx_enet_init(Object *obj) SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); =20 object_initialize_child(OBJECT(s), "axistream-connected-target", - &s->rx_data_dev, sizeof(s->rx_data_dev), - TYPE_XILINX_AXI_ENET_DATA_STREAM, &error_abort, - NULL); + &s->rx_data_dev, TYPE_XILINX_AXI_ENET_DATA_STR= EAM); object_initialize_child(OBJECT(s), "axistream-control-connected-target= ", - &s->rx_control_dev, sizeof(s->rx_control_dev), - TYPE_XILINX_AXI_ENET_CONTROL_STREAM, &error_ab= ort, - NULL); + &s->rx_control_dev, + TYPE_XILINX_AXI_ENET_CONTROL_STREAM); sysbus_init_irq(sbd, &s->irq); =20 memory_region_init_io(&s->iomem, OBJECT(s), &enet_ops, s, "enet", 0x40= 000); diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index 2e97d6b17f..8492c18991 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -722,8 +722,7 @@ static void designware_pcie_host_init(Object *obj) DesignwarePCIEHost *s =3D DESIGNWARE_PCIE_HOST(obj); DesignwarePCIERoot *root =3D &s->root; =20 - object_initialize_child(obj, "root", root, sizeof(*root), - TYPE_DESIGNWARE_PCIE_ROOT, &error_abort, NULL); + object_initialize_child(obj, "root", root, TYPE_DESIGNWARE_PCIE_ROOT); qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_bit(DEVICE(root), "multifunction", false); } diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c index 3dfb3bf599..2bdbe7b456 100644 --- a/hw/pci-host/gpex.c +++ b/hw/pci-host/gpex.c @@ -124,8 +124,7 @@ static void gpex_host_initfn(Object *obj) GPEXHost *s =3D GPEX_HOST(obj); GPEXRootState *root =3D &s->gpex_root; =20 - object_initialize_child(obj, "gpex_root", root, sizeof(*root), - TYPE_GPEX_ROOT_DEVICE, &error_abort, NULL); + object_initialize_child(obj, "gpex_root", root, TYPE_GPEX_ROOT_DEVICE); qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_bit(DEVICE(root), "multifunction", false); } diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 8dcfe4a2fd..6e2b0174f6 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -968,23 +968,19 @@ static void pnv_phb3_instance_init(Object *obj) QLIST_INIT(&phb->dma_spaces); =20 /* LSI sources */ - object_initialize_child(obj, "lsi", &phb->lsis, sizeof(phb->lsis), - TYPE_ICS, &error_abort, NULL); + object_initialize_child(obj, "lsi", &phb->lsis, TYPE_ICS); =20 /* Default init ... will be fixed by HW inits */ phb->lsis.offset =3D 0; =20 /* MSI sources */ - object_initialize_child(obj, "msi", &phb->msis, sizeof(phb->msis), - TYPE_PHB3_MSI, &error_abort, NULL); + object_initialize_child(obj, "msi", &phb->msis, TYPE_PHB3_MSI); =20 /* Power Bus Common Queue */ - object_initialize_child(obj, "pbcq", &phb->pbcq, sizeof(phb->pbcq), - TYPE_PNV_PBCQ, &error_abort, NULL); + object_initialize_child(obj, "pbcq", &phb->pbcq, TYPE_PNV_PBCQ); =20 /* Root Port */ - object_initialize_child(obj, "root", &phb->root, sizeof(phb->root), - TYPE_PNV_PHB3_ROOT_PORT, &error_abort, NULL); + object_initialize_child(obj, "root", &phb->root, TYPE_PNV_PHB3_ROOT_PO= RT); qdev_prop_set_int32(DEVICE(&phb->root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_bit(DEVICE(&phb->root), "multifunction", false); } diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index aba710fd1f..368ae9eacd 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1155,12 +1155,10 @@ static void pnv_phb4_instance_init(Object *obj) QLIST_INIT(&phb->dma_spaces); =20 /* XIVE interrupt source object */ - object_initialize_child(obj, "source", &phb->xsrc, sizeof(phb->xsrc), - TYPE_XIVE_SOURCE, &error_abort, NULL); + object_initialize_child(obj, "source", &phb->xsrc, TYPE_XIVE_SOURCE); =20 /* Root Port */ - object_initialize_child(obj, "root", &phb->root, sizeof(phb->root), - TYPE_PNV_PHB4_ROOT_PORT, &error_abort, NULL); + object_initialize_child(obj, "root", &phb->root, TYPE_PNV_PHB4_ROOT_PO= RT); =20 qdev_prop_set_int32(DEVICE(&phb->root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_bit(DEVICE(&phb->root), "multifunction", false); diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c index 565345a018..f9b41c5042 100644 --- a/hw/pci-host/pnv_phb4_pec.c +++ b/hw/pci-host/pnv_phb4_pec.c @@ -370,8 +370,7 @@ static void pnv_pec_instance_init(Object *obj) =20 for (i =3D 0; i < PHB4_PEC_MAX_STACKS; i++) { object_initialize_child(obj, "stack[*]", &pec->stacks[i], - sizeof(pec->stacks[i]), TYPE_PNV_PHB4_PEC_= STACK, - &error_abort, NULL); + TYPE_PNV_PHB4_PEC_STACK); } } =20 @@ -522,8 +521,7 @@ static void pnv_pec_stk_instance_init(Object *obj) { PnvPhb4PecStack *stack =3D PNV_PHB4_PEC_STACK(obj); =20 - object_initialize_child(obj, "phb", &stack->phb, sizeof(stack->phb), - TYPE_PNV_PHB4, &error_abort, NULL); + object_initialize_child(obj, "phb", &stack->phb, TYPE_PNV_PHB4); } =20 static void pnv_pec_stk_realize(DeviceState *dev, Error **errp) diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 8d526457f4..d6028543d2 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -212,8 +212,7 @@ static void q35_host_initfn(Object *obj) memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb, "pci-conf-data", 4); =20 - object_initialize_child(OBJECT(s), "mch", &s->mch, sizeof(s->mch), - TYPE_MCH_PCI_DEVICE, &error_abort, NULL); + object_initialize_child(OBJECT(s), "mch", &s->mch, TYPE_MCH_PCI_DEVICE= ); qdev_prop_set_int32(DEVICE(&s->mch), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_bit(DEVICE(&s->mch), "multifunction", false); /* mch's object_initialize resets the default value, set it again */ diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c index e4fc8abb6a..3b321421b6 100644 --- a/hw/pci-host/xilinx-pcie.c +++ b/hw/pci-host/xilinx-pcie.c @@ -151,8 +151,7 @@ static void xilinx_pcie_host_init(Object *obj) XilinxPCIEHost *s =3D XILINX_PCIE_HOST(obj); XilinxPCIERoot *root =3D &s->root; =20 - object_initialize_child(obj, "root", root, sizeof(*root), - TYPE_XILINX_PCIE_ROOT, &error_abort, NULL); + object_initialize_child(obj, "root", root, TYPE_XILINX_PCIE_ROOT); qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0)); qdev_prop_set_bit(DEVICE(root), "multifunction", false); } diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index ffaf12b006..8cf097ae7c 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1061,22 +1061,16 @@ static void pnv_chip_power8_instance_init(Object *o= bj) object_property_allow_set_link, OBJ_PROP_LINK_STRONG); =20 - object_initialize_child(obj, "psi", &chip8->psi, sizeof(chip8->psi), - TYPE_PNV8_PSI, &error_abort, NULL); + object_initialize_child(obj, "psi", &chip8->psi, TYPE_PNV8_PSI); =20 - object_initialize_child(obj, "lpc", &chip8->lpc, sizeof(chip8->lpc), - TYPE_PNV8_LPC, &error_abort, NULL); + object_initialize_child(obj, "lpc", &chip8->lpc, TYPE_PNV8_LPC); =20 - object_initialize_child(obj, "occ", &chip8->occ, sizeof(chip8->occ), - TYPE_PNV8_OCC, &error_abort, NULL); + object_initialize_child(obj, "occ", &chip8->occ, TYPE_PNV8_OCC); =20 - object_initialize_child(obj, "homer", &chip8->homer, sizeof(chip8->ho= mer), - TYPE_PNV8_HOMER, &error_abort, NULL); + object_initialize_child(obj, "homer", &chip8->homer, TYPE_PNV8_HOMER); =20 for (i =3D 0; i < pcc->num_phbs; i++) { - object_initialize_child(obj, "phb[*]", &chip8->phbs[i], - sizeof(chip8->phbs[i]), TYPE_PNV_PHB3, - &error_abort, NULL); + object_initialize_child(obj, "phb[*]", &chip8->phbs[i], TYPE_PNV_P= HB3); } =20 /* @@ -1320,22 +1314,17 @@ static void pnv_chip_power9_instance_init(Object *o= bj) object_property_add_alias(obj, "xive-fabric", OBJECT(&chip9->xive), "xive-fabric"); =20 - object_initialize_child(obj, "psi", &chip9->psi, sizeof(chip9->psi), - TYPE_PNV9_PSI, &error_abort, NULL); + object_initialize_child(obj, "psi", &chip9->psi, TYPE_PNV9_PSI); =20 - object_initialize_child(obj, "lpc", &chip9->lpc, sizeof(chip9->lpc), - TYPE_PNV9_LPC, &error_abort, NULL); + object_initialize_child(obj, "lpc", &chip9->lpc, TYPE_PNV9_LPC); =20 - object_initialize_child(obj, "occ", &chip9->occ, sizeof(chip9->occ), - TYPE_PNV9_OCC, &error_abort, NULL); + object_initialize_child(obj, "occ", &chip9->occ, TYPE_PNV9_OCC); =20 - object_initialize_child(obj, "homer", &chip9->homer, sizeof(chip9->ho= mer), - TYPE_PNV9_HOMER, &error_abort, NULL); + object_initialize_child(obj, "homer", &chip9->homer, TYPE_PNV9_HOMER); =20 for (i =3D 0; i < PNV9_CHIP_MAX_PEC; i++) { object_initialize_child(obj, "pec[*]", &chip9->pecs[i], - sizeof(chip9->pecs[i]), TYPE_PNV_PHB4_PEC, - &error_abort, NULL); + TYPE_PNV_PHB4_PEC); } =20 /* @@ -1359,8 +1348,9 @@ static void pnv_chip_quad_realize(Pnv9Chip *chip9, Er= ror **errp) int core_id =3D CPU_CORE(pnv_core)->core_id; =20 snprintf(eq_name, sizeof(eq_name), "eq[%d]", core_id); - object_initialize_child(OBJECT(chip), eq_name, eq, sizeof(*eq), - TYPE_PNV_QUAD, &error_fatal, NULL); + object_initialize_child_with_props(OBJECT(chip), eq_name, eq, + sizeof(*eq), TYPE_PNV_QUAD, + &error_fatal, NULL); =20 object_property_set_int(OBJECT(eq), core_id, "id", &error_fatal); object_property_set_bool(OBJECT(eq), true, "realized", &error_fata= l); @@ -1586,10 +1576,8 @@ static void pnv_chip_power10_instance_init(Object *o= bj) { Pnv10Chip *chip10 =3D PNV10_CHIP(obj); =20 - object_initialize_child(obj, "psi", &chip10->psi, sizeof(chip10->psi), - TYPE_PNV10_PSI, &error_abort, NULL); - object_initialize_child(obj, "lpc", &chip10->lpc, sizeof(chip10->lpc), - TYPE_PNV10_LPC, &error_abort, NULL); + object_initialize_child(obj, "psi", &chip10->psi, TYPE_PNV10_PSI); + object_initialize_child(obj, "lpc", &chip10->lpc, TYPE_PNV10_LPC); } =20 static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 82f0769465..20e54ad5ac 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -483,8 +483,7 @@ static void pnv_psi_power8_instance_init(Object *obj) { Pnv8Psi *psi8 =3D PNV8_PSI(obj); =20 - object_initialize_child(obj, "ics-psi", &psi8->ics, sizeof(psi8->ics), - TYPE_ICS, &error_abort, NULL); + object_initialize_child(obj, "ics-psi", &psi8->ics, TYPE_ICS); object_property_add_alias(obj, ICS_PROP_XICS, OBJECT(&psi8->ics), ICS_PROP_XICS); } @@ -836,8 +835,7 @@ static void pnv_psi_power9_instance_init(Object *obj) { Pnv9Psi *psi =3D PNV9_PSI(obj); =20 - object_initialize_child(obj, "source", &psi->source, sizeof(psi->sourc= e), - TYPE_XIVE_SOURCE, &error_abort, NULL); + object_initialize_child(obj, "source", &psi->source, TYPE_XIVE_SOURCE); } =20 static void pnv_psi_power9_realize(DeviceState *dev, Error **errp) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 1228aeb4b0..7ef24ea2a1 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1727,9 +1727,9 @@ static void spapr_create_nvram(SpaprMachineState *spa= pr) =20 static void spapr_rtc_create(SpaprMachineState *spapr) { - object_initialize_child(OBJECT(spapr), "rtc", - &spapr->rtc, sizeof(spapr->rtc), TYPE_SPAPR_RT= C, - &error_fatal, NULL); + object_initialize_child_with_props(OBJECT(spapr), "rtc", &spapr->rtc, + sizeof(spapr->rtc), TYPE_SPAPR_RTC, + &error_fatal, NULL); object_property_set_bool(OBJECT(&spapr->rtc), true, "realized", &error_fatal); object_property_add_alias(OBJECT(spapr), "rtc-time", OBJECT(&spapr->rt= c), diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 29887fe363..ae4c3ebb8a 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -60,8 +60,7 @@ static void riscv_opentitan_init(MachineState *machine) =20 /* Initialize SoC */ object_initialize_child(OBJECT(machine), "soc", &s->soc, - sizeof(s->soc), TYPE_RISCV_IBEX_SOC, - &error_abort, NULL); + TYPE_RISCV_IBEX_SOC); object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_abort); =20 diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c index 61e88e2e37..56c2be5312 100644 --- a/hw/riscv/riscv_hart.c +++ b/hw/riscv/riscv_hart.c @@ -45,9 +45,7 @@ static void riscv_hart_realize(RISCVHartArrayState *s, in= t idx, { Error *err =3D NULL; =20 - object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx], - sizeof(s->harts[idx]), cpu_type, - &error_abort, NULL); + object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx], cpu_typ= e); s->harts[idx].env.mhartid =3D s->hartid_base + idx; qemu_register_reset(riscv_harts_cpu_reset, &s->harts[idx]); object_property_set_bool(OBJECT(&s->harts[idx]), true, diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index d2e2350a4d..77742c1a6e 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -85,9 +85,7 @@ static void riscv_sifive_e_init(MachineState *machine) int i; =20 /* Initialize SoC */ - object_initialize_child(OBJECT(machine), "soc", &s->soc, - sizeof(s->soc), TYPE_RISCV_E_SOC, - &error_abort, NULL); + object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_E_= SOC); object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_abort); =20 diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index d6c6364596..3e39301124 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -328,9 +328,7 @@ static void sifive_u_machine_init(MachineState *machine) int i; =20 /* Initialize SoC */ - object_initialize_child(OBJECT(machine), "soc", &s->soc, - sizeof(s->soc), TYPE_RISCV_U_SOC, - &error_abort, NULL); + object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_RISCV_U_= SOC); object_property_set_uint(OBJECT(&s->soc), s->serial, "serial", &error_abort); object_property_set_bool(OBJECT(&s->soc), true, "realized", @@ -486,9 +484,7 @@ static void sifive_u_soc_instance_init(Object *obj) MachineState *ms =3D MACHINE(qdev_get_machine()); SiFiveUSoCState *s =3D RISCV_U_SOC(obj); =20 - object_initialize_child(obj, "e-cluster", &s->e_cluster, - sizeof(s->e_cluster), TYPE_CPU_CLUSTER, - &error_abort, NULL); + object_initialize_child(obj, "e-cluster", &s->e_cluster, TYPE_CPU_CLUS= TER); qdev_prop_set_uint32(DEVICE(&s->e_cluster), "cluster-id", 0); =20 sysbus_init_child_obj(OBJECT(&s->e_cluster), "e-cpus", @@ -498,9 +494,7 @@ static void sifive_u_soc_instance_init(Object *obj) qdev_prop_set_uint32(DEVICE(&s->e_cpus), "hartid-base", 0); qdev_prop_set_string(DEVICE(&s->e_cpus), "cpu-type", SIFIVE_E_CPU); =20 - object_initialize_child(obj, "u-cluster", &s->u_cluster, - sizeof(s->u_cluster), TYPE_CPU_CLUSTER, - &error_abort, NULL); + object_initialize_child(obj, "u-cluster", &s->u_cluster, TYPE_CPU_CLUS= TER); qdev_prop_set_uint32(DEVICE(&s->u_cluster), "cluster-id", 1); =20 sysbus_init_child_obj(OBJECT(&s->u_cluster), "u-cpus", diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index 850fcce5e7..cc9c9dc162 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -3230,8 +3230,9 @@ void virtio_instance_init_common(Object *proxy_obj, v= oid *data, { DeviceState *vdev =3D data; =20 - object_initialize_child(proxy_obj, "virtio-backend", vdev, vdev_size, - vdev_name, &error_abort, NULL); + object_initialize_child_with_props(proxy_obj, "virtio-backend", vdev, + vdev_size, vdev_name, &error_abort, + NULL); qdev_alias_all_properties(vdev, proxy_obj); } =20 diff --git a/qom/object.c b/qom/object.c index c02487ec1a..41848ba7eb 100644 --- a/qom/object.c +++ b/qom/object.c @@ -529,19 +529,21 @@ void object_initialize(void *data, size_t size, const= char *typename) object_initialize_with_type(data, size, type); } =20 -void object_initialize_child(Object *parentobj, const char *propname, +void object_initialize_child_with_props(Object *parentobj, + const char *propname, void *childobj, size_t size, const char *type, Error **errp, ...) { va_list vargs; =20 va_start(vargs, errp); - object_initialize_childv(parentobj, propname, childobj, size, type, er= rp, - vargs); + object_initialize_child_with_propsv(parentobj, propname, + childobj, size, type, errp, vargs); va_end(vargs); } =20 -void object_initialize_childv(Object *parentobj, const char *propname, +void object_initialize_child_with_propsv(Object *parentobj, + const char *propname, void *childobj, size_t size, const char *typ= e, Error **errp, va_list vargs) { @@ -582,6 +584,15 @@ out: error_propagate(errp, local_err); } =20 +void object_initialize_child_internal(Object *parent, + const char *propname, + void *child, size_t size, + const char *type) +{ + object_initialize_child_with_props(parent, propname, child, size, type, + &error_abort, NULL); +} + static inline bool object_property_is_child(ObjectProperty *prop) { return strstart(prop->type, "child<", NULL); --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1591722470; cv=none; d=zohomail.com; s=zohoarc; b=W5T7lMj8qqIk1Ws/ysHTdqA3N8CIy0psB4AvCMMdC67KPQTiUHl21m/CG4i3BujPJGEaplfh17rWQCh9PPPh7LxlJuknHfliPttTTu0XTkgKracxZDD3vjpIoTjf/Us0ZYzVUSFcbOmmSAeV3rn9KHD6xjw3dJoZr9a2D1/Huv0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591722470; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Tue, 9 Jun 2020 18:39:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720783; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=shnAdhJjmSfgzQchX5hCLAlhU/KwAp2h4j2pwnONVtE=; b=HtNh7fSDqp1cgkukgA93QlUp0L7/Qi2jSKd88Cd/GYiiEhLaOhM/c7mrMj1cbL3uo5QFqA sDnMvDHgeHKSMWbYMyCsNIVikXHyNZ0zN+jnDRtuu3O5bTEK5Cqc5CCPcwVRewKsrleEbw ciOS3RT8LP0diJYjFEqgLS6IV24POHk= X-MC-Unique: 65V3c3YpOFGQsCawsdz10Q-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 37/39] macio: Convert use of qdev_set_parent_bus() Date: Tue, 9 Jun 2020 18:39:30 +0200 Message-Id: <20200609163932.1566209-38-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 01:38:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Paolo Bonzini , Mark Cave-Ayland , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Convert qdev_set_parent_bus()/realize to qdev_realize(); recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. Cc: Mark Cave-Ayland Cc: David Gibson Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- hw/misc/macio/macio.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index a2698e4a20..1a07ca2ca5 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -100,7 +100,6 @@ static void macio_init_child_obj(MacIOState *s, const c= har *childname, { object_initialize_child_with_props(OBJECT(s), childname, child, childs= ize, childtype, &error_abort, NULL); - qdev_set_parent_bus(DEVICE(child), BUS(&s->macio_bus)); } =20 static void macio_common_realize(PCIDevice *d, Error **errp) @@ -109,7 +108,7 @@ static void macio_common_realize(PCIDevice *d, Error **= errp) SysBusDevice *sysbus_dev; Error *err =3D NULL; =20 - object_property_set_bool(OBJECT(&s->dbdma), true, "realized", &err); + qdev_realize(DEVICE(&s->dbdma), BUS(&s->macio_bus), &err); if (err) { error_propagate(errp, err); return; @@ -125,7 +124,7 @@ static void macio_common_realize(PCIDevice *d, Error **= errp) qdev_prop_set_chr(DEVICE(&s->escc), "chrB", serial_hd(1)); qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial); qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial); - object_property_set_bool(OBJECT(&s->escc), true, "realized", &err); + qdev_realize(DEVICE(&s->escc), BUS(&s->macio_bus), &err); if (err) { error_propagate(errp, err); return; @@ -148,7 +147,7 @@ static void macio_realize_ide(MacIOState *s, MACIOIDESt= ate *ide, object_property_set_link(OBJECT(ide), OBJECT(&s->dbdma), "dbdma", errp= ); macio_ide_register_dma(ide); =20 - object_property_set_bool(OBJECT(ide), true, "realized", errp); + qdev_realize(DEVICE(ide), BUS(&s->macio_bus), errp); } =20 static void macio_oldworld_realize(PCIDevice *d, Error **errp) @@ -167,7 +166,7 @@ static void macio_oldworld_realize(PCIDevice *d, Error = **errp) =20 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", s->frequency); - object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err); + qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), &err); if (err) { error_propagate(errp, err); return; @@ -184,7 +183,7 @@ static void macio_oldworld_realize(PCIDevice *d, Error = **errp) sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev, OLDWORLD_ESCCA_IRQ)= ); =20 - object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err); + qdev_realize(DEVICE(&os->nvram), BUS(&s->macio_bus), &err); if (err) { error_propagate(errp, err); return; @@ -348,7 +347,7 @@ static void macio_newworld_realize(PCIDevice *d, Error = **errp) &error_abort); memory_region_add_subregion(&s->bar, 0x50, sysbus_mmio_get_region(sysbus_dev, 0)); - object_property_set_bool(OBJECT(&ns->gpio), true, "realized", &err= ); + qdev_realize(DEVICE(&ns->gpio), BUS(&s->macio_bus), &err); =20 /* PMU */ object_initialize_child(OBJECT(s), "pmu", &s->pmu, TYPE_VIA_PMU); --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Tue, 09 Jun 2020 12:39:53 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-135-H0bEtejJNqym3Rmv0ri9vQ-1; Tue, 09 Jun 2020 12:39:42 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id E868A873092; Tue, 9 Jun 2020 16:39:40 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id B93005C1BD; Tue, 9 Jun 2020 16:39:40 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 86110113847C; Tue, 9 Jun 2020 18:39:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720785; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QMNqSXNx4us/JNCxyd5YWOdv+mB/JgX/CHnODcMbFEc=; b=clV5woc4Ux2On8WTgQlpu/2DCl/MvnB1ITw9oERwvVvHlYr5swJPzcV5Rdp2qDxTxmwjd2 HEntu0H3cON8q/dMSKODhUWIqS5mz/66cKTnAbm4fFOk14cZi6NBl6BaEPpOmlFGfVng7i 4nvtbMvV6+j0s3Qr0ISpKx+qXz//6Xo= X-MC-Unique: H0bEtejJNqym3Rmv0ri9vQ-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 38/39] macio: Eliminate macio_init_child_obj() Date: Tue, 9 Jun 2020 18:39:31 +0200 Message-Id: <20200609163932.1566209-39-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 01:38:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Mark Cave-Ayland , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" macio_init_child_obj() has become a trivial wrapper around object_initialize_child_with_props(). Eliminate it, since the general convenience wrapper object_initialize_child() is just as convenient already. Cc: Mark Cave-Ayland Cc: David Gibson Signed-off-by: Markus Armbruster Reviewed-by: Paolo Bonzini --- hw/misc/macio/macio.c | 30 +++++++++--------------------- 1 file changed, 9 insertions(+), 21 deletions(-) diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index 1a07ca2ca5..8ba7af073c 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -94,14 +94,6 @@ static void macio_bar_setup(MacIOState *s) macio_escc_legacy_setup(s); } =20 -static void macio_init_child_obj(MacIOState *s, const char *childname, - void *child, size_t childsize, - const char *childtype) -{ - object_initialize_child_with_props(OBJECT(s), childname, child, childs= ize, - childtype, &error_abort, NULL); -} - static void macio_common_realize(PCIDevice *d, Error **errp) { MacIOState *s =3D MACIO(d); @@ -218,13 +210,12 @@ static void macio_oldworld_realize(PCIDevice *d, Erro= r **errp) } } =20 -static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_s= ize, - int index) +static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, int index) { gchar *name =3D g_strdup_printf("ide[%i]", index); uint32_t addr =3D 0x1f000 + ((index + 1) * 0x1000); =20 - macio_init_child_obj(s, name, ide, ide_size, TYPE_MACIO_IDE); + object_initialize_child(OBJECT(s), name, ide, TYPE_MACIO_IDE); qdev_prop_set_uint32(DEVICE(ide), "addr", addr); memory_region_add_subregion(&s->bar, addr, &ide->mem); g_free(name); @@ -242,16 +233,15 @@ static void macio_oldworld_init(Object *obj) qdev_prop_allow_set_link_before_realize, 0); =20 - macio_init_child_obj(s, "cuda", &s->cuda, sizeof(s->cuda), TYPE_CUDA); + object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA); =20 - macio_init_child_obj(s, "nvram", &os->nvram, sizeof(os->nvram), - TYPE_MACIO_NVRAM); + object_initialize_child(OBJECT(s), "nvram", &os->nvram, TYPE_MACIO_NVR= AM); dev =3D DEVICE(&os->nvram); qdev_prop_set_uint32(dev, "size", 0x2000); qdev_prop_set_uint32(dev, "it_shift", 4); =20 for (i =3D 0; i < 2; i++) { - macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i); + macio_init_ide(s, &os->ide[i], i); } } =20 @@ -396,11 +386,10 @@ static void macio_newworld_init(Object *obj) qdev_prop_allow_set_link_before_realize, 0); =20 - macio_init_child_obj(s, "gpio", &ns->gpio, sizeof(ns->gpio), - TYPE_MACIO_GPIO); + object_initialize_child(OBJECT(s), "gpio", &ns->gpio, TYPE_MACIO_GPIO); =20 for (i =3D 0; i < 2; i++) { - macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i); + macio_init_ide(s, &ns->ide[i], i); } } =20 @@ -413,10 +402,9 @@ static void macio_instance_init(Object *obj) qbus_create_inplace(&s->macio_bus, sizeof(s->macio_bus), TYPE_MACIO_BU= S, DEVICE(obj), "macio.0"); =20 - macio_init_child_obj(s, "dbdma", &s->dbdma, sizeof(s->dbdma), - TYPE_MAC_DBDMA); + object_initialize_child(OBJECT(s), "dbdma", &s->dbdma, TYPE_MAC_DBDMA); =20 - macio_init_child_obj(s, "escc", &s->escc, sizeof(s->escc), TYPE_ESCC); + object_initialize_child(OBJECT(s), "escc", &s->escc, TYPE_ESCC); } =20 static const VMStateDescription vmstate_macio_oldworld =3D { --=20 2.26.2 From nobody Mon Feb 9 03:20:46 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Tue, 09 Jun 2020 12:39:42 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 5A0C38018A5 for ; Tue, 9 Jun 2020 16:39:41 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-121.ams2.redhat.com [10.36.112.121]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D35656111F; Tue, 9 Jun 2020 16:39:40 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 8DD48113847D; Tue, 9 Jun 2020 18:39:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591720784; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qS0RAo0whN0g7Q1Pp54kr5U+MdK6Rto2nOL6Fc3o6XY=; b=Z5xYGPljKJNUpWl95Zcou4dyqTdrHcDFMiR6E0D2ZYincXLy5GT5dlSRtPWuoHnP2owhV5 BSHZ+26G2/7pDZs9fDCxjaoNw8/gaFxCLhs9Zd+x3Ou/Kxlp3+7xTkAu/0EqW+YoObY86Q aAVAieiq6qYozOY8s8apSg4wUEsTeLw= X-MC-Unique: J4uYk0jwOwCBYehpZuFFvg-1 From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PATCH v3 39/39] sysbus: Drop useless OBJECT() in sysbus_init_child_obj() calls Date: Tue, 9 Jun 2020 18:39:32 +0200 Message-Id: <20200609163932.1566209-40-armbru@redhat.com> In-Reply-To: <20200609163932.1566209-1-armbru@redhat.com> References: <20200609163932.1566209-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=207.211.31.81; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/08 23:42:34 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) OBJECT(child) expands to ((Object *)(child)). sysbus_init_child_obj() parameter @child is void *. Pass child instead of OBJECT(child). Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Paolo Bonzini --- hw/arm/allwinner-a10.c | 4 ++-- hw/arm/aspeed_ast2600.c | 39 +++++++++++++++++---------------------- hw/arm/aspeed_soc.c | 35 +++++++++++++++-------------------- hw/arm/nrf51_soc.c | 2 +- hw/mips/boston.c | 4 ++-- hw/mips/malta.c | 2 +- 6 files changed, 38 insertions(+), 48 deletions(-) diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c index 49c51463e1..64449416de 100644 --- a/hw/arm/allwinner-a10.c +++ b/hw/arm/allwinner-a10.c @@ -59,9 +59,9 @@ static void aw_a10_init(Object *obj) int i; =20 for (i =3D 0; i < AW_A10_NUM_USB; i++) { - sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]), + sysbus_init_child_obj(obj, "ehci[*]", &s->ehci[i], sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI); - sysbus_init_child_obj(obj, "ohci[*]", OBJECT(&s->ohci[i]), + sysbus_init_child_obj(obj, "ohci[*]", &s->ohci[i], sizeof(s->ohci[i]), TYPE_SYSBUS_OHCI); } } diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index beb688fd8f..10e92643c1 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -131,8 +131,7 @@ static void aspeed_soc_ast2600_init(Object *obj) } =20 snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); - sysbus_init_child_obj(obj, "scu", OBJECT(&s->scu), sizeof(s->scu), - typename); + sysbus_init_child_obj(obj, "scu", &s->scu, sizeof(s->scu), typename); qdev_prop_set_uint32(DEVICE(&s->scu), "silicon-rev", sc->silicon_rev); object_property_add_alias(obj, "hw-strap1", OBJECT(&s->scu), @@ -145,36 +144,33 @@ static void aspeed_soc_ast2600_init(Object *obj) sysbus_init_child_obj(obj, "a7mpcore", &s->a7mpcore, sizeof(s->a7mpcore), TYPE_A15MPCORE_PRIV); =20 - sysbus_init_child_obj(obj, "rtc", OBJECT(&s->rtc), sizeof(s->rtc), + sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc), TYPE_ASPEED_RTC); =20 snprintf(typename, sizeof(typename), "aspeed.timer-%s", socname); - sysbus_init_child_obj(obj, "timerctrl", OBJECT(&s->timerctrl), + sysbus_init_child_obj(obj, "timerctrl", &s->timerctrl, sizeof(s->timerctrl), typename); =20 snprintf(typename, sizeof(typename), "aspeed.i2c-%s", socname); - sysbus_init_child_obj(obj, "i2c", OBJECT(&s->i2c), sizeof(s->i2c), - typename); + sysbus_init_child_obj(obj, "i2c", &s->i2c, sizeof(s->i2c), typename); =20 snprintf(typename, sizeof(typename), "aspeed.fmc-%s", socname); - sysbus_init_child_obj(obj, "fmc", OBJECT(&s->fmc), sizeof(s->fmc), - typename); + sysbus_init_child_obj(obj, "fmc", &s->fmc, sizeof(s->fmc), typename); object_property_add_alias(obj, "num-cs", OBJECT(&s->fmc), "num-cs"); =20 for (i =3D 0; i < sc->spis_num; i++) { snprintf(typename, sizeof(typename), "aspeed.spi%d-%s", i + 1, soc= name); - sysbus_init_child_obj(obj, "spi[*]", OBJECT(&s->spi[i]), + sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]), typename); } =20 for (i =3D 0; i < sc->ehcis_num; i++) { - sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]), + sysbus_init_child_obj(obj, "ehci[*]", &s->ehci[i], sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI); } =20 snprintf(typename, sizeof(typename), "aspeed.sdmc-%s", socname); - sysbus_init_child_obj(obj, "sdmc", OBJECT(&s->sdmc), sizeof(s->sdmc), - typename); + sysbus_init_child_obj(obj, "sdmc", &s->sdmc, sizeof(s->sdmc), typename= ); object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc), "ram-size"); object_property_add_alias(obj, "max-ram-size", OBJECT(&s->sdmc), @@ -182,30 +178,29 @@ static void aspeed_soc_ast2600_init(Object *obj) =20 for (i =3D 0; i < sc->wdts_num; i++) { snprintf(typename, sizeof(typename), "aspeed.wdt-%s", socname); - sysbus_init_child_obj(obj, "wdt[*]", OBJECT(&s->wdt[i]), + sysbus_init_child_obj(obj, "wdt[*]", &s->wdt[i], sizeof(s->wdt[i]), typename); } =20 for (i =3D 0; i < sc->macs_num; i++) { - sysbus_init_child_obj(obj, "ftgmac100[*]", OBJECT(&s->ftgmac100[i]= ), + sysbus_init_child_obj(obj, "ftgmac100[*]", &s->ftgmac100[i], sizeof(s->ftgmac100[i]), TYPE_FTGMAC100); =20 sysbus_init_child_obj(obj, "mii[*]", &s->mii[i], sizeof(s->mii[i]), TYPE_ASPEED_MII); } =20 - sysbus_init_child_obj(obj, "xdma", OBJECT(&s->xdma), sizeof(s->xdma), + sysbus_init_child_obj(obj, "xdma", &s->xdma, sizeof(s->xdma), TYPE_ASPEED_XDMA); =20 snprintf(typename, sizeof(typename), "aspeed.gpio-%s", socname); - sysbus_init_child_obj(obj, "gpio", OBJECT(&s->gpio), sizeof(s->gpio), - typename); + sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio), typename= ); =20 snprintf(typename, sizeof(typename), "aspeed.gpio-%s-1_8v", socname); - sysbus_init_child_obj(obj, "gpio_1_8v", OBJECT(&s->gpio_1_8v), + sysbus_init_child_obj(obj, "gpio_1_8v", &s->gpio_1_8v, sizeof(s->gpio_1_8v), typename); =20 - sysbus_init_child_obj(obj, "sd-controller", OBJECT(&s->sdhci), + sysbus_init_child_obj(obj, "sd-controller", &s->sdhci, sizeof(s->sdhci), TYPE_ASPEED_SDHCI); =20 object_property_set_int(OBJECT(&s->sdhci), 2, "num-slots", &error_abor= t); @@ -213,17 +208,17 @@ static void aspeed_soc_ast2600_init(Object *obj) /* Init sd card slot class here so that they're under the correct pare= nt */ for (i =3D 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { sysbus_init_child_obj(obj, "sd-controller.sdhci[*]", - OBJECT(&s->sdhci.slots[i]), + &s->sdhci.slots[i], sizeof(s->sdhci.slots[i]), TYPE_SYSBUS_SDHCI= ); } =20 - sysbus_init_child_obj(obj, "emmc-controller", OBJECT(&s->emmc), + sysbus_init_child_obj(obj, "emmc-controller", &s->emmc, sizeof(s->emmc), TYPE_ASPEED_SDHCI); =20 object_property_set_int(OBJECT(&s->emmc), 1, "num-slots", &error_abort= ); =20 sysbus_init_child_obj(obj, "emmc-controller.sdhci", - OBJECT(&s->emmc.slots[0]), sizeof(s->emmc.slots[= 0]), + &s->emmc.slots[0], sizeof(s->emmc.slots[0]), TYPE_SYSBUS_SDHCI); } =20 diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 18d1763aba..5806e5c9b4 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -146,8 +146,7 @@ static void aspeed_soc_init(Object *obj) } =20 snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); - sysbus_init_child_obj(obj, "scu", OBJECT(&s->scu), sizeof(s->scu), - typename); + sysbus_init_child_obj(obj, "scu", &s->scu, sizeof(s->scu), typename); qdev_prop_set_uint32(DEVICE(&s->scu), "silicon-rev", sc->silicon_rev); object_property_add_alias(obj, "hw-strap1", OBJECT(&s->scu), @@ -157,39 +156,36 @@ static void aspeed_soc_init(Object *obj) object_property_add_alias(obj, "hw-prot-key", OBJECT(&s->scu), "hw-prot-key"); =20 - sysbus_init_child_obj(obj, "vic", OBJECT(&s->vic), sizeof(s->vic), + sysbus_init_child_obj(obj, "vic", &s->vic, sizeof(s->vic), TYPE_ASPEED_VIC); =20 - sysbus_init_child_obj(obj, "rtc", OBJECT(&s->rtc), sizeof(s->rtc), + sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc), TYPE_ASPEED_RTC); =20 snprintf(typename, sizeof(typename), "aspeed.timer-%s", socname); - sysbus_init_child_obj(obj, "timerctrl", OBJECT(&s->timerctrl), + sysbus_init_child_obj(obj, "timerctrl", &s->timerctrl, sizeof(s->timerctrl), typename); =20 snprintf(typename, sizeof(typename), "aspeed.i2c-%s", socname); - sysbus_init_child_obj(obj, "i2c", OBJECT(&s->i2c), sizeof(s->i2c), - typename); + sysbus_init_child_obj(obj, "i2c", &s->i2c, sizeof(s->i2c), typename); =20 snprintf(typename, sizeof(typename), "aspeed.fmc-%s", socname); - sysbus_init_child_obj(obj, "fmc", OBJECT(&s->fmc), sizeof(s->fmc), - typename); + sysbus_init_child_obj(obj, "fmc", &s->fmc, sizeof(s->fmc), typename); object_property_add_alias(obj, "num-cs", OBJECT(&s->fmc), "num-cs"); =20 for (i =3D 0; i < sc->spis_num; i++) { snprintf(typename, sizeof(typename), "aspeed.spi%d-%s", i + 1, soc= name); - sysbus_init_child_obj(obj, "spi[*]", OBJECT(&s->spi[i]), + sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]), typename); } =20 for (i =3D 0; i < sc->ehcis_num; i++) { - sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]), + sysbus_init_child_obj(obj, "ehci[*]", &s->ehci[i], sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI); } =20 snprintf(typename, sizeof(typename), "aspeed.sdmc-%s", socname); - sysbus_init_child_obj(obj, "sdmc", OBJECT(&s->sdmc), sizeof(s->sdmc), - typename); + sysbus_init_child_obj(obj, "sdmc", &s->sdmc, sizeof(s->sdmc), typename= ); object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc), "ram-size"); object_property_add_alias(obj, "max-ram-size", OBJECT(&s->sdmc), @@ -197,30 +193,29 @@ static void aspeed_soc_init(Object *obj) =20 for (i =3D 0; i < sc->wdts_num; i++) { snprintf(typename, sizeof(typename), "aspeed.wdt-%s", socname); - sysbus_init_child_obj(obj, "wdt[*]", OBJECT(&s->wdt[i]), + sysbus_init_child_obj(obj, "wdt[*]", &s->wdt[i], sizeof(s->wdt[i]), typename); } =20 for (i =3D 0; i < sc->macs_num; i++) { - sysbus_init_child_obj(obj, "ftgmac100[*]", OBJECT(&s->ftgmac100[i]= ), + sysbus_init_child_obj(obj, "ftgmac100[*]", &s->ftgmac100[i], sizeof(s->ftgmac100[i]), TYPE_FTGMAC100); } =20 - sysbus_init_child_obj(obj, "xdma", OBJECT(&s->xdma), sizeof(s->xdma), + sysbus_init_child_obj(obj, "xdma", &s->xdma, sizeof(s->xdma), TYPE_ASPEED_XDMA); =20 snprintf(typename, sizeof(typename), "aspeed.gpio-%s", socname); - sysbus_init_child_obj(obj, "gpio", OBJECT(&s->gpio), sizeof(s->gpio), - typename); + sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio), typename= ); =20 - sysbus_init_child_obj(obj, "sdc", OBJECT(&s->sdhci), sizeof(s->sdhci), + sysbus_init_child_obj(obj, "sdc", &s->sdhci, sizeof(s->sdhci), TYPE_ASPEED_SDHCI); =20 object_property_set_int(OBJECT(&s->sdhci), 2, "num-slots", &error_abor= t); =20 /* Init sd card slot class here so that they're under the correct pare= nt */ for (i =3D 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { - sysbus_init_child_obj(obj, "sdhci[*]", OBJECT(&s->sdhci.slots[i]), + sysbus_init_child_obj(obj, "sdhci[*]", &s->sdhci.slots[i], sizeof(s->sdhci.slots[i]), TYPE_SYSBUS_SDHCI= ); } } diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index fe126581e4..c278827b09 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -189,7 +189,7 @@ static void nrf51_soc_init(Object *obj) =20 memory_region_init(&s->container, obj, "nrf51-container", UINT64_MAX); =20 - sysbus_init_child_obj(OBJECT(s), "armv6m", OBJECT(&s->cpu), sizeof(s->= cpu), + sysbus_init_child_obj(OBJECT(s), "armv6m", &s->cpu, sizeof(s->cpu), TYPE_ARMV7M); qdev_prop_set_string(DEVICE(&s->cpu), "cpu-type", ARM_CPU_TYPE_NAME("cortex-m0")); diff --git a/hw/mips/boston.c b/hw/mips/boston.c index a34ccdf616..d90f3a463b 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -454,8 +454,8 @@ static void boston_mach_init(MachineState *machine) =20 is_64b =3D cpu_supports_isa(machine->cpu_type, ISA_MIPS64); =20 - sysbus_init_child_obj(OBJECT(machine), "cps", OBJECT(&s->cps), - sizeof(s->cps), TYPE_MIPS_CPS); + sysbus_init_child_obj(OBJECT(machine), "cps", &s->cps, sizeof(s->cps), + TYPE_MIPS_CPS); object_property_set_str(OBJECT(&s->cps), machine->cpu_type, "cpu-type", &error_fatal); object_property_set_int(OBJECT(&s->cps), machine->smp.cpus, "num-vp", diff --git a/hw/mips/malta.c b/hw/mips/malta.c index d03e1c3e49..be0b4d3195 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1183,7 +1183,7 @@ static void create_cpu_without_cps(MachineState *ms, static void create_cps(MachineState *ms, MaltaState *s, qemu_irq *cbus_irq, qemu_irq *i8259_irq) { - sysbus_init_child_obj(OBJECT(s), "cps", OBJECT(&s->cps), sizeof(s->cps= ), + sysbus_init_child_obj(OBJECT(s), "cps", &s->cps, sizeof(s->cps), TYPE_MIPS_CPS); object_property_set_str(OBJECT(&s->cps), ms->cpu_type, "cpu-type", &error_fatal); --=20 2.26.2