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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 04/29] hw/arm/pxa2xx: Replace printf() call by qemu_log_mask()
Date: Fri, 5 Jun 2020 17:49:42 +0100
Message-Id: <20200605165007.12095-5-peter.maydell@linaro.org>
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From: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
Replace printf() calls by qemu_log_mask(), which is disabled
by default. This avoid flooding the terminal when fuzzing the
device.
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
Message-id: 20200525114123.21317-3-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/pxa2xx.c | 66 ++++++++++++++++++++++++++++++++++++-------------
1 file changed, 49 insertions(+), 17 deletions(-)
diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c
index 336c9bad4ae..e649f8930cd 100644
--- a/hw/arm/pxa2xx.c
+++ b/hw/arm/pxa2xx.c
@@ -26,6 +26,7 @@
#include "sysemu/blockdev.h"
#include "sysemu/qtest.h"
#include "qemu/cutils.h"
+#include "qemu/log.h"
=20
static struct {
hwaddr io_base;
@@ -112,7 +113,9 @@ static uint64_t pxa2xx_pm_read(void *opaque, hwaddr add=
r,
return s->pm_regs[addr >> 2];
default:
fail:
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad read offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
break;
}
return 0;
@@ -143,8 +146,9 @@ static void pxa2xx_pm_write(void *opaque, hwaddr addr,
s->pm_regs[addr >> 2] =3D value;
break;
}
-
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad write offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
break;
}
}
@@ -185,7 +189,9 @@ static uint64_t pxa2xx_cm_read(void *opaque, hwaddr add=
r,
return s->cm_regs[CCCR >> 2] | (3 << 28);
=20
default:
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad read offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
break;
}
return 0;
@@ -210,7 +216,9 @@ static void pxa2xx_cm_write(void *opaque, hwaddr addr,
break;
=20
default:
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad write offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
break;
}
}
@@ -415,7 +423,9 @@ static uint64_t pxa2xx_mm_read(void *opaque, hwaddr add=
r,
return s->mm_regs[addr >> 2];
/* fall through */
default:
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad read offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
break;
}
return 0;
@@ -434,7 +444,9 @@ static void pxa2xx_mm_write(void *opaque, hwaddr addr,
}
=20
default:
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad write offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
break;
}
}
@@ -641,7 +653,9 @@ static uint64_t pxa2xx_ssp_read(void *opaque, hwaddr ad=
dr,
case SSACD:
return s->ssacd;
default:
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad read offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
break;
}
return 0;
@@ -733,7 +747,9 @@ static void pxa2xx_ssp_write(void *opaque, hwaddr addr,
break;
=20
default:
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad write offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
break;
}
}
@@ -995,7 +1011,9 @@ static uint64_t pxa2xx_rtc_read(void *opaque, hwaddr a=
ddr,
else
return s->last_swcr;
default:
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad read offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
break;
}
return 0;
@@ -1101,7 +1119,9 @@ static void pxa2xx_rtc_write(void *opaque, hwaddr add=
r,
break;
=20
default:
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad write offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
}
}
=20
@@ -1354,7 +1374,9 @@ static uint64_t pxa2xx_i2c_read(void *opaque, hwaddr =
addr,
s->ibmr =3D 0;
return s->ibmr;
default:
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad read offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
break;
}
return 0;
@@ -1427,7 +1449,9 @@ static void pxa2xx_i2c_write(void *opaque, hwaddr add=
r,
break;
=20
default:
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad write offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
}
}
=20
@@ -1628,7 +1652,9 @@ static uint64_t pxa2xx_i2s_read(void *opaque, hwaddr =
addr,
}
return 0;
default:
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad read offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
break;
}
return 0;
@@ -1685,7 +1711,9 @@ static void pxa2xx_i2s_write(void *opaque, hwaddr add=
r,
}
break;
default:
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad write offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
}
}
=20
@@ -1870,7 +1898,9 @@ static uint64_t pxa2xx_fir_read(void *opaque, hwaddr =
addr,
case ICFOR:
return s->rx_len;
default:
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad read offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
break;
}
return 0;
@@ -1922,7 +1952,9 @@ static void pxa2xx_fir_write(void *opaque, hwaddr add=
r,
case ICFOR:
break;
default:
- printf("%s: Bad register " REG_FMT "\n", __func__, addr);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad write offset 0x%"HWADDR_PRIx"\n",
+ __func__, addr);
}
}
=20
--=20
2.20.1