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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 11/29] hw/adc/stm32f2xx_adc: Correct memory region size and
access size
Date: Fri, 5 Jun 2020 17:49:49 +0100
Message-Id: <20200605165007.12095-12-peter.maydell@linaro.org>
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From: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
The ADC region size is 256B, split as:
- [0x00 - 0x4f] defined
- [0x50 - 0xff] reserved
All registers are 32-bit (thus when the datasheet mentions the
last defined register is 0x4c, it means its address range is
0x4c .. 0x4f.
This model implementation is also 32-bit. Set MemoryRegionOps
'impl' fields.
See:
'RM0033 Reference manual Rev 8', Table 10.13.18 "ADC register map".
Reported-by: Seth Kintigh <skintigh@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
Message-id: 20200603055915.17678-1-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/adc/stm32f2xx_adc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/adc/stm32f2xx_adc.c b/hw/adc/stm32f2xx_adc.c
index 4f9d485ecf2..01a0b14e69d 100644
--- a/hw/adc/stm32f2xx_adc.c
+++ b/hw/adc/stm32f2xx_adc.c
@@ -246,6 +246,8 @@ static const MemoryRegionOps stm32f2xx_adc_ops =3D {
.read =3D stm32f2xx_adc_read,
.write =3D stm32f2xx_adc_write,
.endianness =3D DEVICE_NATIVE_ENDIAN,
+ .impl.min_access_size =3D 4,
+ .impl.max_access_size =3D 4,
};
=20
static const VMStateDescription vmstate_stm32f2xx_adc =3D {
@@ -278,7 +280,7 @@ static void stm32f2xx_adc_init(Object *obj)
sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
=20
memory_region_init_io(&s->mmio, obj, &stm32f2xx_adc_ops, s,
- TYPE_STM32F2XX_ADC, 0xFF);
+ TYPE_STM32F2XX_ADC, 0x100);
sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);
}
=20
--=20
2.20.1